A Discretized Proportional Base Driver for Silicon ... - IEEE Xplore

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IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 5, MAY 2014

A Discretized Proportional Base Driver for Silicon Carbide Bipolar Junction Transistors Georg Tolstoy, Student Member, IEEE, Dimosthenis Peftitsis, Member, IEEE, Jacek Rabkowski, Member, IEEE, Patrick R. Palmer, and Hans-Peter Nee, Senior Member, IEEE

Abstract—Silicon carbide (SiC) bipolar junction transistors (BJTs) require a continuous base current in the on-state. This base current is usually made constant and is corresponding to the maximum collector current and maximum junction temperature that is foreseen in a certain application. In this paper, a discretized proportional base driver is proposed which will reduce, for the right application, the steady-state power consumption of the base driver. The operation of the proposed base driver has been verified experimentally, driving a 1200-V/40-A SiC BJT in a dc–dc boost converter. In order to determine the potential reduction of the power consumption of the base driver, a case with a dc–dc converter in an ideal electric vehicle driving the new European drive cycle has been investigated. It is found that the steady-state power consumption of the base driver can be reduced by approximately 60%. The total reduction of the driver consumption is 3459 J during the drive cycle, which is slightly more than the total on-state losses for the SiC BJTs used in the converter. Index Terms—Bipolar junction transistor (BJT), base driver, discretized base driver, driver, proportional base driver, proportional driver, silicon carbide (SiC).

I. INTRODUCTION N recent years, power transistors in silicon carbide (SiC) have become available in the market and their performance has set a new standard for highly efficient power electronics. The SiC bipolar junction transistor (BJT) is a good example which not only has very low conduction losses, it can also be switched very fast [1]–[4]. Fabrication of the BJT is also straightforward, compared to, for instance, the SiC MOSFET; no oxide layer is required. However, a number of potentially cost-driving issues still need to be solved like current gain which requires good passivation and bipolar degradation issues [5]–[8]. Provided that

I

Manuscript received February 15, 2013; revised April 27, 2013 and June 11, 2013; accepted July 15, 2013. Date of current version January 10, 2014. Recommended for publication by Associate Editor J. Lutz. G. Tolstoy, D. Peftitsis, and H.-P. Nee are with the Laboratory of Electrical Energy Conversion (E2C), School of Electrical Engineering, KTH Royal Institute of Technology, SE-10044 Stockholm, Sweden (e-mail: [email protected]; [email protected]; [email protected]). J. Rabkowski is with the Laboratory of Electrical Energy Conversion (E2C), School of Electrical Engineering, KTH Royal Institute of Technology, SE-10044 Stockholm, Sweden, and also with the Institute of Control and Industrial Electronics, Warsaw University of Technology, 00-662 Warsaw, Poland (e-mail: [email protected]). P. R. Palmer is with the Department of Engineering, University of Cambridge, Cambridge, CB2 1TN, U.K. (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TPEL.2013.2274331

these issues are solved, very reasonable priced products should be available in a close future. Despite all benefits of the SiC BJT, its excellence has been questioned because of the need for a continuous base current during the on-state. Experienced scientists and engineers remember the silicon (Si) BJTs of the 1980s and the associated complex, powerful, and costly base-drive units. These Si BJTs had current amplification factors of the order of 2–10 times and storage times during turn-off of approximately 10 μs. In contrast to the Si BJTs, the new SiC BJTs offer current amplification factors of more than 50 at high temperatures [2], [9], and the switching times are the same as for unipolar SiC devices as, for instance, the SiC MOSFET and SiC junction field-effect transistor, [3], [9]–[11]. Another difference is that the base–emitter voltage in the on-state is approximately 3 V instead of 0.7 V in the Si case. One of the more important improvements is the possibility for easy paralleling of the SiC BJT due to a positive temperature coefficient [2], instead of the negative temperature coefficient that was inherent in the Si BJT. Finally, the SiC BJTs have much higher doping densities than in the old Si BJTs. This means that the injection of charge carriers is insignificant, which in turn means that inevitable components, like the Baker clamp, for the Si BJT are unnecessary for the SiC BJT [3]. Due to the substantial differences between the Si and SiC BJTs, it is more reasonable to start from scratch than to look back when designing the base driver. Even if the current amplification factors of the new SiC BJTs are one order of magnitude higher than those of the Si BJTs, the power consumption of the base driver is still the weak spot of the SiC BJT. At first sight, it may also seem as if the requirements for fast switching and low-power consumption are contradictory. Nevertheless, it has been shown that it is possible to achieve switching times of approximately 20 ns with a base driver that consumes approximately 0.1% of the input power of the converter [12]. For high-power converters, this could still be a considerable amount of power, and for lower power levels, the power consumption of the base driver is a significant cost driver. With this in mind, it seems fruitful to investigate what potential energy savings can be obtained if a proportional base driver would be used, and how such a base driver could be designed. Even though the current gain of the SiC BJT is much higher than for the Si BJT, there is still need for a high-steady-state base current. The required magnitude of the base current, IB , depends on the collector current, IC , and the current gain of the device. The gain itself is not fixed but depends on a few system-dependent quantities [2], [9], mainly the temperature of the device and the collector current IC . The base current for a

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TOLSTOY et al.: DISCRETIZED PROPORTIONAL BASE DRIVER FOR SILICON CARBIDE BIPOLAR JUNCTION TRANSISTORS

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certain application can be calculated as the maximum collector current that the application, IC ,m ax , needs to be divided by the gain at the maximum rated temperature, βT m ax . Accordingly IB ,m in =

IC ,m ax . βT m ax

(1)

Unlike the typical characteristics of a Si BJT, there is no rolloff in the gain at high currents. In addition, there is no advantage in terms of VC E in the on-state of operating with an unnecessarily high base current. Because of these features, some guidance rules can be made when designing a BJT base driver: 1) always keep the BJT saturated when turned ON; 2) the BJT does not perform better with an unnecessarily high base current, dimension the driver and its steady-state base current with care; 3) in order to achieve fast switching, the base–emitter capacitance should be charged and discharged very rapidly, this is done by designing a dedicated dynamic power stage in the base driver. The idea of the proportional base driver is not new as such. For low-power applications with Si BJTs, two types of proportional base drivers have been used since the 1980s. The first type is based on Darlington connections and the second type makes use of a collector/base transformer [13]–[15]. Both of these solutions suffer from severe drawbacks when applied to modern SiC BJTs. In the case of the Darlington connection, the voltage drop across the switch is increased by approximately 3 V. This would severely deteriorate the benefits of the SiC BJT. The transformer solution, instead, suffers from adding stray inductance to the commutation loop. This could be disastrous if high-current high-speed switching is targeted. Additionally, the fixed turns ratio of the transformer would not allow the flexibility to adjust the base current with respect to, for instance, temperature changes. In this paper, therefore, a new concept for a proportional base driver for SiC BJTs is proposed. The main idea is to use a discretized current source, as in modern digital-to-analog converters [16]–[19], in combination with a speedup circuit for fast switching at turn-on and turn-off. In Section II, the base driver consumption is discussed and derived. The issue of the base driver power consumption that is the background for the concept of the proposed base driver is explained in Section III. In Section IV, a hardware realization of the base driver is presented and Section V gives experimental results with the driver connected to a realistic dc–dc boost converter. It is clearly shown that the driver is capable of adjusting the base current with respect to the collector current, and that the power consumption of the driver is highly dependent on the base current. Section VI provides an analysis of the potential loss savings when using the proposed base driver in a converter for a hybrid electric vehicle operating with a specific drive cycle. II. BJT BASE DRIVER CONSUMPTION As explained previously [12], the losses in the BJT drivers can be subdivided into six different contributions, where two are applicable on the continuous steady-state base current, one for

Fig. 1. Dual source base driver with resistors and capacitors (2SRC) with fixed steady-state base current presented in [12].

the dynamic switching, one for the charge and discharge of the base–emitter capacitance, and the last two are standby losses and the additional losses, such as losses in the power supplies and switching losses of the MOSFETs in the driver itself. This paper focuses on the important steady-state losses. During the on-state, the base–emitter junction consumes the power PBE = IB ,AV · VBE(SAT)

(2)

where IB ,AV is the average base current and VBE(SAT) is the voltage drop across the base–emitter junction. In order to supply the steady-state base current, the supply has to provide the power PR = IB2 ,RM S · (RDRV + RB )

(3)

where IB ,RM S is the RMS value of the discretized base current that flows through the resistors RB and RDRV seen in Fig. 1. Similar to (2), the RMS current is calculated without taking into account the transients. The dynamic power stage of the driver can consist of different setups as described thoroughly in [11] and [12]. The dynamic setup used and calculated in this paper is presented in [12] and is illustrated in Fig. 1. The dynamic power stage consists of a speedup capacitor, CB , which is connected in series with a damping resistor, RDP . These are connected on one end to the base of the SiC BJT and are fed by a totem pole that is connected to ground and high voltage supply, VCCH . When the totem pole is turned ON, a current flows through the capacitor until it is charged up to the supply voltage minus the base–emitter voltage. This spike ensures a rapid charging of the base–emitter capacitance in order to achieve a fast turn-on process. The speedup capacitor also contributes to a faster turn-off process. The driver consumption, PC B , due to the speedup capacitor is given by PCB = CB · fs · (VCCH − VBE(SAT) )2

(4)

where CB is the capacitance of the speedup capacitor and fS the switching frequency. The charging of the base–emitter capacitance consumes the power, PSB , which is defined as PSB = fS · QB · VBE(SAT)

(5)

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where QB is the base charge that is needed to turn ON the SiC BJT. The last two contributions to the power consumption are PSTANDBY , which is the power consumption in the idling mode, and PADD , which originates from switching losses of the totem poles and additional losses caused by the on-board dc/dc converters. PADD is hard to calculate or to measure separately and it is, therefore, determined as the difference between the measured total power consumptions and the other five contributions. In [12], a 6-A SiC BJT is used in a 2-kW boost converter. The steady-state consumption, PR and PBE , of the total driver consumption is significant. For 50 kHz, they were 75%; for 100 kHz, they were 63%; and for 200 kHz, they were 47%. Obviously, a reduction of the steady-state consumption would reduce the power consumption of the driver substantially.

Fig. 2. Proposed discretized proportional base (PDPB) driver for SiC BJTs, the steady-state part.

III. PROPOSED BASE DRIVER The thought behind the SiC BJT base driver introduced in this paper is to reduce the steady-state power consumption. From (2) and (3), it can be seen that the only quantities that will influence the steady-state power consumption are the base current and base resistance. VBE(SAT) is assumed to be a quantity which cannot be influenced by the driver and it is approximately 3 V. In previously presented SiC BJT base drivers [9], [12], [20]–[22], the steady-state base current is fixed and is in a magnitude that will keep the BJT saturated for the maximum collector current, IC ,m ax , and the maximum junction temperature TJ M AX expected in the system. A higher base current than the one calculated in (1) is needed to have a safe margin to make sure that the BJT stays in saturation. In this paper, a margin of 50% is used; this recommendation can also be seen in application notes from leading SiC BJT manufacturers [23]. This defines the minimum base current as IC ,m ax (6) IB ,m in = 1.5 · βT m ax where βT ,m ax is the current gain at the maximum operating temperature that a certain system is defined for. This means that for a system with a certain maximum power rating, the base current is fixed at a maximum value even though the collector current might only be at its maximum magnitude for a short interval. One example where a maximum collector current is only needed during short time intervals is an electrical vehicle where the system is designed for maximum torque which is necessary during maximum acceleration or deceleration. There are different ideas how to reduce the steady-state consumption of a SiC BJT base driver. The proportional base drivers that were introduced in the 1980s have to do with either Darlington transistors or with transformer that scale down the current [15], [24]. One possible solution is the proportional inductance drive scheme which is a small SMPS nested in large SMPS [15]. The issue with the drivers that uses transformers on the main circuit to gain proportionality is that they introduce parasitic inductances and capacitances in the driver which makes fast transients difficult. Also the base current of a base driver based on a transformer uses a fixed gain, while the gain of the SiC BJT differs with both collector current and temperature.

The proportional SiC BJT base driver that is introduced in this paper has a very simple design. It is divided into two parts: one for the steady-state base current and one for the dynamic switching. The basic idea is illustrated in Fig. 2. It resembles that of D/A converters with discretized current levels. A low voltage supply, VCC , supplies the steady-state base current through a number of parallel resistors. The current paths through each resistor can be opened or closed by a switch. This way, the magnitude of the steady-state base current can be varied in discretized steps according to the resistor values chosen. The number of switches in series with a resistor is arbitrary. The more pairs that are chosen for the design, the more discrete current levels can be controlled. For each new pair, the current levels are doubled. The number of resistor and switch pairs, and thus base current levels, should be chosen with care on what application the SiC BJT and its base driver should be used for. Also the resistance values should be chosen with care. The application should be well known so that the junction temperature and the most probable collector current levels can be defined. This way, the base driver consumption can be minimized. The equation for PBE of the new driver is the same as in (2), but the equation for PR is now given by 2 2 PR = IBSS,RM S · RDRV + IB 1,RM S · (RB 1 + RSW 1 )

+ IB2 2,RM S · (RB 2 + RSW 2 ) + · · ·

(7)

where IB 1,RM S , IB 2,RM S , . . . are the RMS values of the discretized base currents that flow through their corresponding resistors RB 1 , RB 2 , . . ., and IBSS,RM S is the steady-state base current which is the sum of IB 1,RM S , IB 2,RM S , . . .. The switching is controlled with a pulse-width-modulated (PWM) signal to the totem pole, and the turn-off oscillations are damped with a resistor that is connected to ground. A dynamic power stage is necessary for fast switching and thus low switching losses of the main transistor. The one that will be used with the proposed discretized proportional base driver (DPBD) in this paper is illustrated in Fig. 3. If the control signals to the switch and resistors pairs are sent to the base driver from the converter control unit, galvanic isolation would be necessary. In this case, each and every signal would require a separate galvanic-isolated signal transmission


Fig. 3.

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Discretized proportional base driver with high voltage supply.

channel. Such a high complexity is hard to motivate in most potential applications. Instead these signals should be multiplexed and transmitted over one channel and be demultiplexed on the base driver. Such circuits can be realized with low-cost standard integrated circuits. Another alternative solution would be to generate all the control signals, except the PWM signal, on the base driver itself. This would not require any additional complexity regarding the signal transmission from the main converter control unit to the base driver. However, the complexity of the base driver itself would increase especially because the collector current would have to be measured on the driver. Which solution to use depends on the application. To be able to control the proportional switches, a collector current measurement is needed. The current can be measured in a number of different places. The easiest way is to use a current that is already measured if that is possible. This could be the inductor, input, or output current of a dc–dc buck or boost converter, or the leg current of a three-phase inverter. What has been implemented in this paper is a current measurement of the inductor current on a dc–dc boost converter. The inductor current can be measured with a precision resistor, Hall effect, a bidirectional saturated current transformer [25], or some alternative current sensor like measuring the currents on the bond wires [26]. The collector current measurement should then be compared to predefined collector current levels so that the right base current can be fed into the base. This can be done in different ways, with a digital signal processor (DSP), a field programmable gate array (FPGA), or with discrete comparators. In a DSP or FPGA, two predefined lookup tables should be used to define which resistors to conduct with. One lookup table is used to see if the upper collector current limit, H-LUT, has been reached and the other lookup table is for the lower limit, L-LUT. The lower limit should have a hysteresis of 10%, so an overlap occurs. The concept can be seen in Fig. 4. At all times, a control has two indexes: one for temperature and one for collector current. If the temperature rises over a certain level, then the temperature index is increased by one and a new row in L-LUT and in H-LUT has to be used as references. The same applies for the collector current dependence; if the magnitude of the collector current increases over the H-LUT reference value, then the index is increased with one and the index moves one up one step in the L-LUT and H-LUT. The designer of the system should know

Fig. 4.

Proposed control of the DPBD with eight different base current levels.

the maximum ratings of the system so that the maximum base current will be applied. As temperature increases and collector current decreases, the gain decreases and thus the discretized base current intervals become smaller. Since the gain is temperature dependent [2], [4], [9], for an application where the junction temperature of the SiC BJT would change during a drive cycle, the base driver consumption can be reduced, if a good control is in place. But in, for instance, a hybrid vehicle, where the cooling water has an almost constant temperature, the control could be temperature independent. Some designing steps should be considered for the steadystate part of the base driver: 1) find out the gain at maximum collector current and the BJT’s maximum junction temperature, these two values almost always happen at the same time; 2) use (6) to find out the minimum base current needed for this application; 3) decide from a drive cycle how many base current levels that seem appropriate; 4) if there is low base current that can supply for long periods of time choose that level and calculate an appropriate resistor value, remember that the 50% extra base current applies to all levels; 5) the rest of the current levels should also be appropriate with care of the drive cycle, and the total base current should be no less than the base current calculated in 2, 6) then, two lookup tables should be done with respect to the temperature levels and collector current levels decided upon. The trimming of these lookup tables, L-LUT and H-LUT, is important. IV. DESIGN OF DPBD USED FOR TESTING In order to evaluate the performance of the proposed DPBD, a dc/dc boost converter has been built. It has a very simple layout, without being optimized with respect, for instance, to low stray inductances. The converter schematic is shown in Fig. 5. The parameters of the dc/dc boost prototype are summarized in Table II. It must be noted that the various currents have been measured using Rogowski coils (CWT6-ultra mini).

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TABLE I CONTROL ARRAYS H-LUT AND L-LUT, BASE CURRENT, CALCULATED STEADY-STATE LOSSES, AND THE MEASURED LOSSES

Fig. 5.

DC–DC boost converter with a Hall effect current measurement.

Fig. 6.

PCB layout of the DPBD model.

The design of the driver resembles that presented in Fig. 3 and the base driver itself is seen in Fig. 6. The driver is divided into six parts where A is the low voltage supply, VCCL , with stabilizing capacitor and D is the high voltage supply, VCCH . Both the supplies are fed by an external 24-V supply. The low voltage supply, supplies +5 V isolated output with a power rating of 5 W. The high voltage supply’s isolated output is +24 V with a power rating of 2 W. In B are the optocouplers, for the resistor and switch pairs, that isolate the control signal from the DSP. Each optocoupler is fed by +5 V. Likewise, in F is the optocoupler for the control signal for the PWM switching that controls the totem poles. E is the totem pole for the dynamic switching with speedup capacitor, CB , and damping resistor, RDP . In C, the steady-state totem pole is located and also the switch and resistor pairs, which in this experiment is four, that are giving the discretized current levels. Also, a damping resistor to ground, RDP,GND , is located in C. The base resistors was chosen to have an even spread in current between the levels. The resistor with the highest value, 10 Ω, is set to always conduct. This is an easy way to decide what minimum base current to use when the load of the dc– dc boost converter is very low. The other resistors chosen are 1.0, 2.2, and 4.7 Ω. But there is also the resistance in the PMOSFETs and the totem pole to consider. The resistance for the P-MOSFET is very low, under 0.1 Ω, while the totem pole’s output resistance was measured to be 1.0 Ω. Due to the high resistance of the totem pole, the steady-state base current at higher magnitudes does not get the same spread. A very low resistance of the auxiliary switches is preferred, so an optimum control can be easily implemented. A Hall effect-based linear current sensor, ACS758xCB from Allegro, is used in series with the inductor to measure the in-

Fig. 7. Measured base driver consumptions versus calculated base current consumption for different base currents.

ductor current. Hall effect element implemented in the circuit transmits a voltage whose magnitude depends linearly off the inductor current. This voltage is then measured and averaged in a DSP shortly after turn-off transients have passed in the inductor current. The DSP then uses two simple arrays to decide if the inductor current has changed enough in either direction to warrant a change in steady-state base current for the next on-state interval for the SiC BJT in the boost converter. These arrays can be seen in Table I where the lower limit lookup table is called L-LUT and the higher limit lookup table is called H-LUT. If the control signal goes below the indexed limit in L-LUT, then the index is subtracted with one and if it goes above the indexed value in H-LUT, the index is added with one and a higher base current is given during next on-state interval. In this version of the driver, no temperature measurement is implemented. In the implementation of the base driver, the Hall effect sensor is fed by +5 V and the output is then 5 V for 50 A, and at 0 A the output is 0.65 V. Since the maximum voltage that the A/D converter of the DSP can read is 3.3 V, any voltage over that gives the maximum value to the controller. This value is given in 12 bits and is though 4095. This signals to the base driver that full base current is needed. If the ground of the supply to the


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TABLE II COMPONENTS OF DC–DC BOOST CONVERTER

Hall effect sensor would disconnect, then the output would be 5 V, but if the +5 V supply would disconnect, then the output would be 0 V. Due to this and the fact that zero current has a positive output, a safety measure was made if the output signal is less than 0.20 V, then full base current should be supplied by the base driver. The control signals are sent from the DSP to the base driver and they are galvanically isolated. This is not optimal solution. However, it is a very simple way to verify this proposed driver concept. The base driver power consumption can be seen in Fig. 7. The driver consumption was measured at room temperature with the switching frequency of 98 kHz and a duty ratio of 0.6. The calculated values, all except the blue “+,” are added to each other in the graph so a good comparison to the measured value is made. Since the switching speed is constant and only the magnitude of the base current changes, all but PBE and PR are constant. The difference between the maximum power consumption calculated (solid line in top) and the power consumption measured is the additional power consumption, PADD , which should increase with higher base current. The power consumption of the base driver is measured by measuring the current and voltage input of the 24 V supply for all eight different switch modes of the base driver switches. As can be seen in the graph, the steady-state consumption increases linearly with the base current. This is what can be expected for this implementation when the base current is dependent on the value of the resistors. The steady-state consumption, PBE and PR , increases with 701%, from 0.55 to 3.82 W, when the base current changes from 0.18 to 1.27 A.

Fig. 8. Base current (top), collector current (middle), and Hall effect output voltage (bottom) as the duty ratio changes from 0.6 to 0.38.

V. EXPERIMENTAL WORK To test the implemented driver, a dc–dc boost converter has been built. It has a very simple layout which can be seen in Fig. 5. The components used in the experiments are tabulated in Table II. The load is constant during each experiment, but the duty ratio changes during the experiment. This way, the collector current of the BJT changes quite rapidly and the measurement and base current control get thoroughly tested. The totem poles are controlled by PWM switching with a set frequency for each experiment and the discretized base current switches are changed, if needed, during the off period. In Fig. 8, the duty ratio changes from 0.6 to 0.38, and thus, the output voltage of the dc–dc boost converter goes down, and since the load resistance is fixed, the collector current (purple, middle) also goes down. As the inductor current goes down, so does the voltage output (yellow, bottom) of the inductor current measurement. The voltage is sampled after the switching transients and averaged so that the right discretized base current can be fed into the base during

Fig. 9. Base current (top), collector current (bottom), and Hall effect output voltage (middle) just after switching has started. fS = 91 kHz and D = 0.6.

the next on-state interval. It can be seen in the graph that as the collector current decreases, the voltage output decreases, and finally, the voltage level goes under the value in the L-LUT and a new decreased base current (green, top) is fed to the base of the transistor. Fig. 9 shows the collector current and the corresponding inductor current measurement and the base current just after the switching has started in the dc–dc boost converter. The duty ratio is set to 0.6 and the output voltage goes up over the constant valued load resistor. This makes the inductor current increase and thus also the collector current. As the inductor current increases, the current measurement follows as seen in the graph. As the DSP interprets the input signal, the switching mode changes,

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TABLE III PARAMETERS OF IDEAL ELECTRIC VEHICLE

Fig. 12.

Discretized proportional base driver that are used for estimations.

Fig. 10. DC–DC boost/buck converter for an electrical vehicle driving the new European drive cycle.

Fig. 11. chosen.

(a) Vehicle speed during the NEDC. (b) Wheel torque of the car

and thus, a greater base current is fed to the BJT in a discretized manner. The base current increases twice in this graph. The Rogowski coil is floating and this is why the base current is moving in the graph. The experimental results in this section show that the implementation of the introduced discretized proportional base driver works well and has the potential to reduce the base driver consumption. The base current follows the voltage from the current measurement as intended. VI. BASE DRIVER POWER CONSUMPTION ESTIMATION FOR A DC–DC BOOST CONVERTER IN AN ELECTRICAL VEHICLE The reduction of losses in the proposed driver depends on how many levels are chosen and which base current levels, and on the distribution of IC . This driver will reduce the steady-state losses in applications where the collector current of the BJT varies over time. To make a comparison of the loss reduction with the introduced discretized BJT driver and the one with a constant base current, a simulation has been made of an ideal electric vehicle driving the standard drive cycle New European Driving Cycle (NEDC). The parameters of the electrical vehicle are tabulated in Table III and the NEDC is shown in Fig. 11(a).

Fig. 13. (a) Collector current per transistor in boost mode. (b) Difference for proportional base current to one level base current. (c) Accumulated steadystate losses for the one level driver (solid), DPBD (dash-dotted) compared to the on-state losses of the SiC BJT with an R O N of 30 mΩ at 150 ◦ C (dashed).

It is assumed that the ideal vehicle has a lossless electrical machine (EM), ideal battery with a constant voltage of 400 V, and an ideal dc–dc converter, shown in Fig. 10, which boosts the voltage to 800 V, when the vehicle is using a positive torque and bucks the voltage down from 800 to 400 V, when the car is decelerating. The ac–dc/dc–ac converter is also assumed ideal. The EM mechanical power output is shown in Fig. 11(b). For simplicity, the output and input power of the EM is divided by the constant voltage of the dc link, which is 800 V, to get the direct current fed by or delivered to the dc–dc boost/buck converter. This gives half the current through S1 and the full current through S2 . Two parallel 50-A transistors are necessary in switch position S1 . For bucking the voltage, one BJT is necessary in position S2 . The currents in each switch can be seen in Figs. 13(a) and 14(a) for the boost and buck mode, respectively. It also assumed that the cooling water of the vehicle will keep the junction temperature below 150◦ C. The parameters that are interesting for the BJT driver are the collector current, magnitude and sign, and the temperature of


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TABLE V STEADY-STATE PARAMETERS OF BASE DRIVER

TABLE VI BASE CURRENTS AND STEADY-STATE POWER CONSUMPTIONS WITH A DUTY RATIO OF 0.5

Fig. 14. a) shows the collector current per transistor in buck mode, b) shows the difference for proportional base current to one level base current, and c) shows the accumulated steady-state losses for the one level driver (solid), DPBD (dash-dotted) compared to the on-state losses of the SiC BJT with a R O N of 30 mΩ at 150 ◦ C (dashed). TABLE IV COLLECTOR/BASE CURRENT GAIN FOR A 1200-V/50-A SIC BJT (FSICBH017A120) [27] AT 150 ◦ C

the BJT devices. If these parameters are known, then the direct current gain can be located in a lookup table. Fig. 10 illustrates the dc–dc boost/buck converter that is located between the battery and the dc/ac inverter. The switch positions S1 and S2 are filled with 1200-V/50-A SiC BJTs, FSICBH017A120 from Fairchild, former Transic [27], which are state-of-the-art SiC BJTs for high power with an on-state resistance, RON , of 30 mΩ at 150 ◦ C. The gain for 150 ◦ C is given in the datasheet of FSICBH017A120 and shown in Table IV for different collector currents. It is assumed that the junction temperature never exceeds this temperature. For simplicity, only one temperature level is implemented in the design. The design of the base drivers design resembles that of the design from Section V, as shown in Fig. 12. One fixed level and two resistor and switch pairs are implemented which yields four current levels. The same driver will be used for the one BJT in S2 and the two parallel BJTs in S1 . The current sharing of the two parallel BJTs is assumed perfect. The design steps from Section III are followed. Maximum collector current of the application is 50 A, and the gain at 50 A and the junction temperature of 150 ◦ C is 55, as shown in Table IV. According to (6), the highest magnitude of base current that is needed is then 1.37 A. This includes the 50% safety margin. With a supply voltage of +5 V and a VBE of 3 V, this gives a total resistance of 1.46 Ω. The RDRV is at 0.7 Ω, which leaves 0.76 Ω as a resistance of the base resistor and switch pairs. The low collector current that

should be covered by the minimum base current the base driver can supply is 5A. This sets RCONST at 7.2 Ω. The next collector current level decided is 20A which sets R2 to 3.7 Ω. R1 then has to be 1 Ω. The parameters that affect the steady-state power consumption of the DPBD are given in Table V. The collector current limits and the corresponding base currents and steady-state consumption are shown in Table VI at a duty ratio of 0.5. The base current of the DPBD is compared with that of a simple driver in Figs. 13 and 14, where (a) illustrates the collector currents per device, (b) illustrates the steady-state base current, of the DPBD in red and that of a single-level driver in blue, and (c) shows a comparison of the accumulated energy loss during the NEDC for the base drivers, one level (solid), DPBD (dashdotted) compared with the on-state losses for the device itself. It can be seen in Figs. 13 and 14 that there is a great potential to reduce the power consumption. In Table VII, the steady-state power consumption over the NEDC is integrated for the different base drivers and the total energy is derived. The duty ratio is set at 0.5. In the boost mode, it can be seen that the DPBD consumes 37.2% of the energy that a single-level base driver would consume to drive the steady-state base current during the NEDC. For the buck mode, the DPBD consumes 40.2% of the energy. The total reduced energy for the three base drivers over the cycle is 3459 Ws, which means that the consumption is reduced with an average of about 3 W. It can also be seen from Figs. 13, 14 and Table VII that the reduction that has been made with the DPBD compared to the one-stage base driver is significant compared to the SiC BJTs on-state losses. This shows that for the right application, the reduction of losses in the driver could more than well outweigh the increased cost and complexity of the proposed DPBD.

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TABLE VII STEADY-STATE ENERGY CONSUMPTION DURING THE NEDC

VII. CONCLUSION AND DISCUSSION A new discretized proportional concept has been proposed to drive SiC BJTs. The driver focuses on reducing the steady-state power consumption of the base driver by having parallel current paths. A prototype has been built where the control of the discretized current levels operates as intended and a reduction in steady-state power consumption has been verified experimentally. In order to determine the potential reduction of the power consumption of the base driver, a case with a dc–dc converter in an ideal electric vehicle driving the new European drive cycle has been investigated. It is found that the driver’s steady-state power consumption, PBE and PR can be reduced by approximately 60%. The reduction is in the same magnitude as the total onstate losses for the SiC BJT. This means that the cooling needed to dissipate the heat loss is significantly reduced. This in turn would give a smaller size and/or simplifies the cooling system.

REFERENCES [1] M. Domeij, A. Konstantinov, A. Lindgren, C. Zaring, K. Gumaelius, and M. Reimark, “Large area 1200 V SiC BJTs with β > 100 and ρO N < 3 mΩcm2 ,” Mater. Sci. Forum, vol. 717–720, pp. 1123–1126, May 2012. [2] M. Chinthavali, P. Ning, Y. Cui, and L. M. Tolbert, “Investigation on the parallel operation of discrete SiC BJTs and JFETs,” in Proc. 26th IEEE Annu. Appl. Power Electron. Conf. Expo., Mar. 2011, pp. 1076–1083. [3] A. Lindgren and M. Domeij, “Degradation free fast switching 1200 V 50 A silicon carbide BJT’s,” in Proc. IEEE 26th Annu. Appl. Power Electron. Conf. Expo., Mar. 6–11, 2011, pp. 1064–1070. [4] A. Agarwal, Q. Zhang, A. Burk, R. Callanan, and S. Mazumder, “Prospects of bipolar power devices in silicon carbide,” in Proc. 34th IEEE Annu. Conf. Ind. Electron., Nov. 10–13, 2008, pp. 2879–2884. [5] S. G. Sundaresan, A.-M. Soe, S. Jeliazkov, and R. Singh, “Characterization of the stability of current gain and avalanche-mode operation of 4H-SiC BJTs,” IEEE Trans. Electron Devices, vol. 59, no. 10, pp. 2795– 2802, Oct. 2012. [6] J. Zhang, X. Li, P. Alexandrov, L. Fursin, X. Wang, and J. H. Zhao, “Fabrication and characterization of high-current-gain 4H-SiC bipolar junction transistors,” IEEE Trans. Electron Devices, vol. 55, no. 8, pp. 1899–1906, Aug. 2008. ¨ [7] A. Salemi, H. Elahipanah, B. Buono, C. M. Zetterling, and M. Ostling, “Area-optimized JTE for 4.5 kV non ion-implanted 4H-SiC BJT,” Mater. Sci. Forum, vol. 740–742, pp. 974–977, Jan. 2013. [8] S. Balachandran, T. P. Chow, and A. Agarwal, “Optimization of the specific on-resistance of 4H-SiC BJTs,” Mater. Sci. Forum, vol. 527–529, pp. 1429–1432, 2006.

[9] A. Lindgren and M. Domeij, “Fast switching 1200 V 50 A silicon carbide BJT’s in boost converters,” in Proc. 14th Eur. Conf. Power Electron. Appl., 2011, pp. 1–8. [10] T. Funaki, M. Sasagawa, and T. Nakamura, “Multi-chip SiC DMOSFET half-bridge power module for high temperature operation,” in Proc. 27th IEEE Annu. Appl. Power Electron. Conf. Expo., Feb. 2012, pp. 2525–2529. [11] J. Rabkowski, D. Peftitsis, H.-P. Nee, and M. Zdanowski, “A simple highperformance low-loss current-source driver for SiC bipolar transistors,” in Proc. 7th Int. Power Electron. Motion Control Conf., Jun. 2–5, 2012, vol. 1, pp. 222–228. [12] J. Rabkowski, G. Tolstoy, D. Peftitsis, and H. Nee, “Low-loss highperformance base-drive unit for SiC BJTs,” IEEE Trans. Power Electron., vol. 27, no. 5, pp. 2633–2643, May 2012. [13] L. D. Varga and N. A. Losic, “Design of a high-performance floating power BJT driver with proportional base drive,” in Proc. Conf. Record IEEE Ind. Appl. Soc. Annu. Meeting, Oct. 1–5, 1989, vol. 1, pp. 1186– 1189. [14] L. Wang and H. Baengtsson, “How to control SiC BJT with high efficiency?,” in Proc. 7th Int. Conf. Integr. Power Electron. Syst., Mar. 6–8, 2012, pp. 1–4. [15] R. L. Avant, D. J. Shortt, G. E. West, and R. E. Palma, “A proportional drive for discontinuous mode DC-to-DC converters,” in Proc. Int. Telecommun. Energy Conf., Nov. 4–7, 1984, pp. 352–358. [16] E. C. Kwong, G. L. Baldwin, and T. Hornak, “A frequency-ratio-based 12bit MOS precision binary current source,” IEEE J. Solid-State Circuits, vol. SSC-19, no. 6, pp. 1029–1037, Dec. 1984. [17] G. Fu, H. A. Mantooth, and J. Di, “A 12-bit CMOS current steering D/A converter with a fully differential voltage output,” in Proc. 12th Int. Symp. Quality Electron. Design, Mar. 2011, pp. 1–7. [18] P. Namburu, R. Veillette, J. Carletta, and M. Ward, “A temperatureinsensitive gate-controlled weighted current digital-to-analog converter,” in Proc. 53rd IEEE Int. Midwest Symp. Circuits Syst., Aug. 2010, pp. 485– 488. [19] U. Nukala and K.-S. Lee, “A compact current steering DAC with component swapping calibration,” in Proc. IEEE Dallas Circuits Syst. Workshop, Oct. 2010, pp. 1–4. [20] T. K. Gachovska, B. Du, J. L. Hudgins, A. Grekov, A. Bryant, E. Santi, H. A. Mantooth, and A. Agarwal, “Modeling and simulation of a SiC BJT,” in Proc. IEEE Energy Convers. Congr. Expo., Sep. 20–24, 2009, pp. 979–985. [21] X. Xu, A. Q. Huang, Y. Gao, Z. Du, A. Agarwal, S. Krishnaswami, and S.-H. Ryu, “400 kHz, 300 W SiC BJT based high power density PFC converter,” in Proc. 37th IEEE Power Electron. Spec. Conf., Jun. 18–22, 2006, pp. 1–5. [22] D. Tournier, P. Bevilacqua, P. Brosselard, D. Planson, B. Allard, U. De Lyon, and L. Ampère, “SiC BJT Driver applied to a 2 kW Inverter : Performances and limitations,” in Proc. 6th Int. Conf. Integr. Power Electron. Syst., 2010, pp. 16–18. [23] Driving a SiC NPN Transistor, Fairchild Semiconductors, San Jose, CA, USA, Appl. Note AN-6096, 2012. [24] V. Wyk, J. D. , P. H. Swanepoel, and J. J. Schoeman, “Megahertz direct base drives for high power converters with high voltage bipolar power transistors,” in Proc. 3rd Int. Conf. Power Electron. Variable-Speed Drives, Jul. 13–15, 1988, pp. 13–16.


[25] B. Wrzecionko, L. Steinmann, and J. W. Kolar, “High-bandwidth hightemperature (250 ◦ C / 500 ◦ F) isolated DC and AC current measurement: Bidirectionally saturated current transformer,” IEEE Trans. Power Electron., vol. 28, no. 11, pp. 5404–5413, Nov. 2013. [26] H. Hirai, Y. Kasho, M. Tsukuda, and I. Omura, “Bonding wire current measurement with tiny film current sensors,” in Proc. 24th Int. Symp. Power Semiconductor Devices ICs, Jun. 3–7, 2012, pp. 287–290. [27] FSICBH017A120 Preliminary datasheet, Fairchild Semiconductors, San Jose, CA, USA, 2012.

Georg Tolstoy (S’09) was born in Gavle, Sweden, in 1981. He received the M.Sc. degree in engineering physics from Uppsala University, Uppsala, Sweden, in 2008. Since 2008, he has been working toward the Ph.D. degree in power electronics at the KTH Royal Institute of Technology, Stockholm, Sweden. He was previously a Project Worker at ABB Corporate Research Center, Väster˚as, Sweden, and a Software Engineer at SAAB Avitronics, Kista, Sweden.

Dimosthenis Peftitsis (S’03–M’13) was born in Kavala, Greece, in 1985. He received the Diploma degree in electrical and computer engineering from the Democritus University of Thrace, Xanthi, Greece, in 2008, and the Ph.D. degree from the KTH Royal Institute of Technology, Stockholm, Sweden, in 2013. He is currently with the Department of Electrical Energy Conversion, KTH Royal Institute of Technology. In 2008, he was with ABB Corporate Research, Väster˚as, Sweden, for six months, where he was involved in working on his diploma thesis. His current research interests include gate and base driver design for SiC JFETs and BJTs, as well as protection circuits for normally ON SiC JFETs.

Jacek Rabkowski (M’10) received the M.Sc. and Ph.D. degrees in electrical engineering from the Warsaw University of Technology, Warsaw, Poland, in 2000 and 2005, respectively. In 2005, he joined the Institute of Control and Industrial Electronics, Warsaw University of Technology, as an Assistant Professor. During 2010–2012, he was a Guest Researcher with the Electrical Energy Conversion (E2C) Laboratory, KTH Royal Institute of Technology, Stockholm, Sweden. His research interests include novel topologies of power converters and pulse width modulation techniques, particularly drive units and converters with SiC devices. Dr. Rabkowski serves as a Chairman of the Joint Industrial Electronics Society/Power Electronics Society Chapter of the IEEE Poland Section.

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Patrick R. Palmer received the Undergraduate and Ph.D. degrees from the Imperial College London, London, U.K. He is a cofounder of Amantys Ltd. and Reader in engineering at the University of Cambridge, Cambridge, U.K. He holds the Dudley Robinson Fellowship of St. Catharine’s College, Cambridge. He has taught electrical engineering and power electronics for more than 25 years. His research is mainly concerned with the design, characterization, and application of power semiconductor devices and computer analysis and simulation of power devices and systems. As an Associate Professor at the University of British Columbia in Canada, he built the world’s fastest switching converter at 4 GHz. He has extensive consulting experience in the field of power electronics and has published more than 150 articles and papers; he is an inventor on multiple patents. Dr. Palmer is a Chartered Engineer in the U.K.

Hans-Peter Nee (S’91–M’96–SM’04) was born in Väster˚as, Sweden, in 1963. He received the M.Sc., Licentiate, and Ph.D. degrees in electrical engineering from the KTH Royal Institute of Technology, Stockholm, Sweden, in 1987, 1992, and 1996, respectively. In 1999, he became a Professor of power electronics at the KTH Royal Institute of Technology, where he is currently the Head of the Electrical Energy Conversion Laboratory. His current research interests include power electronic converters, semiconductor components, and control aspects of utility applications, such as flexible ac transmission systems and high-voltage dc transmissions, and variable-speed drives. Dr. Nee received several awards for his research. He is an Associate Editor of the IEEE TRANSACTIONS ON POWER ELECTRONICS. He was on the Board of the IEEE Sweden Section for several years, serving as its Chairman during 2002–2003. He is a Member of the European Power Electronics and Drives Association, involved with the Executive Council and the International Scientific Committee.