A Novel Fault Classification Scheme for Series ... - IEEE Xplore

Received February 22, 2018, accepted April 9, 2018, date of publication May 15, 2018, date of current version June 5, 2018. Digital Object Identifier 10.1109/ACCESS.2018.2836401

A Novel Fault Classification Scheme for Series Capacitor Compensated Transmission Line Based on Bagged Tree Ensemble Classifier PRAVEEN KUMAR MISHRA AND MOHAMMAD PAZOKI

1,

ANAMIKA YADAV1 , (Senior Member, IEEE),

2

1 Department 2 School

of Electrical Engineering, NIT Raipur, Raipur 492010, India of Engineering, Damghan University, Damghan 3671641167, Iran

Corresponding author: Praveen Kumar Mishra ([email protected])

ABSTRACT This paper presents a novel intelligent fault classification scheme for fixed series capacitor compensated transmission line. The singular value decomposition principle is applied along with the fast discrete orthonormal S-transform (FDOST) and bagged tree ensemble classifier for classification of faults under different scenarios. Classification input features are extracted from 1/2 cycle post-fault current data through the FDOST. The feasibility of the proposed relaying scheme is tested on a modified WSCC 3-machine 9-bus system under different fault conditions using PSCAD/EMTDC, and the results indicate the proposed scheme to be fast and accurate. The robustness of the proposed scheme to noise and current transformer saturation is also established. The obtained results under different fault scenarios confirm the efficacy of the proposed scheme. INDEX TERMS Bagged tree ensemble classifier, fault classifier, fast discrete orthonormal S-transform.

I. INTRODUCTION

The prime objective of relaying schemes is to ensure accurate and quick detection and classification of faults in transmission lines. Prediction of faults with high accuracy increases the operational stability and reliability of the power system and helps to avoid huge power failure. Fixed series capacitors are one way to improve transmission capability and system stability. In addition, when an appropriate design is adopted, they can reduce losses and damp sub-synchronous oscillation [1]–[3]. The conventional distance relay functions satisfactorily if the fault loop does not involve the series capacitor; otherwise, it may mal-operate due to rapid changes in the line impedance. These changes in the line impedance may cause voltage and/or current inversion. Also, the protective devices of series capacitors, such as the metal oxide varistor (MOV) and the bypass switch, may provoke challenges to the issue of protection [4]–[6]. A. LITERATURE REVIEW

A number of improvements related to relaying schemes and corrective measures to overcome the aforementioned challenges have been discussed in [7]–[9]. The main drawback of the current schemes is related to their complicated

VOLUME 6, 2018

settings for high series compensation. To address this challenge, differential and phase-comparison-based schemes have been suggested in [10] and [11]. Fault detection and classification in the series compensated transmission line (SCTL) with high accuracy at the least possible time are crucial tasks in the protection of power systems. Moreover, due to the shortcomings of the conventional distance relaying algorithms, computational intelligence-based relaying algorithms are very popular for the protection of complex nonlinear compensated and uncompensated power systems as discussed in [12]–[31]. Different artificial neural networks (ANNs) have been employed for detection and classification of faults, which are characterized as singlelayer or multi-layer perceptrons [12]. A Chebyshev neural network (ChNN) relaying scheme for the SCTL has been reported in [13]. In this scheme, two training algorithms viz. least square Levenberg-Marquardt and recursive least square algorithms with a forgetting factor have been proposed. The accuracy of the ChNN-based approach is found to be 99.43% for 1/2 cycle duration. In [14], a combined discrete wavelet transform (DWT) up to dB1 for fault detection and classification and dB4 with k-nearest neighbor (k-NN) for fault location have been applied under various fault conditions in

2169-3536 2018 IEEE. Translations and content mining are permitted for academic research only. Personal use is also permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.

27373

P. K. Mishra et al.: Novel Fault Classification Scheme

the double circuit SCTL. The efficiency of the support vector machine (SVM) makes it a powerful tool for fault classification. In [15], four SVM modules corresponding to three individual phases and the ground are used for fault classification in the SCTL. Fault classification using the DWT and SVM has been proposed in [16], whereby the current samples of the individual phases with the zero sequence current are utilized for the purpose of fault classification. The combination of the DWT and fuzzy-logic-based method for fault classification has been discussed in [17]–[19], but the accuracy of the combined scheme cannot be guaranteed for the wide variation in fault inception angles (FIA) and fault resistances (FR). The combination of the DWT and adaptive neuro-fuzzy (ANFIS) scheme for detection of faults in series compensated and uncompensated transmission lines has been discussed in [20] and [21]. In [20], a feature extraction method based on the norm entropy of the DWT has been discussed, which requires one cycle of post-fault voltage and current samples. In [22], the logistic modal tree (LMT) scheme has been discussed for the SCTL. The decision tree (DT) with the DWT is applied in the SCTL in [23]; however, its classification accuracy is low. Appropriate methods for feature extraction play an important role in the performance of relaying scheme in that they can drive the accuracy and speed of the schemes. The discrete fourier transform (DFT) is one of the popular feature extraction tools [24], [25]; the shortcoming of this tool is the assumption that the behavior of the fault signal is stationary, which is not the case in real time. The DWT proposed in [20] and [26] is able to fill the gap created by the DFT by capturing the time-frequency information of the fault signal. Its performance may be affected by noise, however. Again, to improve the performance of relaying schemes, the Stockwell’s transform (ST) method for feature extraction has been discussed in [27]–[29]. This method requires huge amount of memory, which may impose huge computation burden on the extraction process. The fast discrete orthonormal S-transform (FDOST) has been proposed in [30] and [31] to overcome the shortcomings of the ST while maintaining its merits. The main shortcoming of the ST is redundancy. For example, for a signal with a length of N samples, the ST and the FDOST generate N2 and N coefficients, respectively. Therefore, the FDOST overcomes much of the memory and computational burden caused by the ST. Moreover, with respect to computation complexity, the FDOST is comparable with the fast Fourier transform (FFT) algorithm [30]. In this paper, a combination of the FDOST and singular value decomposition (SVD) is employed for the purpose of feature extraction and the bagged tree ensemble classifier (BTEC) is used for the purpose of fault classification. The FDOST is a non-redundant version of the ST. The combination of the FDOST and SVD improves the quality of the extracted features. The SVD makes the hidden features from the FDOST coefficients accessible. Moreover, the BTEC, as an ensemble classifier, considerably improve the classification performance through integrating individual models. 27374

The main contribution of this paper is that it proposes a new intelligent fault classification scheme for the SCTL using one end measurement of the three-phase current at a sampling frequency of 1.0 kHz. This paper is organized as follows. In Section II, an overview of the pattern recognition tools is discussed. Section III addresses the test system as well as the parameters set for generating training and testing datasets. Section IV discuses the fault detection and classification scheme proposed in this paper. In Section V, a comprehensive analysis of the proposed scheme is presented. Finally, Section VI concludes the paper. II. PATTERN RECOGNITION TOOLS

In this section, an overview of both the FDOST and ensemble classifier as used in this paper is presented. A. FEATURE EXTRACTION USING FDOST AND SVD

The behavior of fault signals is non-stationary in nature. The FDOST can be an effective tool for the study of non-stationary signals in the time-frequency domain. The FDOST is a transform preferred over the ST, Discrete S-transform (DST), and Discrete Orthonormal S-transform (DOST) with respect to memory and computation related issues [30]. The FDOST of the time domain signal h(t) with the frequency f in the time-frequency domain can be derived as β

S[ν,β,τ ]

ν+ 2 −1 1 X i 2πτ f e−iπτ e β H [f ] =√ β β

(1)

f =ν− 2

where, H [f ] is the DFT of the time domain signal h(t) and the basis vector of the time-frequency domain can be explained by the three parameters of [ν, β, τ ], where ν, β, and τ signify the centre of the frequency band, the width of the band, and the location in time, respectively. More mathematical details of the FDOST-based method for feature extraction have been provided in [31]. The SVD can be effectively employed for detection of the disturbance or transient present in the time-domain faulty current signal. The P SVD decomposes the matrix Xm×n into the three factors U, , and V, where U and V represent two unitary P matrices of the order of m × n and n × n, respectively, and m×n represents a diagonal matrix with non-negative real numbers in the diagonal. The singular values of 1/2 cycle of the three-phase current FDOST coefficients are estimated using (2) and the values are used as an input fault feature to train the BTEC. X T Xm×n = Um×n Vn×n (2) m×n

The variation in these normalized fault features with respect to the fault location for AG, ACG, BC, and ABC faults is presented in FIGURE 1 (a)-(d). From FIGURE 1, it is clear that the faulty phase features have values higher than those of the healthy phase features, enabling easier prediction of the fault type through the machine learning technique. VOLUME 6, 2018


III. DESCRIPTION OF TEST SYSTEM AND GENERATION OF DATASET

FIGURE 1. The variation of the normalized fault features with respect to the fault locations for (a) AG fault, (b) BC fault, (c) ACG fault and (d) ABC fault with FR = 0.001 and FIA = 0◦ .

Here, ‘SVF’ stands for the normalized feature of the SVD of the FDOST coefficients. In this paper, when the data processing techniques (i.e., signal processing through the FDOST, data reduction through the SVD, and normalization) are applied to the current signals before the classification stage, the techniques substantially improve the overall quality of the input feature vector. In fact, the matrix reduction techniques can make the hidden features from the decomposed matrix accessible. The obtained results confirm the robustness of the features extracted under different fault conditions. B. CLASSIFICATION USING BTEC

In the BTEC, ‘bagging’ stands for bootstrap aggregation, whereby random samples are drawn through replacing the training datasets. Bagging is a simple method that can be employed to reduce the variance for those machine learning techniques with high variance. Learners can be classified into two categories; i.e., ‘stable’ and ‘unstable’. Stable learners have low variance while unstable learners have high variance. The DT is a type of unstable learner which is sensitive to specific training patterns. If the training pattern is changed (e.g. a tree is trained on a subset of training patterns), the resulting DT can be quite different from the original one. In such a situation, the prediction accuracy of the resulting DT will also change. An individual DT may result in overfitting the training patterns. To overcome this challenge of the DT, a bagged DT can be a good choice. The bagged DT is less concerned about individual DT overfits. It combines the result of many DTs via taking a majority vote of their decisions, which helps reduce the overfitting issue and improve the generalization of the DT. For this reason, the individual DTs are grown deep and the trees are not pruned, resulting in higher variance and lower bias. These important features are used for combining the predictions of DTs in the stage of bagging. More mathematical details of the BTEC have been provided in [32] and [33]. VOLUME 6, 2018

A 400 kV, 50 Hz, three-phase SCTL is modeled and simulated in the PSCAD/EMTDC environment to validate the effectiveness of the proposed scheme for wide variation under fault and system conditions. In power system networks, unsymmetrical faults can be broadly categorized into line-to-ground (LG), line-to-line (LL), line-to-line-to-ground (LLG) and three-phase (LLL) faults. Here, ‘L’ stands for line/phase (i.e. A, B and C) and ‘G’ stands for ground. Therefore, faults can be further subcategorized into LG (AG, BG, and CG), LL (AB, AC, and BC), LLG (ABG, ACG, and BCG) and LLL (ABC) faults. The single line diagram of the test system is shown in FIGURE 2. The datasets of the generators, transformers, loads, parameters for transmission lines, and length of the transmission lines in the test system are presented in [34]. The transmission line between Bus 2 and Bus 8 is compensated via a series capacitor with 40% compensation. To record the three-phase current signal accurately, the Jiles Atherton Current Transformer (CT) with a 1000/5 ratio at 1 kHz sampling frequency (f s ) is utilized [35]. The recorded CT secondary current is then imported into MATLAB where the proposed scheme is then validated. The training and testing datasets required for the assessment of the proposed scheme are generated according to the parameters in TABLE 1. The training dataset includes 10 fault types with wide variation in the fault parameters, accounting for a total number of 24800 fault cases, to form a training dataset. In addition to the fault cases, 7440 no-fault cases are also included in the training dataset. The validity of the proposed scheme is also established with a new testing dataset (17880 cases), including 15880 fault cases and 2000 no-fault cases. The confusion matrix related to the testing cases is depicted in TABLE 2. As shown in TABLE 2, the proposed scheme predicts all the classes with 100% classification accuracy.

FIGURE 2. The single line diagram of the modified WSCC 3-machine 9-bus system.

IV. PROPOSED INTELLIGENT FAULT CLASSIFICATION SCHEME

In this section, a protection framework for the fault detector unit (FDU) and fault classifier unit (FCU) is proposed. 27375


FIGURE 3. The Block diagram of the proposed scheme.

TABLE 1. Attributes for generation of training and testing data set.

data window is created, the SVFs of the three-phase current signal are estimated. Finally, the FDOST-BTEC classifier decides the types of the faults. A. FAULT DETECTOR UNIT

TABLE 2. The confusion matrix for the test dataset.

In the proposed scheme, the detector logic in the existing commercial relay [36] is used. This unit detects the fault when the difference between the present sample and the older 2-cycle sample of the sequence current magnitudes is larger than the current threshold for four consecutive samples. Here, the current threshold of 0.04 p.u. is set. As shown in FIGURE 3, once the fault is detected through the FDU, the activator switch initiates the next stage i.e. the FCU. The rules for fault detection are as follows: dI 1 (n) = ||I1 (n)| − |I1 (n − k)|| dI 2 (n) = ||I2 (n)| − |I2 (n − k)||

(3)

dI 0 (n) = ||I0 (n)| − |I0 (n − k)||

(5)

(4)

where ‘n’ and ‘k’ stand for the present sample and the older 2-cycle sample, respectively. For the sampling frequency of 1 kHz, ‘n’ and ‘k’ starts with 41 and 1, respectively. B. PROPOSED FAULT CLASSIFIER UNIT

The block diagram of the proposed scheme, which is based on the three-phase current at one end, is depicted in FIGURE 3. The main objective of the FDU is to detect the fault and determines the fault inception sample. When the FDU detects an abnormal condition or fault in the protected zone, the activator switch changes its state from being open to being close and initiates the next stage i.e. the FCU. Then, once the fault inception instant is obtained and 1/2 cycle of the 27376

The extracted normalized features are used to test the trained classifier. The data window is 1/2 cycle of power frequency. The training and testing procedures of the proposed scheme are discussed as follows: Steps for the training procedure 1) Simulate all the fault cases in TABLE 1 and capture the three-phase current signal for the training stage of the proposed scheme. VOLUME 6, 2018


2) Estimate the FDOST coefficients using (1) for the individual fault cases immediately after the inception of the fault up to 10 samples. Calculate the SVD value for the already obtained FDOST coefficients of the threephase current signal using (2). 3) Formulate the training matrix through combining the SVD value obtained in Step 2 and the zero sequence current signal for all the fault cases in one single matrix with their respective targets (i.e., fault type). 4) Normalize the training matrix using the min-max normalization technique. 5) Finally, train the FDOST-BTEC fault classifier via the input feature matrix and the target matrix obtained in Step-4. The cross-validation procedure is used to find the appropriate values for the parameters corresponding to the classifier. Steps for the testing procedure 1) Simulate the test cases in TABLE 2. 2) Follow Steps 2-4 of the training procedure to prepare the input feature vector. 3) Feed the features and the zero sequence current into the trained classifier to test and classify the fault types. The fault detection time (FDT) represents the difference between the fault detection point and fault inception point. Similarly, the fault classification time (FCT) represents the difference between fault the classification point and fault inception point. V. SIMULATION RESULTS AND DISCUSSION

In this section, the proposed scheme is analyzed in the modified WSCC 3-machine 9-bus system as discussed in [34]. The scheme is critically examined through simulation studies under various fault and system parameters such as the fault type (FT), fault location (FL), FR, FIA, close-in fault, noise, CT saturation, and compensation level. The validation results for the different test cases are discussed in the following subsections.

TABLE 3. The performance during variation of FR, FIA, and FL.

scheme, confirms that the scheme can detect and classify the faults within 1/2 cycle of power frequency (≤10 ms). B. PERFORMANCE DURING CLOSE-IN FAULT

In this section, the effectiveness of the proposed scheme is tested during close-in faults with a new test dataset. While keeping the same training dataset as shown in TABLE 1, this new test dataset involves all of the ten fault types, four FRs (5, 25, 50 and 100), and four FIAs (30◦ , 60◦ , 90◦ and 270◦ ) occurring at 1, 2, 3 and 4 km far from the relay bus. The classification accuracy of the proposed scheme is approximately 100% for all the cases of the close-in faults. C. PERFORMANCE DURING REVERSE POWER FLOW

A. PERFORMANCE DURING VARIATION IN FAULT RESISTANCE, FAULT INCEPTION ANGLE, AND FAULT LOCATION

To investigate the performance of the proposed scheme under reverse power flow, new test patterns are generated by varying the load angles of the G2 from −10◦ to −20◦ and those of the G3 from −20◦ to −10◦ while keeping the same training pattern as shown in Table 1. It is found that the classification accuracy remains the same.

The performance of the proposed scheme is validated under different fault conditions because the nature and amplitude of the fault current depend on the fault parameters [1]. Feature extraction based on a combination of the SVD and FDOST has the ability to nullify the effects of the fault parameters as shown in TABLE 3. In the table, the time required to classify the faulty phases (i.e., FCT) is less than 1/2 cycle of power frequency. It is worth noting that the proposed scheme is highly accurate and it is independent of variations in the fault parameters. The three-phase current waveform during the CG fault at 25 km with FR = 5 and FIA = 10◦ is presented in FIGURE 4(a). The detection and classification input features are shown in FIGURE 4 (b) and (d). As shown in FIGURE 4 (c) and (e), the response delivered by the proposed

The behavior of the current signal is not purely sinusoidal due to the various distortion generators present in the power system network such as cables, transducers, analog to digital convertors, etc. [37]. The distortion or noise present in the current signals may affect the performance of the scheme proposed in this paper. Therefore, the performance of the scheme is also validated against different values for the signal to noise ratio (SNR). As discussed in [38], the typical noise level is more than 27 dB, but, in most cases, the SNR of 40 dB is common in practice. The same training dataset in TABLE 1 is used, whereby the dataset is free from any type of distortion. On the other hand, to generate a noisy test

VOLUME 6, 2018

D. PERFORMANCE DURING DISTORTED SIGNALS

27377


FIGURE 4. The performance of the proposed scheme during the CG fault at 25 km with FR = 5 and FIA = 10◦ (a) Current waveform, (b) Detection input feature, (c) Response of the FDU, (d) Classification input feature waveform and (e) Response of the FCU.

dataset, the white Gaussian noise of different SNR values is added to the test patterns. The results are shown in TABLE 4. As observed from this table, the detection and classification time is less than 1/2 cycle. Further, to test the validity of the proposed scheme, an ABG fault is created at 75 km far from the relaying end with FR = 50 and FIA = 210◦ . The Gaussian noise with the SNR value of 20 dB is added to the three-phase fault current. The three-phase current signal, input features, and output of the FDU and FCU are presented in FIGURE 5. As shown in FIGURE 5, it can be concluded that the proposed scheme detects and classifies the fault in 6 ms and 8 ms respectively. During CT saturation, the response of the current signal is highly distorted and this creates problems in digital current-based relaying schemes. To examine the effect of CT saturation, the CT core is modeled based on the Jiles-Atherton parameter discussed in [35]. The main cause of CT saturation is the secondary burden impedance of CTs. Therefore, the variation in the burden impedance is employed to examine the CT-saturation condition. It can be concluded from TABLE 5 that the proposed scheme does not depend on the CT-saturation condition. The table also shows that the scheme correctly identifies and classifies the fault in less than 1/2 cycle. The proposed scheme is also tested under severe CT-saturation conditions. An AB fault at 105 km far from the 27378

TABLE 4. The performance of the proposed scheme under noisy condition (FL = 75 km).

relay bus with FR = 50, FIA = 110◦ , and the CT secondary burden of 100 is created as an example. It can be observed from FIGURE 6 (a) that the current is distorted during CT saturation. The detection and classification input features are presented in FIGURE 6(b) and (d). As shown in FIGURE 6 (c) and (e), the proposed scheme detects and classifies the fault in 5 ms and 7 ms, respectively. VOLUME 6, 2018


FIGURE 5. The performance of the proposed scheme during the ABG fault at 75 km with FR = 50 and FIA = 210◦ (a) Current waveform, (b) Detection input feature, (c) Response of the FDU, (d) Classification input feature waveform and (e) Response of the FCU.

TABLE 5. The performance during severe CT saturation (FR = 50).

TABLE 6. The performance during series capacitor placed in midpoint.

The performance of the proposed scheme is also validated against varying compensation levels, including 20%, 40%, and 60%. The test results are depicted in TABLE 7. It can be observed from the table that the proposed scheme is robust to wide variations in the compensation levels. E. PERFORMANCE DURING VARIATION IN LOCATION AND COMPENSATION LEVEL OF SERIES CAPACITOR

F. COMPUTATION TIME

To evaluate the effectiveness of the proposed scheme for variations in the position of the series capacitor, the capacitor is placed at the midpoint of the transmission line between Bus 7 and Bus 8. The test results for the faults before and after the capacitor are shown in TABLE 6, which confirms the accurate and reliable operation of the proposed scheme.

In the case of 1/2 cycle of the post-fault current signal with sampling frequency of 1 kHz, feature extraction through the combination of the FDOST and SVD takes 1.1 ± 0.3 ms. The computation time of the BTEC with three input features corresponding to three phases is 0.7 - 0.85 ms. Therefore, the protection in the SCTL is completed within 5-10 ms. The hardware information of the host

VOLUME 6, 2018

27379


FIGURE 6. The Performance of the proposed scheme during the AB fault at 105 km with FR = 50, FIA = 110◦ and 100 secondary burden impedance (a) Current waveform (Phase A), (b) Detection input feature, (c) Response of the FDU, (d) Classification input feature waveform and (e) Response of the FCU.

TABLE 7. The performance during variation in compensation level.

computer is Intel(R) Xeon(R) CPU E3-1225 v5@ 3.30 GHz processor with 8.00 GB of RAM. G. COMPARISON WITH OTHER EXISTING SCHEMES

The main goal of ensemble methods is to develop a predictive model through integrating individual models. Compared to individual or single classifiers, such as neural networks and SVMs, ensemble methods can considerably improve the classification performance. Therefore, in this section, the 27380

TABLE 8. The obtained classification accuracy (C.A) using different classifiers.

performances of different ensemble methods are evaluated. Of these the ensemble methods, the Bagged Tree (BTEC) is selected for the purpose of classification in the proposed method. For more evaluation, the performances of the ensembles methods are compared to the performance of the SVMs. To choose the best parameters of the various ensemble classifiers (e.g., RUSBoosted Tree, Subspace kNN, Subspace Discriminant, Bagged Tree, and Boosted Tree), the training matrix is tested through 10-fold cross validation. The input VOLUME 6, 2018


TABLE 9. Comparative analysis of proposed scheme with other schemes.

features are also tested through the SVM classifier. The SVM needs the selection of the kernel function, kernel parameter, and cost parameter (C). The results are presented in TABLE 8. It can be clearly observed from TABLE 8 that the BTEC shows 100% accuracy for all the tested cases. Thus, in this paper, the BTEC is chosen for the purpose of fault classification. In this section, the proposed scheme is compared with the existing similar schemes that utilize pattern recognition tools for the purpose of fault detection and classification. TABLE 9 presents the results of the comparisons made. From Table 9, it can be observed that the other schemes either require 1 cycle of the current signal or both the voltage and current signals while the proposed scheme requires only 1/2 cycle of the current signal. Furthermore, the majority of these other schemes do not take the effects of CT saturation, noise and load flow direction account whereas the proposed scheme does so. Additionally, the proposed scheme shows 100% classification accuracy. It detects and classifies the faults within 5-10 ms (less than 1/2 cycle of 50 Hz system frequency). The values of classification accuracy mentioned in Table 9 are those reported in the respective references. VI. CONCLUSION

A combination of the FDOST and SVD with the BTEC-based protection scheme has been presented in this paper for the purpose of fault classification in the SCTL. VOLUME 6, 2018

Based on a large number of fault simulation cases under wide variation in fault and system parameters, the following conclusions can be drawn:1) The accuracy of fault detection and classification is quite high for all the test cases. 2) The amount of memory needed by the FDOST feature extraction method is low as the scheme requires only three fault features from the three fault currents. 3) The proposed scheme is free from synchronization error due to capturing only one end of the current signal. 4) The proposed scheme is robust to noise and CT-saturation conditions. 5) The proposed scheme is based on the current signal; therefore, the performance of the scheme is not affected by the voltage inversion condition. REFERENCES [1] B. Vyas, R. P. Maheshwari, and B. Das, ‘‘Protection of series compensated transmission line: Issues and state of art,’’ Elect. Power Syst. Res., vol. 107, no. 1, pp. 93–108, 2014. [2] P. M. Anderson, Power System Protection. New York, NY, USA: IEEE Press, 1999. [3] A. G. Phadke and J. S. Thorp, Computer Relaying for Power Systems. Chichester, U.K.: Wiley, 1988. [4] P. M. Anderson, ‘‘Series compensated line protection,’’ in Power System Protection. New York, NY, USA: Wiley, 1999, pp. 575–642. [5] F. Plumptre, M. Nagpal, C. Xing, and M. Thompson, ‘‘Protection of EHV transmission lines with series compensation: BC Hydro’s lessons learned,’’ in Proc. 62nd Annu. Conf. Protect. Relay Eng., 2009, pp. 288–303. 27381


[6] IEEE Guide for Protective Relay Application to Transmission-Line Series Capacitor Banks, Standard C37.116, 2007. [7] Applying the SEL-321 Relay on Series-Compensated Systems, Schweitzer Eng. Lab., Inc., Pullman, WA, USA, 2011 [8] M. E. Erezzaghi, P. A. Crossley, and R. Elferes, ‘‘Design and evaluation of an adaptive distance protection scheme suitable for series compensated transmission feeders,’’ in Proc. 8th Inst. Elect. Eng. Int. Conf. Develop. Power Syst. Protect., vol. 2, Apr. 2004, pp. 45–453. [9] F. Ghassemi, J. Goodarzi, and A. T. Johns, ‘‘Method to improve digital distance relay impedance measurement when used in series compensated lines protected by a metal oxide varistor,’’ IEE Proc.-Gener., Transmiss. Distrib., vol. 145, no. 4, pp. 403–408, Jul. 1998. [10] Line Current Differential Protection and Automation System, SEL-311L Data Sheet, Schweitzer Eng. Lab., Inc., Pullman, WA, USA, 2011. [11] B. Kasztenny, I. Voloh, and E. A. Udren, ‘‘Rebirth of the phase comparison line protection principle,’’ in Proc. 59th Annu. Conf. Protect. Relay Eng., College Station, TX, USA, 2006. [12] J. Upendar, C. P. Gupta, G. K. Singh, and G. Ramakrishna, ‘‘PSO and ANN-based fault classification for protective relaying,’’ IET Gener., Transmiss. Distrib., vol. 4, no. 10, pp. 1197–1212, Oct. 2010. [13] B. Y. Vyas, B. Das, and R. P. Maheshwari, ‘‘Improved fault classification in series compensated transmission line: Comparative evaluation of chebyshev neural network training algorithms,’’ IEEE Trans. Neural Netw. Learn. Syst., vol. 27, no. 8, pp. 1631–1642, Aug. 2016. [14] A. Swetapadma, P. Mishra, A. Yadav, and A. Y. Abdelaziz, ‘‘A nonunit protection scheme for double circuit series capacitor compensated transmission lines,’’ Elect. Power Syst. Res., vol. 148, pp. 311–325, Jul. 2017. [15] P. K. Dash, S. R. Samantaray, and G. Panda, ‘‘Fault classification and section identification of an advanced series-compensated transmission line using support vector machine,’’ IEEE Trans. Power Del., vol. 22, no. 1, pp. 67–73, Jan. 2007. [16] U. B. Parikh, B. Das, and R. P. Maheswari, ‘‘Fault classification technique for series compensated transmission line using support vector machine,’’ Int. J. Elect. Power Energy Syst., vol. 32, pp. 629–636, Jul. 2010. [17] A. Yadav and A. Swetapadma, ‘‘Enhancing the performance of transmission line directional relaying, fault classification and fault location schemes using fuzzy inference system,’’ IET Gener. Transmiss. Distrib., vol. 9, no. 6, pp. 580–591, 2015. [18] A. K. Pradhan, A. Routray, S. Pati, and D. K. Pradhan, ‘‘Wavelet fuzzy combined approach for fault classification of a series-compensated transmission line,’’ IEEE Trans. Power Del., vol. 19, no. 4, pp. 1612–1618, Oct. 2004. [19] B. Das and J. V. Reddy, ‘‘Fuzzy-logic-based fault classification scheme for digital distance protection,’’ IEEE Trans. Power Del., vol. 20, no. 2, pp. 609–616, Apr. 2005. [20] H. Eristi, ‘‘Fault diagnosis system for series compensated transmission line based on wavelet transform and adaptive neuro-fuzzy inference system,’’ Measurement, vol. 46, no. 1, pp. 393–401, 2013. [21] P. K. Dash, A. K. Pradhan, and G. Panda, ‘‘A novel fuzzy neural network based distance relaying scheme,’’ IEEE Trans. Power Del., vol. 15, no. 3, pp. 902–907, Jul. 2000. [22] Z. Moravej, M. Khederzadeh, and M. Pazoki, ‘‘New combined method for fault detection, classification, and location in series-compensated transmission line,’’ Elect. Power Compon. Syst., vol. 40, no. 9, pp. 1050–1071, 2012. [23] U. B. Parikh, B. R. Bhalja, Jr., R. P. Maheshwari, and B. Das, ‘‘Decision tree based fault classification scheme for protection of series compensated transmission lines,’’ Int. J. Emerg. Electr. Power Syst., vol. 8, no. 6, 2007, Art. no. 1. [24] M. M. Taheri, H. Seyedi, and B. Mohammadi-ivatloo, ‘‘DT-based relaying scheme for fault classification in transmission lines using MODP,’’ IET Gener. Transmiss. Distrib., vol. 11, no. 11, pp. 2796–2804, 2017. [25] A. Jamehbozorg and S. M. Shahrtash, ‘‘A decision-tree-based method for fault classification in single-circuit transmission lines,’’ IEEE Trans. Power Del., vol. 25, no. 4, pp. 2190–2196, Oct. 2010. [26] H. Wang and W. W. L. Keerthipala, ‘‘Fuzzy-neuro approach to fault classification for transmission line protection,’’ IEEE Trans. Power Del., vol. 13, no. 4, pp. 1093–1104, Oct. 1998. [27] B. Y. Vyas, R. P. Maheshwari, and B. Das, ‘‘Improved fault analysis technique for protection of Thyristor controlled series compensated transmission line,’’ Int. J. Elect. Power Energy Syst., vol. 55, pp. 321–330, Feb. 2014. 27382

[28] S. R. Samantaray and P. K. Dash, ‘‘Pattern recognition based digital relaying for advanced series compensated line,’’ Int. J. Elect. Power Energy Syst., vol. 30, no. 2, pp. 102–112, 2008. [29] R. G. Stockwell, ‘‘A basis for efficient representation of the S-transform,’’ Digit. Signal Process., vol. 17, no. 1, pp. 371–393, 2007. [30] Y. Wang and J. Orchard, ‘‘Fast discrete orthonormal Stockwell transform,’’ SIAM J. Sci. Comput., vol. 31, no. 5, pp. 4000–4012, 2009. [31] Z. Moravej, M. Pazoki, and M. Khederzadeh, ‘‘New pattern-recognition method for fault analysis in transmission line with UPFC,’’ IEEE Trans. Power Del., vol. 30, no. 3, pp. 1231–1242, Jun. 2015. [32] L. Breiman, ‘‘Bagging predictors,’’ Mach. Learn., vol. 24, no. 2, pp. 123–140, 1996. [33] R. Polikar, ‘‘Ensemble based systems in decision making,’’ IEEE Circuits Syst. Mag., vol. 6, no. 3, pp. 21–45, 3rd Quart., 2006, doi: 10.1109/MCAS.2006.1688199. [34] P. K. Nayak, A. K. Pradhan, and P. Bajpai, ‘‘A fault detection technique for the series-compensated line during power swing,’’ IEEE Trans. Power Del., vol. 28, no. 2, pp. 714–722, Apr. 2013. [35] A. A. Abdoos, ‘‘Detection of current transformer saturation based on variational mode decomposition analysis,’’ IET Gener., Transmiss. Distrib., vol. 10, pp. 2658–2669, Aug. 2016. [36] GE Multilin, ON, Canada. (2009). Manual P/N: 1601-0089-F5 (GEK-105440D). [Online]. Available: http://www.gedigitalenergy. com/products/manuals/d60/d60manf5.pdf [37] A. Medina and R. Cisneros-Magana, ‘‘Time-domain harmonic state estimation based on the Kalman filter poincare map and extrapolation to the limit cycle,’’ IET Gener., Transmiss. Distrib., vol. 6, no. 12, pp. 1209–1217, Dec. 2012. [38] P. F. Ribeiro, C. A. Duque, P. M. Ribeiro, and A. S. Cerqueira, Power Systems Signal Processing for Smart Grids. Hoboken, NJ, USA: Wiley, Sep. 2013.

PRAVEEN KUMAR MISHRA received the B.E. degree in electrical and electronics engineering from the Bhilai Institute of Technology, Durg, India, in 2011, and the M.Tech. degree in power system engineering from NIT Warangal, Warangal, in 2013. He is currently pursuing the Ph.D. degree with NIT Raipur, Raipur. He was an Assistant Professor with the Department of Electrical and Electronics Engineering, School of Engineering, OP Jindal University, Raigarh, from 2013 to 2015. His research interests include power system protection and computational intelligence applications in transmission-line protection. ANAMIKA YADAV (M’09–SM’14) received the B.E. degree in electrical engineering from RGPV, Bhopal, in 2002, the M.Tech. degree in integrated power system from V.N.I.T., Nagpur, India, in 2006, and the Ph.D. degree from CSVTU, Bhilai, India, in 2010. She was an Assistant Engineer with the Chhattisgarh State Electricity Board, Raipur, from 2004 to 2009. She has been an Assistant Professor with the Department of Electrical Engineering, NIT Raipur, Raipur, since 2009. Her research interests include the application of soft computing techniques to power system protection, FACTS, and smart grid. She received the Institution of Engineers India Young Engineers Award from the Electrical Engineering Division from 2015 to 2016. MOHAMMAD PAZOKI received the B.Sc., M.Sc., and Ph.D. degrees in electrical engineering from Semnan University, Semnan, Iran, in 2008, 2010, and 2014, respectively. During 2013–2014, he was a Visiting Scholar with The University of Auckland, Auckland, New Zealand. He is currently an Assistant Professor with the School of Engineering, Damghan University, Damghan, Iran. His research interests include power system protection, FACTS devices, pattern recognition application to power system, and power quality monitoring.

VOLUME 6, 2018