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A Novel Structure for Rayleigh Channel Generation with consideration of the implementation in FPGA Pengda Huang

Abstract—For reducing the hardware resource consumption, we propose a novel method of generating Rayleigh channels. First, we propose a basic channel generator built on a recursive structure. Via investigating the dynamic feature of the recursive structure, we find the basic generator is instable. The instability means that errors occurring in the fixed-point computation on FPGA will be accumulated and thus induce the failure of the channel generation eventually. To solve this problem, we propose an improved Rayleigh channel generator with the guaranteed stability. The improved generator manages to preclude the risk of accumulating errors in the fixed-point computation on FPGA. Experiment results show that the memory resources consumed in the proposed generator is one eighth of that in traditional generators, and the accuracy of the generated channel is still guaranteed.

I. I NTRODUCTION Channel simulation provides an effective method of evaluating the performance of the wireless communication systems. Therefore, the simulation of fading channels is widely studied [1]–[5]. In [1], the sum-of-sinusoid based Rayleigh channel generation method was improved which enhanced the randomness of the generated channels. The determination of parameters for channel generation was discussed in [2]. In [3], a VLSI platform was used to generate Rayleigh channels. Due to its popularity, FPGA provides an effective method of generating fading channels. On a single FPGA chip, the generation of one Rayleigh channel was investigated in [4]. According to [5], a 3 × 4 MIMO channel was generated on a FPGA chip. The hardware resource consumption is an important issue for assessing channel generation methods. The methods being able to effectively save FPGA resources are reported in a limited number. According to [6], [7], multiple cosine lookup tables were built to implement the sum-of-sinusoid based channel generation on a FPGA chip. The multiple lookup tables consume a large number of memories (as shown in Table. I) which are very precious for the most of FPGA chips. Nasr and Daneshard [5] combined 64 FPGA chips to implement a scalable channel emulator. The high cost will limit the popularity of these channel generators. We propose a novel Rayleigh channel generator within the sum-of-sinusoid scheme. This generator is based on a recursive structure which can significantly reduce the memory resource consumption in FPGA. The recursive structure is proved to be stable which keeps the generator from amplifying the computation errors in FPGA, e.g. quantization error, thermal noise caused error. To save the hardware resources further, a time division (TD) scheme is applied to the recursive structure.

The remainder of this paper is organized as follows: The background of Rayleigh channel generation is introduced in Section II. In Section III, a basic form of a novel channel generator is proposed. In Section IV, the stability of the basic recursive structure is investigated after which an improved structure with the guaranteed stable feature is proposed. Section V presents experiment results, and conclusions are provided in Section VI. II. BACKGROUND

OF

R AYLEIGH C HANNEL G ENERATION

Due to the wide existence of Rayleigh fading, the simulation of Rayleigh channel is widely studied [1]–[3], [8]. To obtain a Rayleigh channel, two orthogonal Gaussian random processes, Q Q I I rR and rR , are generated first. The envelope of rR and rR is Rayleigh distributed. Q I In an isotropic radiation scenario [8], the rR and rR are generated by the equations as follows, P 1 X I cos(2πfM (cos(αp ))t + φp ), r (t) = R P p=1 , (1) P 1 X Q sin(2πfM (cos(αp ))t + φp ) rR (t) = P p=1

where P denotes the number of the sinusoids which characterizes the number of the paths in a fading channel; αp represents the incidence angle of the p-th path; φp is the initial phase of the p-th sinusoid which is uniformly distributed in the range [0, π]; and fM denotes the maximum Doppler value. According to [6], [7], [9], 2 × P lookup tables are needed to generate the 2 × P sinusoids for implementing (1). The construction of the multiple lookup tables consumes the large number of memories in FPGA, especially for the generation of the highly accurate channel. III. T HE N OVEL R AYLEIGH C HANNEL G ENERATOR

To effectively reduce the memory consumption, we propose a novel method to generate the sinusoids, rather than by looking up sine/cosine tables. The novel method is implemented by a recursive structure. We will introduce a basic recursive channel generator in this section. A. The iterative method of sinusoid generation On the Cartesian plane, the two points, (cos(nωp ), sin(nωp )) and (cos(n + 1)ωp , sin(n + 1)ωp ), have the same radius, but the different phase angle. The point (cos(n + 1)ωp , sin(n + 1)ωp ) can be obtained via rotating

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(cos(nωp ), sin(nωp )) by the angle of ωp . This rotation is mathematically described by cos(ωp t + φp ) = cos(ωp ) cos(ωp t − ωp + φp ) − sin(ωp ) sin(ωp t − ωp + φp ) , (2) sin(ωp t + φp ) = cos(ωp ) sin(ωp t − ωp + φp ) + sin(ωp ) cos(ωp t − ωp + φp )

where ωp = 2πfM T cos αp and T denotes the time interval between two adjacent rotations. For simplicity, we use x(n) and y(n) to denote the sine and cosine value at the n-th time instance on the p-th sinusoid, and x(n + 1) and y(n + 1) are the values at the (n + 1)-th time instance. Therefore, The equation (2) is simplified as, x(n) x(n + 1) cos ωp − sin ωp . (3) = y(n) sin ωp cos ωp y(n + 1)

From (3), only one lookup table is needed which is responsible for initializing the coefficients in (3). B. Two approaches of implementing the rotation (3) 1) CORDIC based method: The CORDIC algorithm [10] was originally designed to implement the rotation which computation only relies on sequential operations of bits shifting and addition. The computation of (2) is essentially an operation of rotation which can thus be implemented via the CORDIC algorithm. According to [10], the rotation by angle ωp is completed via the multiple sequential steps of sub-rotation. Assume there are L sub-rotations. The rotation angle at the l-th (1 ≤ l ≤ L) sub-rotation is arctan 2−l . Each sub-rotation is implemented by the equation as follows, −l x(n)l+1 = x(n)l − sign(z(n)l )2 y(n)l . (4) y(n)l+1 = y(n)l + sign(z(n)l )2−l x(n)l −1 −l z(n)l+1 = z(n)l − sign(z(n)l ) tan (2 ).

where (x(n)l , y(n)l ) denotes the intermediate value of x and y after the l-th sub-rotation. z(n)l is an auxiliary variable. To perform the CORDIC algorithm, we initialize the variables as follows, x(n)0 = x(n), y(n)0 = y(n) and z(n)0 = ωp . After the L sub-rotations described by (4), the transformation from (x(n), y(n)) to (x(n + 1), y(n + 1)) is complete. Due to sequential operations of the sub-rotation, the number of the consumed time slices is large. Thus, the CORDIC algorithm is not the main objective to be investigated in this paper, but still a choice to implement the channel generator based on the recursive structure. 2) Direct rotation method: The rotation by the angle ωp can be implemented in one step on FPGA. The one-step rotation can save time slice and thus improves the throughput of the channel generation. The channel generation is divided into two main steps, initialization and iterative computation. In initialization, the coefficients in (3) are read from a cosine lookup table, and x and y are initialized by x(0) = cos(0) and y(0) = sin(0). After the initialization, the data of the two

orthogonal sinusoids x and y are computed in the iterative way as shown in (3). Indeed, the advantage of recursive structures on saving hardware resource is widely recognized, while the stability problem is the main issue worth studying. IV. T HE I MPROVED S INUSOID G ENERATOR BASED ON A S TABLE I TERATION S TRUCTURE Due to the noise and the limited bit resolution, there exists errors in quantizing the numbers on FPGA. Instable recursive computation structures are sensitive to the errors. In this section we investigate stability of the basic recursive structure presented in Section III, and propose an improved structure which precludes the amplification of the error. A. Stability analysis in the recursive computation structure As a result of the finite-bit expression of channel data, the clock drifting and thermal noise, the computation error is unavoidable in the channel data generation. If the error is not suppressed in the recursive computation, the error will be accumulated and eventually induce the failure of channel generation. To analyze the stability, we convert (3) into a differential equation. Via studying the dynamic features of the differential equation, we can know the stability of (3). The differential equation corresponding to (3) is given by x x˙ cos ω0 sin ω0 . (5) = y y˙ − sin ω0 cos ω0 where ω0 ∈ {ωp , p = 1, 2, · · · , P } Let ∆c and ∆s denote the error in quantizing cos ω0 and sin ω0 respectively. After the quantization, the values of the coefficients in (5) are denoted by cos ω ∗ and sin ω ∗ which are determined by cos ω ∗ = cos ω0 + ∆c (6) sin ω ∗ = sin ω0 + ∆s, where cos ω0 ≫ ∆c and sin ω0 ≫ ∆s. We assume there are W bits used to quantize and W is no less than 8. According to [11], ∆c and ∆s uniformly distribute in [− 2W1+1 , 2W1+1 ], that is, ∆c, ∆s ∼ U([− 2W1+1 , 2W1+1 ]).

Fig. 1.

Illustration of the one-step rotation with the quantization error

Fig. 1 shows an example of how the quantization error ∆c and ∆s affect the rotation results. In Fig. 1, the zn−1 denotes the vector at the (n − 1)-th time slot, that is, zn−1 = xn−1 + jyn−1 . zn is the supposed rotation result in the ideal case if there is no errors in quantizing the coefficients. zn∗ is the actual rotation result.

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We use ω ∗ to denote the angle between zn−1 and zn∗ . ∆ω measures the difference between ω0 and ω ∗ , that is, ∆ω = ω ∗ − ω0 . The amplitude of zn∗ is denoted by r∗ , r∗ = |zn∗ |. Thus, with the consideration of the quantization error, the differential equation is rewritten as r∗ cos ω ∗ sin ω ∗ x x˙ . (7) = − sin ω ∗ cos ω ∗ y y˙ r0 ∗

Next, we calculate r and ∆ω first. Then we determine the distributions of r∗ and ∆ω. Based on the geometric relationship as shown in Fig. 1, we have ( ∆c + r0 = r∗ cos ∆ω , (8) ∆s = r∗ sin ∆ω where r0 is the amplitude of zn−1 . Because ∆c and ∆s are independent to each other and both uniformly distribute in [− 2W1+1 , 2W1+1 ], the joint distribution p(∆c, ∆s) is determined by p(∆c, ∆s) = 22W , where − 2W1+1 ≤ ∆c ≤ 2W1+1 and − 2W1+1 ≤ ∆s ≤ The Jacobian determinant of (8) is calculated by ∂∆c ∂∆c ∂r ∗ ∂∆ω |J| = ∂∆s ∂∆s ∂r ∗

(9) 1 2W +1 .

∂∆ω

(10)

= r∗ .

With (8), (9) and (10), the joint probability p(r∗ , ∆ω) is determined by p(r∗ , ∆ω) = |J|p(∆c(r∗ , ∆ω), ∆s(r∗ , ∆ω)) = r∗ 22W ,

(11)

∗ ∗ where, rm ≤ r∗ ≤ rM , ∆ωm ≤ ∆ω ≤ ∆ωM , q 2 2 ∗ rm = 1 − 2W1+1 + 2W1+1 q 2 2 ∗ rM = 1 + 2W1+1 + 2W1+1 1 ∆ωm = arctan r0 2W−1 +1 −1 , and∆ωM = arctan r 2W +1 +1 . 0 (12) From (11), the PDF of ∆ω is determined by ∗ Z rM p(r∗ , ∆ω)dr∗ p(∆ω) = ∗ rm (13) 1 ∗ 2 ∗ 2 2W = ((rM ) − (rm ) )2 . 2 From (13), we can observe that ∆ω uniformly distributes in [∆ωm , ∆ωM ]. According to (12), when W ≥ 8 and r0 = 1, the values of both ∆ωm and ∆ωM are very small. Therefore, ∆ω is essentially a tiny disturbance on the ideal frequency ω0 . The disturbance ∆ω is uniformly distributed. Based on the results in [1], even though there exists an uniformly distributed weak perturbation on the frequency of each sinusoid, the spectrum and the distribution of the generated fading channel stay the same. Thus, the quantization error caused perturbation does not degrade the accuracy of the spectrum of the generated channels.

However, ∆s and ∆c change the the amplitude r∗ and this change will be amplified in the recursive computation by (7). According to (7), the amplitude of the vector z eventually approaches to infinity large for r∗ > r0 or becomes zero for r∗ < r0 . B. Improved recursive channel generator In this subsection, we investigate the stability problem on the amplitude r∗ . For the convenience for analysis, we study the stability problem in polar coordinates. We assume an auxiliary variable z which real and imaginary parts are x and y respectively, that is, z = x + jy. In polar coordinates z is written as z = r · ejω where x = r cos ω and y = r sin ω. Furthermore, the differential equation (7) in a polar coordinate is rewritten as z˙ = z ·

r∗ jω∗ e . r0

(14)

From (14), the amplification on the amplitude error because ∗ of rr0 is easily observed. The error amplification will induce the failure of the channel generation in long term. To solve the problem, we add a negative feedback item (β(r02 − r2 )z) to z, that is, r∗ ∗ (15) z˙ = z + β(r02 − r2 )z · ejω . r0

where the constant β is positive and much smaller than r, β ≪ r. From (15), the derivatives of x and y are calculated by r∗ (1 + βr02 ) cos ω ∗ sin ω ∗ x x˙ = − sin ω ∗ cos ω ∗ y y˙ r0 ∗ 2 2 ∗ ∗ r (x + y ) cos ω sin ω x − . − sin ω ∗ cos ω ∗ y r0 (16) With (16), the derivative of r can be calculated as follows, p ′ r˙ = x2 + y 2 1 (2xx˙ + 2y y) ˙ = p 2 2 x + y2 ∗ 2 2 (a) rr (1 + β(r0 − r )) cos ω ∗ , = r0

(17)

where (a) follows (16) and 0 < ω ∗ < π2 . To calculate the fixed point of r, we solve the equations r˙ = 0 which solutions are given by ( r1 = q 0 . (18) r2 = β1 + r02 Combining (17) and (18), which is described by r˙ > 0 for r˙ < 0 for r˙ = 0 for

we can find the behavior of r r1 < r < r2 r > r2 . r = r2

(19)

According to (19), when r1 < r < r2 , the trajectories of z move away from the origin point (0, 0) due to r˙ > 0. When

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D

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It e r . S t r.

x (n )

y (n )

Block diagram of the novel structure for generating fading channels

r > r2 , the trajectories move towards the origin point for r˙ < 0. Based on the observations, the trajectories converge to the circle with radius of r2 . Thus, we conclude that r1 = 0 is an unstable fixed point and r2 is a stable one. Based on the analysis, the iteration structure presented by (16) is able to generate the two orthogonal sinusoids which amplitude is stable at r2 . From (18), since r2 is determined by β and r0 , we can control the amplitude of the generated sinusoid by modifying the values of β and r0 . Using the improved recursive structure, we can generate a fading channel with one cosine lookup table which is used for initializing the recursive structure of (16) C. Application of Time Division Scheme To save the hardware resources further, we apply the time division (TD) scheme on the generation of the fading channels. Using the TD scheme, we generate the multiple sinusoids with one recursive structure. The success of this application is based on the fact that the maximum Doppler in a fading channel is far smaller than the clock frequency of FPGA. Without loss of generality, we consider a specific value of the maximum Doppler which is set to be 1kHz, fM = 1kHz. The clock frequency of FPGA is assumed to be 20M Hz. Indeed, 1kHz is large enough to cover the range of Doppler values even for the high speed vehicles. The clock frequency of the FPGA chips on the market is higher than 20M Hz in most cases. There are 10 pairs (P = 10) of cosine and sine sinusoids which are summed to generate a Rayleigh channel. In the isotropic fading channel model, the frequencies of the 10 pairs of sinusoids are calculated by fp = fM cos πp 20 , p ∈ {0, 1, · · · , 9}. At each sinusoid, the data are updated periodically. Let f U (p) denote the data update frequency for generating the

p-th sinusoid. To generate different sinusoids, the iterative structure is driven to work at different update frequencies, f U (p1 ) 6= f U (p2 ) for p1 6= p2 . For each sinusoid component, the update frequency f U (p) is calculated by U f U (p) = fM fp /fM .

(20)

U where fM denotes the maximum update rate. From (20), f U (p) is proportional to fp which means the sinusoid with the larger Doppler needs to be generated at the higher rate. Furthermore, since the update frequencies are different from each other, there exists the risk that two different sinusoids try to update data in the same time slot. To solve this potential conflict, we add a priority setup module to assign the different priorities to sinusoid generation modules involved.

D. Block diagram of the proposed channel generator Fig.2 presents the block diagram of the proposed Rayleigh fading channel generator. In the middle of Fig.2, the orange part shows how the recursive structure works in the timedivision mode. The module of Multi-phase Generator provides 10 timing control signals at the periods of f1p . The control signal, which is output of the Multi-phase Generator module, is used to request the recursive structure to update data. To preclude the conflicts of the control signals, Priority Setup module is responsible for coordinating the update request conflicts according to the priority levels of the sinusoid generation modules. The output from the Priority Setup module serves two functions: commanding Recursive Sinusoid Generator module to update data; and synchronizing the different components of the recursive structure. In Fig. 2, the left part with green background shows the components for stabilizing the recursive structure. The block

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on the right corner with a ‘*’ marker shows the basic recursive structure. V. E XPERIMENTS

AND

S IMULATIONS

We test the proposed Rayleigh channel generator in the ISE Simulator which is based on the FPGA chip Virtex4 VFX100FFG1517. As a reference, the fading channels in real numbers are generated on MATLAB. Furthermore, the channel generation based on lookup table is also tested. We evaluate the performance of our proposed method in terms of distribution and the autocorrelation of the fading channel. In the experiments we generate 107 channel data. The number of sinusoids is 8. The number of the bits for quantizing each data is 10. 0.03

Histogram for Proposed Method Histogram for Lookup−table Method Theorical PDF

PDF of Rayleigh p(x)

0.025

and the black star one is from the lookup-table method. The blue curve is the result generated by real numbers on MATLAB. From Fig. 4, the autocorrelation curve for the proposed method matches the one generated by real numbers. TABLE I R AYLEIGH CHANNEL GENERATOR HARDWARE CONSUMPTION COMPARISON WITH CONVENTIONAL STRUCTURE

Iter. Str. Lookup T. Total

Flip-Flops 996 589 84352

RAMB16s 1 8 376

LUTs 922 10232 84352

Slices 725 6312 42176

DSP48s 3 2 160

Table I lists comparison on the consumed hardware resource of FPGA. The numbers in the table are from the reports by the ISE simulator. From Table I, the number of the memory resource used in the proposed channel generator is 18 of that in the lookup table based generator. VI. C ONCLUSION

0.02

0.015

0.01

0.005

0

0

0.2

0.4

0.6

0.8

1

x

Fig. 3.

Histogram of the envelope of simulated Rayleigh fading data.

Fig. 3 presents the comparison between the PDF curves generated by the proposed recursive method and the lookuptable method. The channel data histogram from the proposed method is represented by the red curve with diamond markers. The histogram obtained from the lookup-table method is labeled by the black stars. The blue curve denotes theoretical Rayleigh PDF. From Fig. 3, the histogram of the data generated by our recursive structure matches the theoretical PDF. 1

Autocorrelation

Proposed Method Lookup−table Method Real Number

0.5

0

−0.5 −0.02

−0.015

−0.01

−0.005

0

0.005

0.01

0.015

0.02

Time Delay

Fig. 4. Autocorrelation of the In-phase component of generated Rayleigh fading data.

The autocorrelation of the simulated channel data is plotted in Fig.4. The red diamond curve is from the recursive method

Using a recursive structure, we generate Rayleigh fading channels at the low hardware resource consumption. The dynamic feature of the generator is analyzed which helps us improve the stability of the recursive structure. The results in the experiments illustrate the effectiveness of the proposed channel generator and the advantages on saving hardware sources. R EFERENCES [1] C. Xiao, Y. R. Zheng, and N. Beaulieu, “Novel sum-of-sinusoids simulation models for Rayleigh and Rician fading channels,” Wireless Communications, IEEE Transactions on, vol. 5, no. 12, pp. 3667 –3679, december 2006. [2] C.-X. Wang, M. Patzold, and D. Yuan, “Accurate and efficient simulation of multiple uncorrelated Rayleigh fading waveforms,” Wireless Communications, IEEE Transactions on, vol. 6, no. 3, pp. 833–839, March 2007. [3] G. Rao, R. Bhattacharjee, and S. Nandi, “VLSI architecture for Rayleigh and Rician fading generators,” in TENCON 2004. 2004 IEEE Region 10 Conf., vol. C, Nov 2004, pp. 121 – 124 Vol. 3. [4] A. Alimohammad, S. Fard, B. Cockburn, and C. Schlegel, “A compact single-fpga fading-channel simulator,” Circuits and Systems II: Express Briefs, IEEE Transactions on, vol. 55, no. 1, pp. 84–88, Jan 2008. [5] O. Nasr and B. Daneshrad, “Design and FPGA implementation an accurate real time 3x4 MIMO channel emulator,” in Signals, Systems and Computers, 2009 Conf. Record of the Forty-Third Asilomar Conf. on, Nov 2009, pp. 764 –768. [6] A. Alimohammad, S. Fard, B. Cockburn, and C. Schlegel, “An improved sos-based fading channel emulator,” in Vehicular Technology Conference, 2007. VTC-2007 Fall. 2007 IEEE 66th, 30 2007-oct. 3 2007, pp. 931 –935. [7] F. Ren and Y. Zheng, “A novel emulator for discrete-time MIMO triply selective fading channels,” Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 57, no. 9, pp. 2542–2551, Sept 2010. [8] W. Jake, Microwave Mobile Communication. Piscataway, NJ: WileyIEEE Press, 1974. [9] A. Alimohammad and B. Cockburn, “Compact implementation of a sumof-sinusoids Rayleigh fading channel simulator,” in Signal Processing and Information Technology, 2006 IEEE International Symposium on, Aug 2006, pp. 253–257. [10] J. E. Volder, “The birth of CORDIC,” The Journal of VLSI Signal Processing, vol. 25, no. 2, pp. 101 –105, 2000. [11] A. Sripad and D. Snyder, “A necessary and sufficient condition for quantization errors to be uniform and white,” Acoustics, Speech and Signal Processing, IEEE Transactions on, vol. 25, no. 5, pp. 442–448, Oct 1977.

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A Novel Structure for Rayleigh Channel Generation with consideration of the implementation in FPGA Pengda Huang

Abstract—For reducing the hardware resource consumption, we propose a novel method of generating Rayleigh channels. First, we propose a basic channel generator built on a recursive structure. Via investigating the dynamic feature of the recursive structure, we find the basic generator is instable. The instability means that errors occurring in the fixed-point computation on FPGA will be accumulated and thus induce the failure of the channel generation eventually. To solve this problem, we propose an improved Rayleigh channel generator with the guaranteed stability. The improved generator manages to preclude the risk of accumulating errors in the fixed-point computation on FPGA. Experiment results show that the memory resources consumed in the proposed generator is one eighth of that in traditional generators, and the accuracy of the generated channel is still guaranteed.

I. I NTRODUCTION Channel simulation provides an effective method of evaluating the performance of the wireless communication systems. Therefore, the simulation of fading channels is widely studied [1]–[5]. In [1], the sum-of-sinusoid based Rayleigh channel generation method was improved which enhanced the randomness of the generated channels. The determination of parameters for channel generation was discussed in [2]. In [3], a VLSI platform was used to generate Rayleigh channels. Due to its popularity, FPGA provides an effective method of generating fading channels. On a single FPGA chip, the generation of one Rayleigh channel was investigated in [4]. According to [5], a 3 × 4 MIMO channel was generated on a FPGA chip. The hardware resource consumption is an important issue for assessing channel generation methods. The methods being able to effectively save FPGA resources are reported in a limited number. According to [6], [7], multiple cosine lookup tables were built to implement the sum-of-sinusoid based channel generation on a FPGA chip. The multiple lookup tables consume a large number of memories (as shown in Table. I) which are very precious for the most of FPGA chips. Nasr and Daneshard [5] combined 64 FPGA chips to implement a scalable channel emulator. The high cost will limit the popularity of these channel generators. We propose a novel Rayleigh channel generator within the sum-of-sinusoid scheme. This generator is based on a recursive structure which can significantly reduce the memory resource consumption in FPGA. The recursive structure is proved to be stable which keeps the generator from amplifying the computation errors in FPGA, e.g. quantization error, thermal noise caused error. To save the hardware resources further, a time division (TD) scheme is applied to the recursive structure.

The remainder of this paper is organized as follows: The background of Rayleigh channel generation is introduced in Section II. In Section III, a basic form of a novel channel generator is proposed. In Section IV, the stability of the basic recursive structure is investigated after which an improved structure with the guaranteed stable feature is proposed. Section V presents experiment results, and conclusions are provided in Section VI. II. BACKGROUND

OF

R AYLEIGH C HANNEL G ENERATION

Due to the wide existence of Rayleigh fading, the simulation of Rayleigh channel is widely studied [1]–[3], [8]. To obtain a Rayleigh channel, two orthogonal Gaussian random processes, Q Q I I rR and rR , are generated first. The envelope of rR and rR is Rayleigh distributed. Q I In an isotropic radiation scenario [8], the rR and rR are generated by the equations as follows, P 1 X I cos(2πfM (cos(αp ))t + φp ), r (t) = R P p=1 , (1) P 1 X Q sin(2πfM (cos(αp ))t + φp ) rR (t) = P p=1

where P denotes the number of the sinusoids which characterizes the number of the paths in a fading channel; αp represents the incidence angle of the p-th path; φp is the initial phase of the p-th sinusoid which is uniformly distributed in the range [0, π]; and fM denotes the maximum Doppler value. According to [6], [7], [9], 2 × P lookup tables are needed to generate the 2 × P sinusoids for implementing (1). The construction of the multiple lookup tables consumes the large number of memories in FPGA, especially for the generation of the highly accurate channel. III. T HE N OVEL R AYLEIGH C HANNEL G ENERATOR

To effectively reduce the memory consumption, we propose a novel method to generate the sinusoids, rather than by looking up sine/cosine tables. The novel method is implemented by a recursive structure. We will introduce a basic recursive channel generator in this section. A. The iterative method of sinusoid generation On the Cartesian plane, the two points, (cos(nωp ), sin(nωp )) and (cos(n + 1)ωp , sin(n + 1)ωp ), have the same radius, but the different phase angle. The point (cos(n + 1)ωp , sin(n + 1)ωp ) can be obtained via rotating

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(cos(nωp ), sin(nωp )) by the angle of ωp . This rotation is mathematically described by cos(ωp t + φp ) = cos(ωp ) cos(ωp t − ωp + φp ) − sin(ωp ) sin(ωp t − ωp + φp ) , (2) sin(ωp t + φp ) = cos(ωp ) sin(ωp t − ωp + φp ) + sin(ωp ) cos(ωp t − ωp + φp )

where ωp = 2πfM T cos αp and T denotes the time interval between two adjacent rotations. For simplicity, we use x(n) and y(n) to denote the sine and cosine value at the n-th time instance on the p-th sinusoid, and x(n + 1) and y(n + 1) are the values at the (n + 1)-th time instance. Therefore, The equation (2) is simplified as, x(n) x(n + 1) cos ωp − sin ωp . (3) = y(n) sin ωp cos ωp y(n + 1)

From (3), only one lookup table is needed which is responsible for initializing the coefficients in (3). B. Two approaches of implementing the rotation (3) 1) CORDIC based method: The CORDIC algorithm [10] was originally designed to implement the rotation which computation only relies on sequential operations of bits shifting and addition. The computation of (2) is essentially an operation of rotation which can thus be implemented via the CORDIC algorithm. According to [10], the rotation by angle ωp is completed via the multiple sequential steps of sub-rotation. Assume there are L sub-rotations. The rotation angle at the l-th (1 ≤ l ≤ L) sub-rotation is arctan 2−l . Each sub-rotation is implemented by the equation as follows, −l x(n)l+1 = x(n)l − sign(z(n)l )2 y(n)l . (4) y(n)l+1 = y(n)l + sign(z(n)l )2−l x(n)l −1 −l z(n)l+1 = z(n)l − sign(z(n)l ) tan (2 ).

where (x(n)l , y(n)l ) denotes the intermediate value of x and y after the l-th sub-rotation. z(n)l is an auxiliary variable. To perform the CORDIC algorithm, we initialize the variables as follows, x(n)0 = x(n), y(n)0 = y(n) and z(n)0 = ωp . After the L sub-rotations described by (4), the transformation from (x(n), y(n)) to (x(n + 1), y(n + 1)) is complete. Due to sequential operations of the sub-rotation, the number of the consumed time slices is large. Thus, the CORDIC algorithm is not the main objective to be investigated in this paper, but still a choice to implement the channel generator based on the recursive structure. 2) Direct rotation method: The rotation by the angle ωp can be implemented in one step on FPGA. The one-step rotation can save time slice and thus improves the throughput of the channel generation. The channel generation is divided into two main steps, initialization and iterative computation. In initialization, the coefficients in (3) are read from a cosine lookup table, and x and y are initialized by x(0) = cos(0) and y(0) = sin(0). After the initialization, the data of the two

orthogonal sinusoids x and y are computed in the iterative way as shown in (3). Indeed, the advantage of recursive structures on saving hardware resource is widely recognized, while the stability problem is the main issue worth studying. IV. T HE I MPROVED S INUSOID G ENERATOR BASED ON A S TABLE I TERATION S TRUCTURE Due to the noise and the limited bit resolution, there exists errors in quantizing the numbers on FPGA. Instable recursive computation structures are sensitive to the errors. In this section we investigate stability of the basic recursive structure presented in Section III, and propose an improved structure which precludes the amplification of the error. A. Stability analysis in the recursive computation structure As a result of the finite-bit expression of channel data, the clock drifting and thermal noise, the computation error is unavoidable in the channel data generation. If the error is not suppressed in the recursive computation, the error will be accumulated and eventually induce the failure of channel generation. To analyze the stability, we convert (3) into a differential equation. Via studying the dynamic features of the differential equation, we can know the stability of (3). The differential equation corresponding to (3) is given by x x˙ cos ω0 sin ω0 . (5) = y y˙ − sin ω0 cos ω0 where ω0 ∈ {ωp , p = 1, 2, · · · , P } Let ∆c and ∆s denote the error in quantizing cos ω0 and sin ω0 respectively. After the quantization, the values of the coefficients in (5) are denoted by cos ω ∗ and sin ω ∗ which are determined by cos ω ∗ = cos ω0 + ∆c (6) sin ω ∗ = sin ω0 + ∆s, where cos ω0 ≫ ∆c and sin ω0 ≫ ∆s. We assume there are W bits used to quantize and W is no less than 8. According to [11], ∆c and ∆s uniformly distribute in [− 2W1+1 , 2W1+1 ], that is, ∆c, ∆s ∼ U([− 2W1+1 , 2W1+1 ]).

Fig. 1.

Illustration of the one-step rotation with the quantization error

Fig. 1 shows an example of how the quantization error ∆c and ∆s affect the rotation results. In Fig. 1, the zn−1 denotes the vector at the (n − 1)-th time slot, that is, zn−1 = xn−1 + jyn−1 . zn is the supposed rotation result in the ideal case if there is no errors in quantizing the coefficients. zn∗ is the actual rotation result.

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We use ω ∗ to denote the angle between zn−1 and zn∗ . ∆ω measures the difference between ω0 and ω ∗ , that is, ∆ω = ω ∗ − ω0 . The amplitude of zn∗ is denoted by r∗ , r∗ = |zn∗ |. Thus, with the consideration of the quantization error, the differential equation is rewritten as r∗ cos ω ∗ sin ω ∗ x x˙ . (7) = − sin ω ∗ cos ω ∗ y y˙ r0 ∗

Next, we calculate r and ∆ω first. Then we determine the distributions of r∗ and ∆ω. Based on the geometric relationship as shown in Fig. 1, we have ( ∆c + r0 = r∗ cos ∆ω , (8) ∆s = r∗ sin ∆ω where r0 is the amplitude of zn−1 . Because ∆c and ∆s are independent to each other and both uniformly distribute in [− 2W1+1 , 2W1+1 ], the joint distribution p(∆c, ∆s) is determined by p(∆c, ∆s) = 22W , where − 2W1+1 ≤ ∆c ≤ 2W1+1 and − 2W1+1 ≤ ∆s ≤ The Jacobian determinant of (8) is calculated by ∂∆c ∂∆c ∂r ∗ ∂∆ω |J| = ∂∆s ∂∆s ∂r ∗

(9) 1 2W +1 .

∂∆ω

(10)

= r∗ .

With (8), (9) and (10), the joint probability p(r∗ , ∆ω) is determined by p(r∗ , ∆ω) = |J|p(∆c(r∗ , ∆ω), ∆s(r∗ , ∆ω)) = r∗ 22W ,

(11)

∗ ∗ where, rm ≤ r∗ ≤ rM , ∆ωm ≤ ∆ω ≤ ∆ωM , q 2 2 ∗ rm = 1 − 2W1+1 + 2W1+1 q 2 2 ∗ rM = 1 + 2W1+1 + 2W1+1 1 ∆ωm = arctan r0 2W−1 +1 −1 , and∆ωM = arctan r 2W +1 +1 . 0 (12) From (11), the PDF of ∆ω is determined by ∗ Z rM p(r∗ , ∆ω)dr∗ p(∆ω) = ∗ rm (13) 1 ∗ 2 ∗ 2 2W = ((rM ) − (rm ) )2 . 2 From (13), we can observe that ∆ω uniformly distributes in [∆ωm , ∆ωM ]. According to (12), when W ≥ 8 and r0 = 1, the values of both ∆ωm and ∆ωM are very small. Therefore, ∆ω is essentially a tiny disturbance on the ideal frequency ω0 . The disturbance ∆ω is uniformly distributed. Based on the results in [1], even though there exists an uniformly distributed weak perturbation on the frequency of each sinusoid, the spectrum and the distribution of the generated fading channel stay the same. Thus, the quantization error caused perturbation does not degrade the accuracy of the spectrum of the generated channels.

However, ∆s and ∆c change the the amplitude r∗ and this change will be amplified in the recursive computation by (7). According to (7), the amplitude of the vector z eventually approaches to infinity large for r∗ > r0 or becomes zero for r∗ < r0 . B. Improved recursive channel generator In this subsection, we investigate the stability problem on the amplitude r∗ . For the convenience for analysis, we study the stability problem in polar coordinates. We assume an auxiliary variable z which real and imaginary parts are x and y respectively, that is, z = x + jy. In polar coordinates z is written as z = r · ejω where x = r cos ω and y = r sin ω. Furthermore, the differential equation (7) in a polar coordinate is rewritten as z˙ = z ·

r∗ jω∗ e . r0

(14)

From (14), the amplification on the amplitude error because ∗ of rr0 is easily observed. The error amplification will induce the failure of the channel generation in long term. To solve the problem, we add a negative feedback item (β(r02 − r2 )z) to z, that is, r∗ ∗ (15) z˙ = z + β(r02 − r2 )z · ejω . r0

where the constant β is positive and much smaller than r, β ≪ r. From (15), the derivatives of x and y are calculated by r∗ (1 + βr02 ) cos ω ∗ sin ω ∗ x x˙ = − sin ω ∗ cos ω ∗ y y˙ r0 ∗ 2 2 ∗ ∗ r (x + y ) cos ω sin ω x − . − sin ω ∗ cos ω ∗ y r0 (16) With (16), the derivative of r can be calculated as follows, p ′ r˙ = x2 + y 2 1 (2xx˙ + 2y y) ˙ = p 2 2 x + y2 ∗ 2 2 (a) rr (1 + β(r0 − r )) cos ω ∗ , = r0

(17)

where (a) follows (16) and 0 < ω ∗ < π2 . To calculate the fixed point of r, we solve the equations r˙ = 0 which solutions are given by ( r1 = q 0 . (18) r2 = β1 + r02 Combining (17) and (18), which is described by r˙ > 0 for r˙ < 0 for r˙ = 0 for

we can find the behavior of r r1 < r < r2 r > r2 . r = r2

(19)

According to (19), when r1 < r < r2 , the trajectories of z move away from the origin point (0, 0) due to r˙ > 0. When

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Block diagram of the novel structure for generating fading channels

r > r2 , the trajectories move towards the origin point for r˙ < 0. Based on the observations, the trajectories converge to the circle with radius of r2 . Thus, we conclude that r1 = 0 is an unstable fixed point and r2 is a stable one. Based on the analysis, the iteration structure presented by (16) is able to generate the two orthogonal sinusoids which amplitude is stable at r2 . From (18), since r2 is determined by β and r0 , we can control the amplitude of the generated sinusoid by modifying the values of β and r0 . Using the improved recursive structure, we can generate a fading channel with one cosine lookup table which is used for initializing the recursive structure of (16) C. Application of Time Division Scheme To save the hardware resources further, we apply the time division (TD) scheme on the generation of the fading channels. Using the TD scheme, we generate the multiple sinusoids with one recursive structure. The success of this application is based on the fact that the maximum Doppler in a fading channel is far smaller than the clock frequency of FPGA. Without loss of generality, we consider a specific value of the maximum Doppler which is set to be 1kHz, fM = 1kHz. The clock frequency of FPGA is assumed to be 20M Hz. Indeed, 1kHz is large enough to cover the range of Doppler values even for the high speed vehicles. The clock frequency of the FPGA chips on the market is higher than 20M Hz in most cases. There are 10 pairs (P = 10) of cosine and sine sinusoids which are summed to generate a Rayleigh channel. In the isotropic fading channel model, the frequencies of the 10 pairs of sinusoids are calculated by fp = fM cos πp 20 , p ∈ {0, 1, · · · , 9}. At each sinusoid, the data are updated periodically. Let f U (p) denote the data update frequency for generating the

p-th sinusoid. To generate different sinusoids, the iterative structure is driven to work at different update frequencies, f U (p1 ) 6= f U (p2 ) for p1 6= p2 . For each sinusoid component, the update frequency f U (p) is calculated by U f U (p) = fM fp /fM .

(20)

U where fM denotes the maximum update rate. From (20), f U (p) is proportional to fp which means the sinusoid with the larger Doppler needs to be generated at the higher rate. Furthermore, since the update frequencies are different from each other, there exists the risk that two different sinusoids try to update data in the same time slot. To solve this potential conflict, we add a priority setup module to assign the different priorities to sinusoid generation modules involved.

D. Block diagram of the proposed channel generator Fig.2 presents the block diagram of the proposed Rayleigh fading channel generator. In the middle of Fig.2, the orange part shows how the recursive structure works in the timedivision mode. The module of Multi-phase Generator provides 10 timing control signals at the periods of f1p . The control signal, which is output of the Multi-phase Generator module, is used to request the recursive structure to update data. To preclude the conflicts of the control signals, Priority Setup module is responsible for coordinating the update request conflicts according to the priority levels of the sinusoid generation modules. The output from the Priority Setup module serves two functions: commanding Recursive Sinusoid Generator module to update data; and synchronizing the different components of the recursive structure. In Fig. 2, the left part with green background shows the components for stabilizing the recursive structure. The block

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on the right corner with a ‘*’ marker shows the basic recursive structure. V. E XPERIMENTS

AND

S IMULATIONS

We test the proposed Rayleigh channel generator in the ISE Simulator which is based on the FPGA chip Virtex4 VFX100FFG1517. As a reference, the fading channels in real numbers are generated on MATLAB. Furthermore, the channel generation based on lookup table is also tested. We evaluate the performance of our proposed method in terms of distribution and the autocorrelation of the fading channel. In the experiments we generate 107 channel data. The number of sinusoids is 8. The number of the bits for quantizing each data is 10. 0.03

Histogram for Proposed Method Histogram for Lookup−table Method Theorical PDF

PDF of Rayleigh p(x)

0.025

and the black star one is from the lookup-table method. The blue curve is the result generated by real numbers on MATLAB. From Fig. 4, the autocorrelation curve for the proposed method matches the one generated by real numbers. TABLE I R AYLEIGH CHANNEL GENERATOR HARDWARE CONSUMPTION COMPARISON WITH CONVENTIONAL STRUCTURE

Iter. Str. Lookup T. Total

Flip-Flops 996 589 84352

RAMB16s 1 8 376

LUTs 922 10232 84352

Slices 725 6312 42176

DSP48s 3 2 160

Table I lists comparison on the consumed hardware resource of FPGA. The numbers in the table are from the reports by the ISE simulator. From Table I, the number of the memory resource used in the proposed channel generator is 18 of that in the lookup table based generator. VI. C ONCLUSION

0.02

0.015

0.01

0.005

0

0

0.2

0.4

0.6

0.8

1

x

Fig. 3.

Histogram of the envelope of simulated Rayleigh fading data.

Fig. 3 presents the comparison between the PDF curves generated by the proposed recursive method and the lookuptable method. The channel data histogram from the proposed method is represented by the red curve with diamond markers. The histogram obtained from the lookup-table method is labeled by the black stars. The blue curve denotes theoretical Rayleigh PDF. From Fig. 3, the histogram of the data generated by our recursive structure matches the theoretical PDF. 1

Autocorrelation

Proposed Method Lookup−table Method Real Number

0.5

0

−0.5 −0.02

−0.015

−0.01

−0.005

0

0.005

0.01

0.015

0.02

Time Delay

Fig. 4. Autocorrelation of the In-phase component of generated Rayleigh fading data.

The autocorrelation of the simulated channel data is plotted in Fig.4. The red diamond curve is from the recursive method

Using a recursive structure, we generate Rayleigh fading channels at the low hardware resource consumption. The dynamic feature of the generator is analyzed which helps us improve the stability of the recursive structure. The results in the experiments illustrate the effectiveness of the proposed channel generator and the advantages on saving hardware sources. R EFERENCES [1] C. Xiao, Y. R. Zheng, and N. Beaulieu, “Novel sum-of-sinusoids simulation models for Rayleigh and Rician fading channels,” Wireless Communications, IEEE Transactions on, vol. 5, no. 12, pp. 3667 –3679, december 2006. [2] C.-X. Wang, M. Patzold, and D. Yuan, “Accurate and efficient simulation of multiple uncorrelated Rayleigh fading waveforms,” Wireless Communications, IEEE Transactions on, vol. 6, no. 3, pp. 833–839, March 2007. [3] G. Rao, R. Bhattacharjee, and S. Nandi, “VLSI architecture for Rayleigh and Rician fading generators,” in TENCON 2004. 2004 IEEE Region 10 Conf., vol. C, Nov 2004, pp. 121 – 124 Vol. 3. [4] A. Alimohammad, S. Fard, B. Cockburn, and C. Schlegel, “A compact single-fpga fading-channel simulator,” Circuits and Systems II: Express Briefs, IEEE Transactions on, vol. 55, no. 1, pp. 84–88, Jan 2008. [5] O. Nasr and B. Daneshrad, “Design and FPGA implementation an accurate real time 3x4 MIMO channel emulator,” in Signals, Systems and Computers, 2009 Conf. Record of the Forty-Third Asilomar Conf. on, Nov 2009, pp. 764 –768. [6] A. Alimohammad, S. Fard, B. Cockburn, and C. Schlegel, “An improved sos-based fading channel emulator,” in Vehicular Technology Conference, 2007. VTC-2007 Fall. 2007 IEEE 66th, 30 2007-oct. 3 2007, pp. 931 –935. [7] F. Ren and Y. Zheng, “A novel emulator for discrete-time MIMO triply selective fading channels,” Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 57, no. 9, pp. 2542–2551, Sept 2010. [8] W. Jake, Microwave Mobile Communication. Piscataway, NJ: WileyIEEE Press, 1974. [9] A. Alimohammad and B. Cockburn, “Compact implementation of a sumof-sinusoids Rayleigh fading channel simulator,” in Signal Processing and Information Technology, 2006 IEEE International Symposium on, Aug 2006, pp. 253–257. [10] J. E. Volder, “The birth of CORDIC,” The Journal of VLSI Signal Processing, vol. 25, no. 2, pp. 101 –105, 2000. [11] A. Sripad and D. Snyder, “A necessary and sufficient condition for quantization errors to be uniform and white,” Acoustics, Speech and Signal Processing, IEEE Transactions on, vol. 25, no. 5, pp. 442–448, Oct 1977.

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