A Subthreshold MOSFET Bandgap Reference with Ultra-Low Power Supply Voltage Yilei Li*, Yu Wang, Na Yan, Xi Tan and Hao Min State Key Lab of ASIC & System, Fudan University, Shanghai 200433, China * Email:
[email protected] Abstract A novel bandgap reference (BGR) with ultra low supply voltage is presented. The proposed bandgap reference uses subthreshold MOSFETs to provide temperature compensation. Analysis and comparison between proposed bandgap and conventional current-mode bandgap are made, and it is shown that when working with low supply voltage, the proposed bandgap is less sensitive to mismatch and power supply noise. The bandgap reference is implemented in SMIC 0.13μm RF technology, and simulation results show that it can provide the output voltage of 429 mV with a supply voltage as low as 0.6 V.
1. Introduction Bandgap references (BGR) are necessary blocks for many applications, such as wireless communication system and analog-digital converters. They provide standard voltage/current reference insensitive to process, power supply voltage and temperature variations. Traditional bandgap reference is based on temperature characteristic of bipolar transistors (BJT), and its output voltage is about 1.2 V. Thus, for advanced technology with nominal supply voltage lower than 1.2 V, traditional bandgap reference can no longer function. In [1], current-mode bandgap was proposed to enable bandgaps to work under low supply voltage. The current-mode bandgap is shown in Fig. 1. Current-mode bandgap uses addition of current instead of voltage, thus can work under lower supply voltage. However, the output voltage of current-mode bandgap is just the voltage drop of temperature-compensated current on output resistor, so it is more sensitive to power rail noise and output resistor mismatch than traditional bandgap. In [2], the proposed bandgap eliminates the use of opamp to work under sub-1V power supply. However, it still uses BJT to achieve temperature compensation, and thus the forward voltage drop of BJT limits the lower bound of supply voltage, which can be as high as 700 mV. In this paper, a bandgap based on subthreshold MOSFET is presented. It uses the temperature characteristics of subthreshold MOSFET to achieve temperature compensation, and can work under very low supply voltage. This paper is organized as follows. In Section 2, basic
principle of temperature compensation is explained. After that, we analyze our circuit and compare it with conventional current-mode bandgap in Section 3. Implementation and simulation results are presented in Section 4. Finally, the conclusion is given in Section 5. 2. Proposed Temperature Compensation The schematic of proposed bandgap is shown in Fig. 2. The gate-source voltage of subthreshold MOSFET can be expressed as [3]: W Vgs = Vth + nVT (ln C − ln + (γ − 2) ln T ) (1) L where n and γ are constants related to process of MOSFET, and C is related to the current of MOSFET in subthreshold. The value of the first-order derivative of (1) is negative [4]; or we can say, Vgs of MOSFET in subthreshold region has negative temperature coefficient. Since for MOSFETs in the same process, n and γ are basically the same (ignore the mismatch effect), so we can express the Vgs difference (ΔVgs) between two subthreshold MOSFETs with the same current but different width-to-length ratios as: W ( )2 ΔVgs = Vgs1 − Vgs2 = nVT ln L (2) W ( )1 L Apparently, if (W/L)2>(W/L)1, then ΔVgs has positive temperature coefficient. In Fig. 2, the operational transconductance amplifier (OTA) provides large feedback loop gain to ensure that node a and b have the same voltage. Capacitor C0 is inserted to perform compensation to ensure stability. Transistors M4 and M5 has the same size the gate-source voltage to ensure that M1 and M2 have the same drain current. Since input impedance of OTA is very large, the current flowing through M2 equals to the current flowing through R1, and it is just the Vgs difference of M1 and M2 divided by R1: W ΔVgs nVT ( L ) 2 I2 = = ln (3) R1 R1 (W ) 1 L On the other hand, M6 mirrors I2. Thus, the output voltage of bandgap can be expressed as:
Fig.1 Traditional Current-Mode Bandgap Fig.2 Proposed Ultra-Low Voltage Bandgap W ( )2 nVT R 2 Vout =Vgs3 + I 3 R 2 = Vgs3 + ln L (4) W R1 ( )1 L Indeed, I3 changes with temperature, so C also changes with temperature; however, consider (1), since lnC only varies a little throughout the temperature change, thus we can ignore the effect of changing current to the gate-source voltage of M3. Consequently, the gate-source voltage of M3 still has the negative temperature coefficient, while the voltage drop on R2 has the positive temperature coefficient. So, the output voltage will have zero temperature coefficient if the following expression is satisfied: W ( )2 R1 nk 1 (5) = − ⋅ ln L ⋅ W ∂Vgs3 R2 q ( )1 L ∂T 3. Analysis, Comparison and Design 3.1 Lower Bound of Supply Voltage For conventional current-mode bandgap in Fig. 1, since usually the forward voltage drop on BJT is about 700 mV, and suppose the saturate voltage of MOSFETs M4, M5 and M6 is 100 mV, then the lower bound of supply voltage is about 800 mV. Actually, the main factor determining the lower bound of supply voltage of conventional current-mode bandgap is the relatively large forward voltage drop on BJT. By using special BJT such as Schottky diode can reduce the forward voltage drop, but it is complicated to implement such device in standard CMOS process. In proposed bandgap, the voltage drop in mainly on drain-source voltage of MOSFET current mirror and gate-source voltage of subthreshold MOSFET. The drain-source voltage of MOSFET in saturation region can be as low as about 100 mV, and the gate-source voltage of subthreshold MOSFET is around 300~400 mV, thus the lower bound of proposed bandgap can be 200
mV lower than conventional current-mode bandgap. In addition, with the progress of technology, the threshold voltage of MOSFET decreases, so the voltage drop of subthreshold MOSFET can be even lower with advanced technology. On the other hand, the forward voltage drop of BJT does not scale significantly with technology. Thus, the proposed bandgap has more potential to work with ultra low supply voltage in advanced technology. 3.2 Power Supply Noise Rejection Suppose the proposed bandgap has the same loop gain as the conventional current-mode bandgap, and there exists noise in power supply generating noise output current ΔI. For conventional current-mode bandgap, the ratio of output voltage variance and nominal output voltage can be expressed as: ΔVout ΔI = (6) Vout I out For proposed bandgap, since the variance of gate-source voltage of M3 generated by ΔI is very small and can be ignored, the ratio of output voltage variance and nominal output voltage can be expressed as: ΔVout ΔI ⋅ R 2 ΔI (7) ≈ = Vout I out ⋅ R 2 + Vgs3 I out + Vgs3 / R 2 Apparently, the value of (7) is smaller than (6). Since the gate-source voltage of subthreshold MOSFET is less sensitive to current than the voltage drop on resistor, we can conclude that with the same amount of current noise generated by power supply noise, the change of output voltage of proposed bandgap is less than that of conventional current-mode bandgap; or, we can say that proposed bandgap structure has better power supply rejection (PSR) than conventional current-mode bandgap. 3.3 Sensitivity to Mismatch and Process Variation The mismatch in proposed bandgap can be mainly divided into two parts. First is the mismatch of threshold voltage of MOSFETs. If the threshold voltage of subthreshold MOSFETs M1 and M2 has a mismatch of ΔVth, then the difference of gate-source voltage of M1
and M1 can be expressed as: W )2 ΔVgs = ΔVth + nVT ln L (8) W ( )1 L And it may lead to error in temperature compensation since ΔVth has negative temperature coefficient [5]. To reduce this kind of mismatch, MOSFETs with large sizes should be selected, and care must be taken in layout design. Another source of mismatch is resistor mismatch. For conventional current-mode bandgap, suppose there exists mismatch for R4 and its value becomes R4+ΔR, then the ratio of output voltage variance to nominal output voltage can be expressed as: ΔVout ΔR = (9) Vout R4 For proposed bandgap, the ratio can be expressed as: ΔVout I out ⋅ ΔR ΔR = = (10) Vout I out ⋅ R 2 + Vgs3 R 2 + Vgs3 / I out (
Since the output voltage of traditional current-mode bandgap is proportional to output resistor R4, it is sensitive to the mismatch of R4; on the other hand, the output voltage of proposed bandgap is the sum of voltage drop on R2 and the gate-source voltage of M3. The voltage drop on R2 is just a small part of output voltage, and the gate-source voltage of M3 is basically independent from resistor mismatch, so the output voltage of proposed bandgap is less sensitive to resistor mismatch than conventional current-mode bandgap. Finally, the output voltage of proposed bandgap will change with different process corners since the threshold voltage of MOSFET is different, but this effect in proposed bandgap is not more significant than that in traditional current-mode bandgap, since the forward voltage drop of BJT also varies in different corners, and this varies the output current and thus the output voltage. 3.4 OTA with Subthreshold Input Pair One challenge in designing the proposed bandgap is OTA. The main reason is that the gate-source voltage of subthreshold MOSFET is around 300 mV, and this voltage is in the mid-point of VDD to ground for low supply voltage of 600 mV. Thus, the input-pair of OTA works in subthreshold region whether we use NMOS or PMOS as input transistor. In actual design, since NMOS has lower threshold voltage than PMOS, we choose NMOS as input transistor. In order to make the status of input pair close to moderate inversion region, we choose NMOS with long channel length (8 μm), since the threshold voltage of MOSFET decreases with longer channel length due to halo doping [6].To reduce power consumption, we chose a simple OTA structure (Fig. 3). Since the supply voltage is very low, cascode is not available. The loop gain, and thus power supply rejection
M5 M3 R0
In+
M1
M4 M2
Vout In-
M6 M7
M0
Fig.3 OTA with Subthreshold Input Pair can be improved by using multi-stage OTA, but at the cost of higher power consumption and design complexity. The bias of OTA is done by subshreshold MOSFET voltage divider, which consumes very little power. 4. Implementation and Simulation The circuit is implemented in SMIC 0.13 μm RF technology. The output voltage is 430 mV. The output voltage versus power supply voltage is shown in Fig. 4. The bandgap can work with VDD higher than 0.6 V, which is a very low value as a power supply voltage. The curve of output voltage versus temperature under 0.6 V VDD is shown in Fig. 5. As we can see from Fig. 3, as the temperature change from -20 °C to 80 °C, the maximum output voltage variance is about 1.1 mV, and the temperature coefficient is 25.6 ppm/°C. The PSR simulation result under VDD of 0.6 V and 1.2 V is shown in Fig. 6. With 0.6 V power supply voltage, since the OTA works in subthreshold region, the loop gain of feedback loop is limited, and thus the PSR at low frequency is about -31 dB. With 1.2 V VDD, however, the OTA no longer works in subthreshold region, so the low frequency PSR increases to -65 dB. Considering the fact that the OTA is single stage and no cascode transistor is used, this PSR is considerable, which verifies our discussion in Section 3.2. At higher frequency (>1 MHz), the high-frequency component is filtered out by RC low-pass network. A comparison with other low voltage BGRs from other references is in Table 1. Compared with other state-of-art works, the proposed bandgap has the lowest power supply voltage and comparable performances. 5. Conclusion A bandgap reference with ultra-low supply voltage is presented. By using the characteristics of subthreshold MOSFET, it can work under supply voltage as low as 0.6 V, with a temperature coefficient of 25.6 ppm/°C. Compared with traditional current-mode bandgap for low voltage application, the proposed bandgap is less sensitive to resistor mismatch and power supply noise. Finally, the proposed bandgap has the potential to work
0.5
0.3 0.2 0.1 0 0
0.2
0.4
0.6
0.8
1 1.2 VDD (V)
1.4
1.6
1.8
2
Fig. 4 Output Voltage vs. VDD under even lower supply voltage with progress of technology. Acknowledgments The project is supported by Important National Science and Technology Specific Projects of China No.2009ZX01031-003-002, National High Technology Research and Development Program of China No.2009AA011605 and Important National Science & Technology Specific Projects of China, 2010ZX03001-004.
Systems, 2009. [5] G. Giustolisi, G. Palumbo, M. Criscione, and F. Cutrì, “A low-voltagelow-power voltage reference based on subthreshold MOSFETs,” IEEE J. Solid-State Circuits, vol. 38, no. 1, pp. 151–154, Jan. 2003 [6] K. M. Cao, W. Liu, X. Jin, K. Vasanth, K. Green, J. Krick, T. Vrotsos and C. Hu, “Modeling of pocket implanted MOSFETs for anomalous analog behavior,” in IEDM Tech. Dig., 1999, pp. 171–174. [7] Po-Hsuan Huang, Hongchin Lin and Yen-Tai Lin, “A Simple Subthreshold CMOS Voltage Reference Circuit With Channel- Length Modulation Compensation,” IEEE Trans.Circuits Syst.II, vol. 53, No. 9, Sep. 2006, pp. 882-885 0.431 0.4308 Output Voltage (V)
Vout (V)
0.4
0.4306 0.4304 0.4302 0.43
Table 1. Performance Comparison between Bandgaps This [2] [4] [7] work Technology
0.13 μm CMOS
0.18 μm CMOS
0.18 μm CMOS
0.18 μm CMOS
VDD (V)
0.6
0.85
0.7
0.85
0.4298 -20
0
20 40 Temperature (°C)
60
Fig.5 Output Voltage vs. Temperature
-20
Temperature Coefficient (ppm/°C) References
-20~80 25.6
0~100 9
0~130 19
-20~120 190
[1] H. Banba, H. Shiga, A. Umezawa, T. Miyaba, T. Tanzawa, S. Atsumi and K. Sakui, “A CMOS bandgap reference circuit with sub-1-V operation,” IEEE J. Solid-State Circuits, vol. 34, no. 6, pp. 670–674, Jun. 1999. [2] E. K. F. Lee, “A Low Voltage CMOS Bandgap Reference without Using an Opamp,” IEEE International Symposium on Circuits and Systems, 2009. [3] Y. Tsividis, Operation and Modeling of The MOS Transistors, 2nd ed.,McGraw Hill, 1999 [4] A. –H. Adl, K. El-Sankary and E. El-Masry, “Bandgap Reference with Curvature Corrected Compensation Using Subthreshold MOSFETs,” IEEE International Symposium on Circuits and
VDD=0.6 V VDD=1.2 V
-30 PSR (dB)
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10
Fig.3 PSR vs. Frequency
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