and Power Factor

A Review of Electronic Inductor Technique for Power Factor Correction in Three-Phase Adjustable Speed Drives P O O YA D AVA R I 1 , YO N G H E N G YA N G 1 , F I R U Z Z A R E 2 , FREDE BLAABJERG 1 1D E P A R T M E N T O F E N E R G Y T E C H N O L O G Y , A A L B O R G U N I V E R S I T Y

[email protected], [email protected], [email protected] 2P O W E R A N D E N E R G Y G R O U P , T H E U N I V E R S I T Y O F Q U E E N S L A N D

[email protected]

19 SEPTEMBER 2016

2

Outline Introduction (Typical ASD System) Electronic Inductor (EI) Concept Overview on EI Topologies Loss Modeling and Analysis Experimental Results Conclusion

A Review of Electronic Inductor Technique for PFC in Three-Phase Adjustable Speed Drives| 19 Sept, 2016

3

Introduction Typical ASD System


Typical ASD System

4

Three-Phase Diode Rectifier After passive filtering (THDi ≈ 40%) Before passive filtering (THDi > 120%)

AC or DC side passive filtering

ia,n/ia,1

Simple Cost effective Harmonic order (n)

Efficient

AC or DC side passive filtering (inductor): simple and effective to some extent. But they are bulky, costly, causes resonance, worsen system dynamic, and etc. Active harmonic mitigation solutions have been introduced to improve the input current quality. But most of them are complex, costly and reduce system efficiency.


Typical ASD System

5

Three-Phase Diode Rectifier Passive Filtering Challenges

(a)

(b)

(c)

Performance of three-phase diode rectification using dc-side passive filtering: (a) effect of loading condition, (b) corresponding power factor λ and input current THD at different power levels, (c) effect of dc-link inductor size.


6

Electronic Inductor Concept Basic Idea


Electronic Inductor Technique

Basic Concept λ ≈ 0.95 THDi ≈ 29%

Emulating the behavior of an ideal infinite inductor THDi and Power Factor (λ) independent of the load profile. Controlling dc-link (udc).

7

8

Overview on EI Topologies Operating Principle


EI Topologies Three-Phase Diode Rectifier with EI No major modification is imposed to the original system!

A block diagram of a standard ASD system showing (a) double stage conversion (unidirectional) using different intermediate circuits at dc-side with (b) passive filtering, (c) single-switch boost converter, (d) double-switch boost converter, (e) electronic smoothing inductor


9

EI Topologies System Parameters


10

EI Topologies

11

Boost Converter-Based EI

Conventional Boost

Three-level Boost


EI Topologies

12

Boost Converter-Based EI Inductor Sizing

Conventional Boost

The inductor value in the threelevel topology is approximately three times lower than the one in the single-switch topology.

Ldc 0 

Three-level Boost

U dc D(1  D) , f sw, eff I L , pk  pk

D(1  D)U dc  conventional boost  f sw, eff  f sw  L I dc 0 L , pk  pk  where  2 D(0.5  D)U dc f  2 f sw  three  level boost  sw, eff Ldc 0 I L , pk  pk 

Ldc 0 

D(1  D)2 U dc2 2 Po,min f sw,eff


EI Topologies Electronic Smoothing Inductor (ESI)

The main advantage of this topology is its ability to maintain a low voltage across Cdc. This makes it more cost-effective as low voltage power switches for which fast switching performance can be adopted. In order to control the voltage across the floating capacitor and prevent from the high voltage during the startup, the capacitor (Cdc) should be selected quite large compared with Co No boosting capability!


13

EI Topologies

14

Electronic Smoothing Inductor (ESI) 0.093U r  uESI  0.047U r

Ldc 0 

U dcU Cdc Dmax 2 f sw,eff Po ,min

where

Dmax 

1 4

Ldc0 = 0.2 mH


15

Efficiency Loss Modeling


Loss Modeling

16

Analytical Method Loss modeling of a power electronics system with fast switching transients is not a trivial task.  Pcu ,dc  I L 2 RLdc   2  Pcu ,edd  iLac ,rms RLac b   U Ldc, j   ki f sw,eff B a b    t j Pcore  le Ae Nc Pcore,v j  NAe 

Pcu  Pcu ,dc  Pcu ,edd Pcore,v

  i2 I Pbridge  6   V fb L  rfb a ,rms  3 2  

where

 Err f sw , PD ,sw   QcU dc f sw

PD ,cond  V fo I D  rfoi 2 D ,rms

Si SiC

2 PCo   rESR  f iCo ,rms  f  f

PT ,cond  Vce IT  rToni 2T ,rms

, PT ,sw   Eon  Eoff  f sw


Loss Modeling

17

Efficiency Comparison @ Po = 7.5 kW (100%) Although the passive filtering method does not show a better performance compared to the EI technique in terms of THDi and λ, as it can be seen from figure, it has a high efficiency with total power losses of 91.6 W (η = 98.8%).

With a Si-based power switch (IGBT) a total power loss of 315 W (η = 96%) is obtained while using SiC power devices, the loss is significantly reduced down to 131.5 W (η = 98.3%).

Efficiency performance of single-switch boost topology using Si-IGBT module [SK60GAL125] and SiC MOSFET [C2M0080120D] with SiC diode [C4D15120A]


Loss Modeling

18

Efficiency Comparison Compared with a SiC-based singleswitch boost converter (131.5 W), the double-switch boost converter has lower efficiency (154.5 W).

@ Po = 7.5 kW (100%)

The ESI topology can attain a substantially high efficiency due to low voltage requirement of the asymmetric H-bridge using the floating capacitor. the ESI topology achieved the total power loss of 102.5 W (η = 98.65%) which makes it the only topology with comparable losses comparing with the passive filtering method (91.6 W ). efficiency performance of double-switch boost topology using SiC MOSFETs [C2M0080120D] with SiC diodes [C4D15120A] and ESI using OptiMOS MOSFETs [BSB165N15NZ3] with Si Schottky diodes [APT15S20K]


Loss Modeling

19

Optimum operating points?

The losses in a power electronic converter are highly dependent on the applied switching frequency and output power levels. This curve shows two important trends. First, the highest efficiency can be obtained at higher output power levels. This is due to the lower core losses in the inductor as the current ripple is lower at higher output power. Secondly, the system efficiency can be optimized by applying a suitable switching frequency depending on the output power level.

Dependency of the system efficiency on the utilized switching frequency and output power level in a singleswitch boost converter using an IGBT power switch


20

Experimental Results Phase-Shifted Current Control and Current Modulation

A Multi-Pulse Front-End Rectifier System with Electronic Phase Shifting for Harmonic Mitigation | 21 Sept, 2016

Experimental Results Test Bench


21

Experimental Results Original Drive (Passive Filter) THDi = 48.7%, λ = 0.89 L = 2.5mH

Po = 5kW Udc = 534V

THDi = 67.6%, λ = 0.81 L = 2.5mH

Po = 3kW Udc = 534V

22

EI (flat current modulation) THDi = 29%, λ = 0.95 L = 2mH, fsw = 35 kHz

Po = 5kW Udc = 700V

THDi = 29%, λ = 0.95 L = 2mH, fsw = 35 kHz

Po = 3kW Udc = 700V

Experimental Results

Efficiency

The measured experimental efficiency versus the analytical analysis when the output power level is changed from 10% to 100%. As it can be seen, the obtained results are in a close agreement with the preformed analytical loss modelling. This also validates the trend of having a better efficiency at higher power due to lower inductor core losses.


23

24

Conclusion The EI technique can significantly improve the THDi , λ and stable DC link The performance of the EI technique is independent of the loading profile The single-switch boost topology has simple control, can setup-up the DC-link voltage and by utilizing SiC power devices the efficiency can be improved significantly The lower efficiency of the three-level boost converter and the higher number of the power switches and required voltage sensors makes this topology not a suitable choice. The ESI has very low power losses, but it requires more sensors, gate-drivers, does not have boost capability and its performance depends on grid impedance.

A Multi-Pulse Front-End Rectifier System with Electronic Phase Shifting for Harmonic Mitigation | 21 Sept, 2016

25

Thank You

http://www.nhtd.et.aau.dk