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Abstract—Biodegradable junctionless transistors with extremely simple structure are fabricated at room temperature. The free-standing sodium alginate (SA) ...
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/LED.2015.2451672, IEEE Electron Device Letters

Biodegradable Junctionless Transistors with Extremly Simple Structure Jie Guo, Jingquan Liu, Bin Yang, Guanghui Zhan, Longjun Tang, Hongchang Tian, Xiaoyang Kang, Huiling Peng, Xiang chen, Chunsheng Yang  Abstract—Biodegradable junctionless transistors with extremely simple structure are fabricated at room temperature. The free-standing sodium alginate (SA) membrane is used as both a substrate and the dielectric layer for the transistors. The source/drain electrodes and the channel region are made of one single patterned Al:ZnO (AZO) thin film. The proposed transistors can be operated at a low voltage of 1 V. Dissolution tests of those transistors in deionized water demonstrate their completely physical transience within 60 minutes. The operation mode of such transistors can be effectively tuned from depletion mode to enhancement mode by varying the thickness of the AZO film. Moreover, a resistor-loaded invertor was demonstrated by connecting those transistors in series with a 3 MΩ resistor. Index Terms — Junctionless transistors, free-standing sodium alginate membrane, biodegradable transistors.

I.

INTRODUCTION

T

RANSIENT or biodegradable electronics have gained considerable attention in recent years. Those electronics will open up various areas of application ranging from implantable biomedical component to vanishing environmental sensors, and portable consumer electronics [1]-[3]. However, the relatively high operation voltages of the currently reported biodegradable transistors pose a serious concern for both implantable and portable applications. In traditional transistors, the semiconductor film is separated from the top or bottom gates by a thin insulating dielectric film. Figure 1 (a) shows a schematic illustration of a traditional transistor with a bottom gate. The bottom gate/dielectric film/semiconductor sandwich can be regard as a capacitor. The conductance of the semiconductor channel can be tuned with an applied voltage. We can either decrease the thickness of the dielectric layer [4] or use high-dielectric-constant materials [5] as gate dielectrics to obtain low voltage transistors. Recently, low voltage oxide This work was supported partly by the National Natural Science Foundation of China (No. 51475307, 61176104, 61204119), 973 Program (2013CB329401), Shanghai Municipal Science and Technology Commission (No.13511500200), SRFDP (20130073110087), NDPR Foundation of China (No. 9140A26060313JW3385), HF Key Lab (HF2012-k-01), SJTU-Funding (YG2012MS51). J. Guo, J. Liu, B. yang, G. Zhan, L. Tang, H. Tian, X. Kang, L. Peng, X. Chen, and C. Yang are with the National Key Laboratory of Science and Technology on Micro/Nano Fabrication, Department of Micro/Nano-electronics, Shanghai Jiao Tong University, Shanghai 200240, China, and also with Collaborative Innovatation Center of IFSA, Shanghai Jiao Tong University, Shanghai 200240, China. (E-mail: [email protected]).

Fig. 1. Scheme illustration of (a) A conventional transistors with a bottom gate; (b) A EDL transistor with an in-plane gate; (c) A biodegradable EDL transistor proposed by our group previously (d) A biodegradable EDL transistor proposed in this letter.

based electric-double-layer (EDL) transistors using proton conducting but electron insulating biopolymers chitosan and sodium alginate as gate dielectrics have been widely studied [6]-[9]. The formation of a highly charged EDL at the interface between the biopolymer and channel layer greatly enhances the capacitive coupling, which results in low-voltage operation for those transistors. In addition, the voltage applied on the in-plane-gate can be directly coupled to the channel laterally by one EDL capacitor [6]-[9]. Figure 1 (b) shows a typical laterally coupled EDL transistor. In our recent work, we developed a novel biodegradable homo-junction EDL transistors and demonstrated that the Al:ZnO (AZO) and sodium alginate (SA) membrane are proper materials to build biodegradable transistors [10]. Figure 1 (c) shows the scheme illustration of the proposed biodegradable EDL transistors, in which the SA membrane is used simultaneously as the substrates and dielectrics for the transistors. In this letter, we proposed a new type of biodegradable transistor with extremely simple structure. As shown in Figure 1 (d), both source/drain electrodes and the channel region are made of one single AZO thin film, which is often called a junctionless transistor [11]-[13]. Compared with previously proposed junctionless transistors and biodegradable homo-junction transistors, the transistors proposed in this letter have a favorable combination of properties, including simpler structure (both source/drain electrodes and the channel region are made of one single patterned AZO film) and biodegradability (completely physical transience within 60 minutes in deionized water). These findings can greatly expand the application area of junctionless transistors.

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/LED.2015.2451672, IEEE Electron Device Letters

Fig. 4. (a) Transfer curves of the junctionless transistors with various semiconducting AZO thickness. (b) Semiconducting AZO thickness dependent of threshold voltage (Vth) and mobility at saturation region (μsat)

working pressure is about 6 mTorr. Then the oxygen gas was turned off, and a 10 nm-thick highly conducting top AZO layer was deposited in ambient environment with gradually reduced oxygen. The size of the AZO pattern is 150 μm × 1000 μm. Finally, the SA membrane with junctionless transistors array was peeled off from the glass substrate. Electrical characteristics were carried out with an Agilent B1500A semiconductor parameter analyzer at room temperature. Fig. 2. (a) Optical transmission spectra of the transistor array. Inset shows the photograph of the fabricated transistors array. (b) Frequency dependent specific capacitances of the SA membrane with the in-plane AZO-SA-AZO structure. Upper inset: Typical leakage curve of the SA membrane with the in-plane AZO-SA-AZO structure. Down inset: Schematic diagram of electric-double-layer formation at the AZO-SA membrane interface.

Fig. 3. (a) Typical output curve of the fabricated transistors with V GS varied from 0 to 0.5V. (b) The transfer curves at VDS=1.0 V. Histograms of (c) mobility and (d) subthreshold slope for 20 transistors within a 2 cm ×2 cm area.

II. EXPERIMENT DETAILS Firstly, SA solutions (3 wt. % in deionized water) were spin-coated onto the glass substrates followed by evaporating the solvent at 350K for 12 hours. Secondly, patterned AZO films (source/drain electrodes and channel region) with different thickness (6 nm, 18 nm, 30 nm, 40 nm, 60 nm and 100 nm) bottom semiconducting AZO layer and 10nm top conducting AZO layer) were deposited on the SA films by magnetron sputtering through a shadow mask method[11]-[13]. The AZO film deposition was performed using an AZO target (98 wt. % ZnO and 2 wt. % Al2O3) with a RF power of 190 W, in an O2 (2 sccm) and Ar (40 sccm) gas atmosphere and the

III. RESULTS AND DISCUSSION Fig. 2 (a) shows the optical transmission spectra of the transistors array on SA membrane (wavelength range from 300 to 900 nm). An average transmittance of 85% in the visible light range is obtained, indicating that the transistors arrays on SA membrane are highly transparent to visible light. The inset of Fig. 2(a) shows a picture of the fabricated transistors array. Fig. 2(b) shows the frequency dependence of the specific gate capacitances of the transistors. Due to the strong lateral electrostatic coupling effects of SA membrane, the in-plane-gate can be effectively coupled to the AZO channel laterally with the electric double layer (EDL) capacitor. A maximal capacitance about 0.5μF/cm2 was measured at 1.0 Hz. This obtained high capacitance is attributed to the formation of an EDL at the AZO electrode/ SA membrane interface [6]-[10] (as illustrated in the down inset of Fig. 2(b)). The upper inset of Fig. 2(b) shows leakage current of those transistors, which indicate that the leakage current is below 60 pA at an applied voltage of 1 V. Fig. 3(a) and (b) show the typical output and transfer characteristics of the junctionless transistors with 18 nm semiconducting AZO layer and 10nm top conducting AZO layer, respectively. We obtained a high on/off ratio of 106 and the threshold voltage (Vth) estimated from the (IDS) 1/2 versus VGS plot is about 0.05 V. We calculated the mobility (μ) in the saturation region by the following equation: WC0 IDS = (VGS -Vth ) 2 2L where the channel length L is 80 μm, and channel width W is 1000 μm and the gate capacitance C0 is 0.5 μF/cm2. The average mobility and subthreshold slope for 20 transistors within a 2 cm ×2 cm area were 4.15cm2/ V·s and 113.8 mV per decade, respectively (see Fig. 3(b) and (c)). These results are comparable to previously reported junctionless transistors with a glass or plastic substrate [11]-[13], indicating that those transistors fabricated on free standing SA membrane still show

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This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/LED.2015.2451672, IEEE Electron Device Letters

adhesive to the bottom glass. Then the thin patterned AZO layer gradually disappears as a result of the reaction ZnO + H 2O ↔ Zn (OH) 2 [3], [10] within 60 minutes.

IV. CONCLUSION

Fig. 5. (a) Static voltage transfer characteristic of the invertor under the supplied voltage of 1 V. (b) The dynamic action of the resistor loaded inverter at VDD=1 V. (c) A set of images of an array of the transistors, at various times after immersion in deionized water at room temperature.

high performance. Fig. 4(a) shows the transfer curves of the transistors with various semiconducting AZO thickness. When the semiconducting AZO layer is 100 nm, the VGS has almost no effect on the IDS. For the semiconducting AZO is 60 nm, the field-effect modulation is still very weak, which is due to the relatively high intrinsic carrier density [15]-[16]. However, when the thickness of the semiconducting AZO layer is decreased to 47 nm, the VGS shows an obvious electric-field modulation and the transistors show a smaller on-state current and a smaller off-state current with reduced semiconducting AZO thickness. Fig. 4(b) shows the semiconducting AZO thickness dependence of threshold voltage (Vth) and mobility at saturation region (μsat). When the semiconducting AZO layer thickness decreased from 47 nm to 6 nm, the threshold voltage (Vth) increased from -0.21 V to 0.35 V and the mobility μsat decreased from 32 to 2.9 cm 2 /V·s. This positive shift of Vth can be explained by the reduction of the carrier density in the patterned AZO thin film and the formation of a channel surface depletion layer as the oxygen adsorbed on the channel surface [14]- [16]. The reduction of mobility at saturation region as the thickness of semiconducting decreased is due to the surface scattering and absorption effect [14] - [16]. These results are in agreement with previously reported In2O3 [14], indium-tin-oxide (ITO) [6], [16] and indium-zinc-oxide (IZO) [6], [15] based transistors. Furthermore, a resistor-loaded invertor was demonstrated by connecting the fabricated junctionless transistors in series with a 3 MΩ resistor (see inset of Fig. 5 (a)). Fig. 5 (a) shows the static voltage transfer characteristic of the invertor under the supplied voltage of 1 V. The output voltage switched near Vin= 0V and the inverter was completely switched within 0.3 V. Those transistors show good inverter behavior with a sufficient voltage gain of 6. Fig. 5 (b) displays the dynamic action of the resistor loaded inverter at VDD=1 V. Fig. 5(c) shows a set of images of the transistors array during dissolution. The SA membrane (about 10 μm) rapidly dissolves within 5 minutes, the array hence disintegrated into individual devices and

In summary, we have successfully demonstrated a fully biodegradable junctionless transistor with extremely simple structure. In those transistors, source/drain electrodes and the channel region are made of one single AZO thin film. Dissolution tests of our devices in deionized water demonstrate their physical transience within 60 minutes. The operation mode of such devices can be effectively tuned from depletion mode to enhancement mode by varying the thickness of the AZO film. Furthermore, a resistor-loaded invertor was demonstrated by connecting those transistors in series with a 3 MΩ resistor. We believe that those fully biodegradable, transparent, flexible, lightweight transistors with extremely simple structure can provide a new opportunity for the low cost application. REFERENCES S. W. Hwang et al., “A physically transient form of silicon electronics,” Science, vol. 337, no. 6102, pp. 1640-1644, Sep. 2012. [2] S. W. Hwang et al., “High Performance Biodegradable/Transient Electronics on Biodegradable Polymers,” Adv. Mater., vol. 26, no. 23, pp. 3905-3911, Apr. 2014. [3] C. Dagdeviren et al., “Transient, biocompatible electronics and energy harvesters based on ZnO,” Small, vol. 9, no. 20, pp. 3398-3404, Apr. 2013. [4] H. Klauk et al., “Ultralow-power organic complementary circuits,” Nature, vol.445, no.7129, pp.745-748, Dec. 2007. [5] J. Robertson et al., “High dielectric constant oxides,” J. Eur. Phys. J. Appl. Phys., vol. 28, no. 03, pp. 265-291, Feb. 2004. [6] J. Jiang, et al., “Transparent junctionless electric-double-layer transistors gated by a reinforced chitosan-based biopolymer electrolyte,” IEEE Transactions on Electron Devices, vol.60, no.6, pp.1951-1957 Jun.2013. [7] J. Zhang, et al. “Laterally Coupled IZO-Based Transistors on Free-Standing Proton Conducting Chitosan Membranes,” IEEE Electron Device Lett., vol. 35, no.8, pp. 838-840, Aug. 2014 [8] C. Wan, et al. “Laterally Coupled Synaptic Transistors Gated by Proton Conducting Sodium Alginate Films,” IEEE Electron Device Lett., vol. 35, no.6, pp. 672-674, Jun. 2014 [9] Y. H. Liu, et al. “Proton conducting sodium alginate electrolyte laterally coupled low-voltage oxide-based transistors,” Appl. Phys. Lett., vol. 104, no.13, pp. 133504-1–133504-4, Mar. 2014. [10] J. Guo, et al., “Low-voltage Transient/Biodegradable Transistors Based on Free-Standing Sodium Alginate Membranes,” IEEE Electron Device Lett., vol. 36, no.6, pp. 576-578, Jun. 2015. [11] J. Jiang, et al., “Junctionless in-plane-gate transparent thin-film transistors,” Appl. Phys. Lett., vol. 99, no.19, pp.193502-1–193502-3, Nov. 2011. [12] J. Zhou, et al., “Flexible transparent junctionless TFTs with oxygen-tuned indium-zinc-oxide channels,” IEEE Electron Device Lett., vol.34, no.4, pp.888-890, Jul.2013. [13] G. Zhang, et al., “Transparent Junctionless Thin-Film Transistors with Tunable Operation Mode,” IEEE Electron Device Lett., vol.34, no.2, pp.265-267, Feb.2013. [14] Joo Hyon. Noh, et al. “Indium oxide thin-film transistors fabricated by RF sputtering at room temperature,” IEEE Electron Device Lett., vol.31, no.6, pp.567-569, Apr.2010. [15] Guodong. Wu, et al. “Low-Voltage Junctionless Oxide-Based Thin-Film Transistors Self-Assembled by a Gradient Shadow Mask,” IEEE Electron Device Lett., vol.33, no.12, pp.1720-1722, Oct.2012. [16] Jie. Jiang, et al. “Junctionless flexible oxide-based thin-film transistors on paper substrates.” IEEE Electron Device Lett., vol.33, no.1, pp.65-67, Oct.2011. [1]

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