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flexible multimode and multiband RF receiver. It proposes a new direct down conversion technique and its advantages using Six-Port techniques. A brief study of ...
Broadband Digital Direct Down Conversion Receiver Suitable for Software Defined Radio Mohamed Ratni, Dragan Krupezevic, Zhaocheng Wang, Jens-Uwe Jürgensen Sony International Europe GmbH, Germany. Advanced Technology Center Stuttgart Broadband Wireless Technology Research E-mail: [email protected]

Abstract While a significant amount of work has been carried out on digital receivers to support flexible and adaptive high data rate processing for multiple systems, small interest has been shown on the RF part and especially the advantages of using a broadband RF front end. This paper presents a challenge raised in the design of a single flexible multimode and multiband RF receiver. It proposes a new direct down conversion technique and its advantages using Six-Port techniques. A brief study of Six-Port based direct down conversion receiver is first presented. Then the functionality of this direct conversion receiver concept is then verified for a multi-carrier system based on HIPERLAN/2 parameters and a single-carrier system based on UMTS-FDD parameters. This new direct down conversion receiver technique is suitable for multi-system platforms and software defined radios.

Introduction The demand for high data rate application transmission has increased drastically in the last decade. Further, wireless communications systems have evolved from voice services to high data rate applications during the last few years. Such broadband applications impose some radio frequency (RF) design challenges. Through the last decade designers have progressively converted the conventional heterodyne architecture to homodyne conversion and then to the low-cost direct down conversion architecture. Direct conversion receiver (DCR) is very appealing particularly for broadband receivers because of its inherent simplicity and low cost, when requires only one major integrated circuit for the RF portion. Moreover, DCR can be implemented on monolithic integration easier than heterodyne receiver and DCR suffers less from bulky expensive filters needed for image rejection. Direct conversion receiver technique has recently become the topic of active research. Among the different direct conversion receiver architectures, the Six-Port receiver is considered as a good candidate [1-2-3] for meeting the above requirements. The Six-Port receiver is used in high frequency microwave analyzers [4] as well as in Direct Conversion Receiver where a wide bandwidth is required [5-6]. Moreover, the Six-Port techniques can afford easily broadband applications and their constrains in respect to the conventional direct

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receivers where the need of an accurate 90 degree phase shifter is needed at a specific frequency. This disadvantage has hindered the direct conversion receiver becoming a mainstream approach in today’s broadband application. This inherent problem can be solved in the six-port technique, because, no mixers are used as in conventional direct receiver but power detectors (PD). These last ones will detect the voltage levels, which is proportional to RF signal. A simple calibration done only once at product manufacture can alleviate the imperfections of the Six-Port chip. Six-Port direct down conversion technique It has been shown that broadband RF front-end receivers are necessary for future wireless communications systems to fulfill the standard requirements of multiband, multimode and multisystem communication system. The RF front end has severe requirements. The receiver architecture design has to cope with different systems, frequencies, power levels and bandwidth. This includes filtering, RF amplification, down conversion and base-band amplification. On the other hand, digital signal processing needs to be reconfigurable and reprogrammable by software downloading. Several design issues exist in direct conversion architecture using Six-Port technique, which require special attention to the front-end design. The choice of the receiver architecture depends first of all on

PIMRC 2002

the system requirements, e.g. The type of access technique (FDMA TDMA, CDMA, and OFDM), modulation type, modulation sub-carriers, channel spacing and symbol rate. All these criteria have to be taken into account in the receiver design. If a monolithic integration (one chip solution) is required, one has to consider process technology issues in order to fulfill low cost, low power consumption, and small size. Direct down conversion concept in the case of SixPort technique means simply a translation of the RF signal to baseband using power readings without any mixer, therefore, no intermediate frequency. The channel filtering is achieved at the baseband using low pass filtering to suppress nearby unwanted signals. Normally additional digital filtering is required, however, the bandwidth can be reconfigurable. Five-Port structure Since the power level of the local oscillator does not change, the number of the output ports can be reduced from four to three. The device is then called Five-Port. This leads to lower cost and smaller size circuit. The Five-Port (FP) DCR is a passive linear device (Figure 2), consisting of two input ports and three outputs. A power divider constituted with a resistive structure and a phase shifter. The Five-Port structure uses power detectors instead of conventional mixers. The structure of the power detector that we are proposing consists of non-biased FET transistor (Figure.1) [4]

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Figure 1: Power detector structure The proposed power detector structure does not need a drain DC-biasing. The basic detector concept relies on deformation of the RF signal with a nonlinear element. In consequence, the RF signal will be decomposed in DC signal component and a number of harmonics.

The DC signal is then proportional to the RF signal amplitude. The main advantage of using a transistor as a power detector is that the power consumption is considerably reduced, while providing at the same time a large dynamic range. On the other hand using a power detector is a key issue to avoid using bulky image rejection filters required for mixers. The basic functionality of the Five-Port consists of a sum of a received RF with a local oscillator (LO) signal under various phase angles. No mixer is needed to perform this combination but only a passive combiner (power divider) is utilized (Figure 2). The first power detector measures the RF signal level. While the second and the third PD measure combined RF and LO signal under various phase angles The power levels at the first PD and the combined signals are used to calculate the in-phase (I) and quadrature (Q) signals. The phase shift θ of the phase shifter is a linear function of the frequency f. The achieved phase shift allows the Five-Port receiver to work in approximately one frequency decade (1-9 GHz). The in-phase (I) and quadrature (Q) signals can be obtained in baseband after a mathematical calculation of the three-output voltage of the power detectors P1, P2, and P3, I = hI 0 + hI 1 P1 + hI 2 P2 + hI 3 P3

(1)

Q = hQ 0 + hQ1 P1 + hQ 2 P2 + hQ 3 P3

(2)

We assume that the local oscillator power level is known and does not change. The coefficients hI 0 , hI 1 , hI 2 , hI 3 and hQ 0 , hQ1 , hQ 2 , hQ 3 correspond to the transfer coefficients of the FivePort receiver. The calibration procedure consists of solving a system equation with four unknowns Four known signals are sent ( I i + jQ i , i = 1,4 ), On the three outputs of the Five-Port, we can measure four levels of each voltages ( Pki , k = 1,3, i = 1,4 ). We can write two sets of equations from which the unknowns (h-coefficients) are found from (3). The calibration procedure can be done only

I1   hI 0   2 h   I 1  = AI −1 ×  I  I 3  hI 2   4    I   hI 3 

 hQ 0   Q1  h   2  Q1  = AQ −1 × Q  (3) hQ 2  Q 3     4 Q   hQ 3 

The calibration procedure can be done once at product manufacturer to take into account component tolerances due to the technology but, could be also achieved at any time. It can also be carried out after that Five-Port has been implemented on the front-end receiver. This will alleviate the imperfections of the receiver front-end. In order to have a multi-band and multi-channel receiver; a channel selection can be achieved by simple tuning of the local oscillator signal. Five-Port direct down conversion structure The direct down converter technique consists of down converting the signal from RF to base band without any mixer and with no intermediate frequency. Figure. 3. shows one of the proposed architecture for broadband RF front-end receiver supporting both mobile and Wireless LAN applications. The circuit architecture operates in the 2 & 5 GHz frequency range and can support up to 20 MHz bandwidth The receiver unit consists of a down-conversion of the transmit RF signal received from the antenna to base band unit. The receiver unit performs first a filtering and amplification before the signal is fed to our main direct down converter circuit after a second amplification. The signal is then down converted from RF to base band using the Five-Port direct down conversion techniques to base-band. The three outputs represent the power reading of the Five-Port. These power levels are then amplified before A/D conversion. Five-Port related digital processing is applied using the three digitized values in order to compute the IQ values. Base-band digital processing The base-band signal processing of the Five-Port receiver consists first of A/D conversion before IQ computation, The base-band DCR concept is depicted in Figure 4. The first step in the IQ computation is to derive the

hI 0 , hI 1 , hI 2 , hI 3 and hQ 0 , hQ1 , hQ 2 , hQ 3 coefficients. As cited above, these coefficients correspond to the transfer function of the Five-Port receiver. Their values are not exactly known, and should be found through the process of calibration. This process consists of sending one modulated RF signal on one input of the Five-Port and a CW signal on the local oscillator (LO) input. The RF signal has different levels (at least three) for each signal the level is known with different phase states. Using equation (1) and (2) one can derive a system equation from which the calibration coefficients are obtained. Note that this calibration is done off line and can be processed in real time. The coefficients are then stored in the memory of the base band unit to calculate the IQ values. After IQ values are derived the system digital processing then applies specific processing to the IQ values. This digital processing consists of filtering, synchronization, FFT, channel estimation, and demodulated IQ constellations. Prototype and test results A prototype test bed of the Five-Port transceiver has been set up (Figure 5). The transmitter unit consists of an up-conversion of base-band signal from the base-band unit, which delivers a signal with up to 20 MHz bandwidth at power of –10 dBm to the input of RF signal. The signal is then up-converted to a frequency range between 2-6 GHz. The output RF signal is fed to the transmit antenna after a RF switch. The purpose of the RF switch is to switch between different standards. The base-band digital processing consists of FPGA based hardware prototyping platform. Therefore a transceiver for the different standard has been implemented: Single-carrier (SC) system based on UMTS-FDD [7] and a multi-carrier system (MC) system based on HIPERLAN/2 [8]. The MC system utilized HIPERLAN/2 like parameters in terms of number of sub-carriers and bandwidth. The SC system utilized UMTS-FDD like parameters in terms of chip rate and bandwidth. The transmitter was implemented on a prototyping board consisting of a FPGA and D/A converters; the receiver was implemented on a prototyping board consisting of a FPGA and A/D converters.

The tests for the transceiver prototype were performed at two different frequencies 5.5 and 2.4 GHz. MC signal using HIPERLAN/2 like parameters in terms of number of carriers and bandwidth where 16 MHz signal has been transmitted and demodulated. Figure 6a. shows the spectrum of the HIPERLAN/2 like transmit signal. Twelve bit A/D converter was used to sample the analog signal out of the Five-Port. Then, IQ values are derived from three power levels based on (1) and (2). After filtering, synchronization was performed. The input signals were then transformed to frequency domain by FFT. Finally channel estimation and equalization were carried out. Figure 6b. Shows the demodulated QPSK constellation signal. SC signal using UTRA-FDD like parameters in terms of chip rate and bandwidth where 5 MHz signal has been transmitted and demodulated. Conclusion New broadband digital direct down conversion techniques and its advantages using Six-Port technique for broadband demodulation have been demonstrated. Baseband aspects of a direct conversion receiver concept utilizing Six-Port technology was also presented. The functionality of this direct conversion receiver concept is verified for a multi-carrier system based on HIPERLAN/2 parameters and a single carrier system based on UTRA-FDD parameters. This new direct down conversion technique is suitable for multi-system platform and software defined radio.

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References [1] Ji Li, R.G.Bossisio and Ke Wu: “A six port direct digital millimeter wave receiver“IEEE MTTSymposium Digest, vol.3. pp1659-1662, San Diego, May 1994 [2] S. O. Tatu, E. Moldovan, K. We, R. Bosisio. “A New Direct Millimeter wave Six-Port Receiver” IEEE Trans on MTT,Vol.49,N.12,pp.25172521,Dec. 2001. [3] J. Hyyrylainen, L. Bogod, S. Kangasmaa, H.O. Schek, T. Ylamurto. “Six-Port Direct Conversion Receiver” EUMC 1997. Conference procedings pp. 341-346. [4] M. Ratni, B. Huyart, E. Bergeault, L. P. Jallet. “A new structure for a six-port reflectometer using a silicon MOSFET transistor for power measurement” IEEE MTT-S Digest, Anaheim CA, USA, 06/99. [5] M.Abe, N.Sasho, V.Brankovic, and D.Krupezevic: “Direct Conversion Receiver MMIC based on Six-Port Technology“, ECWT 2000, Conference Proceedings, pp. 139-142, Paris, October 2000. [6] M. Ratni, D. Krupezevic, V. Brankovic, M. Abe, N. Sasho: “Design Considerations for Direct Conversion Receiver using Five-Port Circuit”; EUWC 2001. [7] Universal Mobile Telecommunications System (UMTS); UE Radio transmission and reception (FDD) (3G TS 25.101 version 3.1.0 Release 1999); ETSI TS 125 101 v3.1.0 (2000-01). [8] Broadband Radio Access Networks (BRAN); HIPERLAN Type 2; Physical (PHY) Layer; ETSI TS 101 475 v1.1.1 (2000-04).

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Figure 2. Five-Port structure

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Figure 4. Direct conversion receiver concept using Five-Port

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Figure 3. Five-Port direct down conversion receiver structure 2 GHz ITx QTx

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Figure 5. Broadband transceiver topology

Figure 6a. Transmit signal spectrum at 5.5 GHz

Figure 6b. Demodulated QPSK constellation