Carbon Nanotubes in Nanopackaging Applications

F

Carbon Nanotubes in Nanopackaging Applications

ANTONIO MAFFUCCI

Facing a hierarchy of limits.

© BRAND X PICTURES & DIGITAL STOCK

F U T U R E NA NOEL ECT RON IC S technology is characterized by many challenging tasks because of the requirements to be met to enable Moore or more than Moore predictions. The physical phenomena involved at nanometric dimensions put serious limits to the possibility of simply continuing to scale the conventional metal/dielectric systems and use the conventional packaging technology [1]. Nanoelectronics applications will face a hierarchy of limits [2]: 1) fundamental limits put by physics, 2) material limits introduced by the degradation of the properties of conventional materials, 3) device limits related to quantum phenomena involved in the transport equations, 4) circuit and system limits, and 5) the limits imposed by assembly and packaging. Packaging will play a crucial role in enabling future nanoelectronics by providing an effective capability of complementing the nanometric device features to the circuit boards. Interconnecting the nanometric devices will be a major problem, especially on the global level. Many of the requirements for technologies below 22 nm—in terms of mechanical behavior, signal and power integrity performance, and heat removal—still fall in the unknown solution area; this pushes toward an unprecedented pace of innovation in new materials, new technology, and new system integration techniques [3].

ANTONIO MAFFUCCI Digital Object Identifier 10.1109/MNANO.2009.934214

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CNTs IN NANOPACKAGING CNTs are recently discovered materials [6] made by rolled-up sheets of graphene (i.e., a monoatomic layer of graphite). They may be made either by a single shell [single-walled CNT (SWCNT) with radius ranging from 0.7 to 3–4 nm] or several nested shells [multiwalled CNT (MWCNT) with outer radius typically of the order of some tens of nanometers], as in Figures 2 and 3. The length of a nanotube may reach the order of millimeters, and hence, this nanostructured material exhibits an excellent form factor, able to comply with the ultrafine pitches required in nanopackaging. This material is taken into consideration because of its unique electrical, mechanical, and thermal properties. Although not yet well assessed in terms of exact values, experimental measurements of the CNT properties confirm this outstanding behavior, as reported in

5 4.5 Resistivity (μΩ ⋅ cm)

Assembly approaches are moving toward the system-level integration paradigm and new packaging technologies are proposed, e.g., three-dimensional (3-D) system integration, wafer-level packaging, and electro/optical integration. The conventional materials used so far in the packaging, such as Cu interconnects, ultralow k dielectrics, high k dielectrics, and lead-free materials, show dramatic limits at nanoscale. For instance, nanometric copper interconnects exhibit a steep increase of resistivity with size shrinkage, related to phenomena like surface and grain boundary scattering and electromigration (Figure 1). Another example of an open problem for nanopackaging is the solder, since the classical lead-free solutions are expected to be inadequate in terms of thermal, mechanical, and electrical performances [1]. The conventional materials themselves may be reinvented to meet these requirements: for instance, it has been recently proposed to use nanostructured copper or nickel pillars to enhance their performances [4], [5]. A possibility under investigation is, of course, the use of new materials in nanopackaging, such as carbon nanotubes (CNTs), nanowires, nanoparticles, and macromolecules.

4 3.5 3 2.5 2 1.5 20

Bulk Value 30

40

50 60 70 Line Width (nm)

80

90

100

FIGURE 1 Copper resistivity versus line width [3].

Table 1 [7]–[10]. CNTs are considered an emerging research material [3], able to meet many of the new requirements for bonding, molding compound, underfill, thermal interface, and die attach. Using CNTs as a filler in conducting adhesives may significantly improve the

also been demonstrated to improve the quality of soldering [1].

THERMAL AND ELECTRICAL BEHAVIOR OF CNTs Besides the earlier applications, the main reason pushing toward the use of CNTs

The electrical performances of a CNT are strongly influenced by the kinetic and quantum phenomena affecting its electrodynamics. performance in terms of mechanical strength and thermal conductivity [11]. Furthermore, the addition of CNTs has

FIGURE 2 The structure of an SWCNT.

FIGURE 3 A bundle of CNTs.

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TABLE 1

Properties of CNTs compared to copper.

PROPERTY

Maximum current density (A/cm2) Thermal conductivity [W/(m.K)] (Low bias) mean free path (nm)

SWCNT

MWCNT

Cu

Up to 10 9 Up to 6,000 Up to 1,600

Up to 10 9 Up to 3,000 Up to 2310 4

~10 6 ~400 ~40

Number of Effective Conduction Channels

in nanopackaging is the possibility to achieve both good electrical performances and implementing new heat-removal technologies. The thermal management of future nanoelectronics requires new approaches, because the classical heatremoval techniques are inadequate.

Using the conventional approach, for instance, the cooler for future systems in package would require much greater volume than the semiconductor itself. Recently, CNTs have been proposed as microchannel coolers in thermofluidic cooling approaches [12]. Research is also

7 Semiconducting Metallic

6 5 4 3 2 1 0

0

10

20 30 40 CNT Diameter (nm)

50

60

FIGURE 4 Number of effective conduction channels versus CNT diameter.

Normalized Resistance

2

1.5

1

SWCNT MWCNT Cu

0.5

0 10

15

20

25 30 35 Frequency (GHz)

40

45

50

FIGURE 5 Parasitic resistance (normalized to the Cu dc value) versus frequency for a nanoscale pillar interconnect.

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in progress to use CNTs as thermal interface material (TIM), whose junction-toambient thermal resistance for the 14-nm node is supposed to reduce to less than 0.2 °C/W. The thermal properties of CNTs may be exploited to get this result while retaining mechanical stability and good adhesion during chip operation [9]. The main limitation to the use of CNTs as TIM is still given by the possibility of integrating a high density of aligned CNTs in a polymer matrix without degrading thermal conductivity. The electrical performances of a CNT are strongly influenced by the kinetic and quantum phenomena affecting its electrodynamics. Many circuit models for CNT interconnects may be obtained, either starting from semiclassical approaches [13]–[15] or phenomenological ones [16]; all these models show the presence of a kinetic inductance in addition to the classical magnetic one and of a quantum capacitance besides the electrostatic one. The presence of such parameters gives the CNTs some unusual properties in terms of electrical propagation, compared with conventional interconnects. In addition, the resistance is given by a lumped term (contact resistance) showing a bulk value even for perfect CNT/metal contacts (6.45 kV for an isolated CNT) and by a distributed term, which vanishes when ballistic transport conditions are considered. Because the CNT may be metallic or semiconducting depending on its chirality, i.e., the way it is rolled up, a general circuit model may be obtained by relating all the earlier parameters to the number of effective channels that contribute to the electrical conduction, computed for arbitrary chirality [17]. For typical values of SWCNT radius, each metallic CNT contributes two channels, whereas a semiconductor one does not contribute. In an SWCNT bundle, only a fraction of one third of the total CNTs is metallic. For typical radius values of MWCNT shells, instead, the semiconductor CNTs give nonnegligible contribution to the conduction, as shown in Figure 4, which refers to a temperature of T = 267 K. Therefore, for CNTs to be used for vertical vias or interconnects for packaging applications, very high-density

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a typical frequency behavior of the parasitic resistance introduced by Cu and CNT pillar interconnects, compatible with the requirements for a 20-µm wire bond pitch. Both the CNT solutions are insensitive to the frequency increase. The road for CNTs × 100 100 μm 17 60 30P4 15 kV to replace copper in chip packaging is still long, but the gap between FIGURE 6 The CNT bumps demonstrated in [21]. theoretical predictions and practical applications is reducing faster and faster. In [21], SWCNT bundles must be demonstrated. the use of vertical MWCNT bundles as When using MWCNT bundles instead, bumps for flip-chip interconnects, instead the achieved density comes from a comof solder bumps, has been successfully promise between the CNT radius and demonstrated for the first time, Figure its shell number. The fabrication pro6. In [22], CNTs have been used for the cess must provide low contact resistance, first time for wiring a conventional chip. good direction control, and compatibilThese examples of the successful inteity with CMOS technology. Satisfactory gration between CNTs and ICs are only results have been achieved for vertical vias some of the testimonials of this technoin terms of densities, direction control, logical trend. CMOS compatibility, and contact resistance, both for SWCNT and MWCNT bundles [3], [18]. Recently, the possiABOUT THE AUTHOR bility of an efficient postgrowth densifiAntonio Maffucci (maffucci@unicas. cation of CNTs in a micropillar has also it) is a professor of electrical engineerbeen demonstrated [19]. The same good ing at the Faculty of Engineering, Uniresults, however, are not obtained in the versità di Cassino, Italy. He is with the fabrication of CNT interconnects parallel Elettrotecnica Group at the Dipartimento the substrate, which remains a chalto di Automazione Elettromagnetismo, lenging task. Ingegneria dell Informazione e MatematWhen good-quality CNT bundles are ica Industriale. He is an associate ediobtained, vias and interconnects made by tor of IEEE Transactions on Advanced this material outperform copper in terms Packaging and a Member of the IEEE of resistance at intermediate and global Nanotechnology Council Nanopackaglevels, whereas at the local level, the ing Technical Committee. behavior is comparable [18], [20]. However, the performances are even better REFERENCES [1] J. E. Morris, Nanopackaging: Nanotechnologies and when considering very high-frequency Electronics Packaging. New York: Springer-Verlag, operating conditions, because CNT bun2008. [2] J. D. Meindl and J. A. Davis, “The fundamental dles are quite insensitive to the proximity limit on binary switching energy for terascale inteeffect and to the skin effect [14], [18]. gration,” IEEE J. Solid-State Circuits, vol. 35, no. 10, p. 1515, 2000. This behavior is related to the presence of [3] ITRS. (2007). International technology roadmap kinetic inductance, which is usually three for semiconductors, edition 2007 [Online]. Available: http://public.itrs.net to four orders of magnitude greater than [4] R . R Tummala, P. M. R aj, A. Aggar wal, G. the magnetic one. This feature is parMehrotra, S. W. Koh, S. Bansal, T. T. Tiong, C. K. Ong, J. Chew, K. Vaidyanathan, and V. S. ticularly promising for vias, which suffer Rao, “Copper interconnections for high-perforfrom the problem of high-frequency curmance and fine pitch flipchip digital applications and ultra-miniaturized R F module applications,” rent crowding, with increase of parasitic in Proc. Electronic Components and Technology resistance and heating. Figure 5 shows Conf., 2006, pp. 102–111.

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