energies Article
Common Grounded H-Type Bidirectional DC-DC Converter with a Wide Voltage Conversion Ratio for a Hybrid Energy Storage System Huakun Bi, Ping Wang *
ID
and Zhishuang Wang
School of Electrical and Information Engineering, Tianjin University, Tianjin 300072, China;
[email protected] (H.B.);
[email protected] (Z.W.) * Correspondence:
[email protected] Received: 2 January 2018; Accepted: 23 January 2018; Published: 2 February 2018
Abstract: Hybrid energy storage systems (HESS) play an important role in maintaining the power balance of a direct current (DC) micro-grid. A HESS is mainly composed of high power density super-capacitors (SCs) and high energy density batteries. According to the operational requirements of an SC, a bidirectional DC-DC converter with the characteristics of a good dynamic response and a wide voltage conversion ratio is needed to interface the SC and a high-voltage DC bus. In this paper, a novel common grounded H-type bidirectional converter characterized by a good dynamic response, a low inductor current ripple, and a wide voltage conversion ratio is proposed. In addition, it can avoid the narrow pulse of pulse width modulation (PWM) voltage waveforms when a high voltage conversion ratio is achieved. All of these features are beneficial to the operation of the SC connected to a DC bus. The operating principle and characteristics of the proposed converter are presented in this paper. A 320 W prototype with a wide voltage conversion ranging from 3.3 to 8 in step-up mode and 1/8 to 1/3 in step-down mode has been constructed to validate the feasibility and effectiveness of the proposed converter. Keywords: H-type bidirectional DC-DC converter; good dynamic response; hybrid energy storage system; wide voltage conversion ratio
1. Introduction With the high penetration of direct current (DC) energy sources, storage, and loads, DC micro-grids are becoming more prevalent due to a lower number of power converters compared with an alternating current (AC) micro-grid [1–3]. Because of the intermittent nature of renewable energy sources and unpredictable load fluctuations in DC micro-grids, the problem of power imbalance may appear and affect the operation of DC micro-grids. Therefore, energy storage systems (ESs) are always installed to maintain the power balance of the DC micro-grid [4,5]. ESs can be divided into a power density type and an energy density type based on their characteristics [6,7]. Unfortunately, there is no single type of ES that fulfills all expected features [8]. Therefore, it is an economic and effective solution to use a hybrid energy storage system (HESS) composed by different characteristics of ESs [9–11]. Generally, a HESS is mainly composed of high power density super-capacitors (SCs) and high energy density batteries. It is desirable to balance the steady-state power imbalance by the batteries and compensate for the transient power imbalance by an SC with fast dynamics [12–14]. As a result, the degradation impact on the batteries caused by sudden load changes can be greatly reduced, and the dynamic response of the whole DC micro-grid can also be improved [15,16]. As mentioned above, high power density SCs play an important role in a HESS. However, the output voltage of an SC is relatively low and changes widely. In order to connect the SC to a high voltage level DC bus and to achieve a bidirectional power flow for the SC, a wide voltage conversion Energies 2018, 11, 349; doi:10.3390/en11020349
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ratio bidirectional DC-DC converter is needed. Considering that the SC needs to compensate for transient power, the bidirectional DC-DC converter needs to have the feature of an outstanding dynamic response. Many isolated and non-isolated bidirectional converters present in the literature can achieve a wide voltage conversion ratio. Due to using a high-frequency transformer, the isolated bidirectional converters can obtain a wide voltage conversion ratio in the step-up and step-down modes by adjusting the turns ratio of the transformer. Because of the use of a transformer and a high number of switching devices, the cost and switching losses of these converters will be increased and the control schemes will be more complicated [17–20]. From the viewpoint of system cost-saving and improving system efficiency, a non-isolated DC-DC converter is more suitable for HESS applications [21,22]. Research on non-isolated converters is focused on coupled-inductor, switched-capacitor, switchedinductor, voltage-multiplier, and multi-stage/-level techniques [23]. The coupled-inductor-based converter in [24] can have a higher voltage gain, and also reduce the reverse recovery losses of the diodes. However, the current ripple of the low-voltage side is relatively large, which may damage the low-voltage side source. With a simple structure, switched-capacitor converters are easy to expand. At the same time, the control methods of these converters are also simple. In different switching states, the energy of the capacitors in these converters can be delivered through different paths, making it easier for these converters to achieve a high voltage gain [25–28]. Switched-inductor converters can also achieve a wide voltage conversion ratio while avoiding extreme duty cycles. At the same time, the voltage stress of the power semiconductors in these converters can be reduced. However, more inductors affect the power density of these converters [29,30]. In [31], a new non-isolated single capacitor bidirectional DC-DC converter with a simple structure and a wide voltage conversion ratio is presented. However, the voltage stress of the power semiconductor is relatively high. A common ground switched-quasi-Z-source bidirectional DC-DC converter is presented in [32]. The advantages of this converter are a wide voltage conversion ratio and a lower voltage stress across the power switches. However, with the low voltage level (240 V) and low rated power (300 W), the volume of the capacitors (470/520 uF) and inductors (434/600 uH) is high, which results in a lower power density for this converter. This paper presents a novel common grounded H-type bidirectional DC-DC converter, which not only achieves a wide voltage conversion ratio, but also has the advantages of a low inductor current ripple and a good dynamic response. In addition, a clamp capacitor is used in this converter to keep all of the power switches turned on and off only once during each switching period, aiming at reducing switching losses and avoiding narrow pulses of the pulse width modulation (PWM) voltage waveform at high voltage gain. These features are beneficial to improve the efficiency and reliability of this converter and its suitability for HESS applications. As shown in Figure 1, a HESS contains a battery and an SC. The SC outputs are varying low dc voltages (25–60 V) which cannot be used directly, and must be regulated via the bidirectional converter. The proposed converter can fulfill the task well. The remainder of this paper is structured as follows. In Section 2, the novel H-type bidirectional DC-DC converter topology and operating principles are proposed. In Section 3, the characteristics of the proposed converter are analyzed and its small signal model is established. Experimental results for the proposed converter are provided in Section 4. The conclusion of this paper is introduced in Section 5.
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Figure 1. Configuration of the hybrid energy storage system (HESS). DC: direct current.
Figure 1. Configuration of the hybrid energy storage system (HESS). DC: direct current. Figure 1. Configuration of the hybrid energy storage system (HESS). DC: direct current. 2. Operating Principles of the Proposed Converter
2. Operating Principles of the Proposed Converter 2. Operating Principles of the Proposed Converter 2.1. Configuration of the Proposed Converter
2.1. Configuration of the Proposed Converter
The configuration of the proposed converter is depicted in Figure 2. This converter is composed 2.1. Configuration of the Proposed Converter
of a capacitor-clamped H-type structure (Q1–Q4 and C1), an inductor, power Q5, and two The configuration of the proposed converter is depicted in Figurea 2. This switch converter is composed The configuration of the proposed converter is depicted in Figure 2. This converter is composed filter capacitors C high and C low . To simplify the analysis, it is assumed that the capacitors and inductor of a capacitor-clamped H-type structure (Q1(Q –Q1–Q C ), an inductor, a power switch Q55,, and 4 and of a capacitor-clamped H-type structure 4 and 1C1), an inductor, a power switch Q and two two filter are large enough and . all of the power semiconductors are ideal.that In order to protectand the inductor SC, the are capacitors C and C To simplify the analysis, it is assumed the capacitors high low filter capacitors Chigh and Clow. To simplify the analysis, it is assumed that the capacitors and inductor converter operates in the input current continuous model (CCM). largeproposed enough all of theallpower are ideal. order to protect the SC, are large and enough and of thesemiconductors power semiconductors are In ideal. In order to protect thethe SC,proposed the converter operates in the input current continuous model (CCM). proposed converter operates in the input current continuous model (CCM). i low
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Figure 2. Configuration of the proposed converter. Figure 2. Configuration of the proposed converter.
2.2. Operating Principles Figure 2. Configuration of the proposed converter. 2.2. Operating Principles 2.2.1. Step-Up Mode of the Proposed Converter
2.2. Operating Principles
shownMode in Figure 2, Proposed Ulow can be stepped-up to Uhigh by controlling the power semiconductors 2.2.1.As Step-Up of the Converter
2.2.1.QStep-Up of the Proposed 1, and Q2.Mode The relationship betweenConverter d1 and d2 can be written as d1 = d2 = dBoost, where d1 and d2 are the
As shown in Figure 2, Ulow can be stepped-up to Uhigh by controlling the power semiconductors duty cycles of Q1 and Q2, respectively. The phase difference between the gate-driving signals S1 and
Q1, shown and Q2. The relationship between 1 and d2 can be as dcontrolling 1 = d2 = dBoost,the where d1 and d2 are the As in Figure 2, Ulow can bedstepped-up towritten Uhigh by power semiconductors S2 is 180°. During one switching period, the converter has three switching states, and their sequence dutyQcycles of Q 1 and Q2, respectively. The phase difference between the gate-driving signals S1dand Q1 , and . The relationship between d and d can be written as d = d = d , where 2 1 2 1 2 the typical Boost waveforms. 1 and d2 is ”10-00-01-00-10”. Figure 3 shows the energy flow paths and Figure 4 shows S 2 is 180°. During one switching period, the converter has three switching states, and their sequence are the duty cycles Q1 and Q2 , respectively. The phase differenceturn between gate-driving signals Due to using theof clamp capacitor C1, all of the power semiconductors on andthe off only once during is ”10-00-01-00-10”. Figure 3 shows the energy flow paths and Figure 4 shows the typical waveforms. S1 and S2switching is 180◦ . During each period. one switching period, the converter has three switching states, and their Due to using the clamp capacitor C1, all of the power semiconductors turn on and off only once during sequenceWhen is “10-00-01-00-10”. Figure 3 shows the energy and 4 shows the typical S1S2 = 10: As shown in Figure 3a, where switchflow S1 is paths ON and S2 isFigure OFF. The anti-parallel each switching period. diodes of Q4 to and Q5 are biased, while the of anti-parallel of Q3 is reverse waveforms. Due using theforward clamp capacitor C1 , all the powerdiode semiconductors turnbiased. on andThe off only When S1S2 = 10: As shown in Figure 3a, where switch S1 is ON and S2 is OFF. The anti-parallel L is charged fromperiod. the input source. Current iL rises linearly. The load is supplied by C1 and once inductor during each switching diodes of Q4 and Q5 are forward biased, while the anti-parallel diode of Q3 is reverse biased. The Chigh. Clamp capacitor C 1 maintains the forward bias of the anti-parallel diodes of Q5. When S1LSis 10: Asfrom shown Figure 3a, Current where switch S1 is ONThe and S2 is is supplied OFF. Thebyanti-parallel 2= inductor charged the in input source. iL rises linearly. load C1 and diodes Q4 and Q5 are while anti-parallel Q53. is reverse biased. Chighof . Clamp capacitor C1 forward maintainsbiased, the forward biasthe of the anti-paralleldiode diodes of of Q The inductor L is charged from the input source. Current iL rises linearly. The load is supplied by C1 and Chigh . Clamp capacitor C1 maintains the forward bias of the anti-parallel diodes of Q5 .
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When S1S2 = 00: As shown in Figure 3b, both switches S1 and S2 are OFF. The anti-parallel diodes S1 SQ2 5=are 00:forward As shown in Figure 3b, bothCswitches S1are and S2 are OFF. anti-parallel diodes of Q3When , Q4, and biased. Capacitors 1 and Chigh charged fromThe L. The load is supplied of Q , Q , and Q are forward biased. Capacitors C and C are charged from L. The load is supplied by L.3 There is no5 energy exchange between capacitors C1 high and Chigh. 4 1 by L.When There Sis1Sno capacitors C1 and . and S2 is ON. The anti-parallel 2 =energy 01: As exchange shown in between Figure 3c, where switch S1Cishigh OFF When S S = 01: As shown in Figure 3c, where switch S is OFF S2 reverse is ON. The anti-parallel diode of Q3 is1 forward biased, while the anti-parallel diodes of1 Q4 and and Q5 are biased. Inductor 2 diode of Q is forward biased, while the anti-parallel diodes of Q and Q are reverse biased. Inductor L is charged by output capacitor 3 from the input source. Current iL rises linearly. The 4load is supplied 5 L high is charged from the the voltage input source. Current C . In this case, of capacitor C1iremains steady.The load is supplied by output capacitor L rises linearly. Chigh . In this case, the voltage of capacitor C1 remains steady. ilow
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(c) Figure 3. Energy flow paths of the proposed converter in the step-up mode; (a) S1 S2 = 10; (b) S1 S2 = 00; Figure 3. Energy flow paths of the proposed converter in the step-up mode; (a) S1S2 = 10; (b) S1S2 = 00; (c) S1 S2 = 01. (c) S1S2 = 01.
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Figure 4. Typical waveforms converter step-up mode. Figure 4. Typical waveformsof of the the proposed proposed converter inin thethe step-up mode.
Step-Down Mode ProposedConverter Converter 2.2.2.2.2.2. Step-Down Mode of of thethe Proposed As shown in Figure 2, Uhigh can be stepped down to Ulow by controlling the power
As shown in Figure 2, Uhigh can be stepped down to Ulow by controlling the power semiconductors semiconductors Q3, Q4, and Q5. The relationship between d3, d4, and d5 can be written as d3 = d4 = d5 = Q3 , Qd4Buck , and Q5 . The relationship between d3 , d4 ,ofand d5 4can be written as d3 = The d4 =phase d5 = ddifference Buck , where d3 , , where d3, d4, and d5 are the duty cycles Q3, Q , and Q5, respectively. d4 , and d5 arethe thegate-driving duty cycles of Q3S,3 Q The phase between the 4 , and 5 , respectively. between signals and S4 isQ180°. The gate-driving signal Sdifference 5 = S4. During one ◦ . The gate-driving signal S = S . During one switching period, gate-driving signals S and S is 180 3 converter 4 5 4 switching period, the has three switching states, and their sequence is ”111-100-111-011the converter has5 three and and theirFigure sequence is “111-100-111-011-111”. Figureeach 5 shows 111”. Figure showsswitching the energystates, flow paths 6 shows the typical waveforms. During switching period, of the power semiconductors also turn on andDuring off once. the energy flow pathsall and Figure 6 shows the typical waveforms. each switching period, all of S3S4S5 = 111: The stateoff is shown the powerWhen semiconductors alsoswitching turn on and once. in Figure 5a, where switches S3, S4, and S5 are ON. The anti-parallel diodes of Q 1 and Q2 are forward biased. The high-voltage side Uhigh and When S3 S4 S5 = 111: The switching state is shown in Figure 5a, where switches S3 , S4 , and S5 capacitor C1 charge the inductor L, and simultaneously provide energy to the load in the low-voltage are ON. The anti-parallel diodes of Q1 and Q2 are forward biased. The high-voltage side Uhigh and side. The current iL rises linearly. capacitor C1 charge the inductor L, and simultaneously provide energy to the load in the low-voltage When S3S4S5 = 100: The switching state is shown in Figure 5b, where switch S3 is ON and switches side. SThe current iL rises 4 and S5 are OFF. Thelinearly. anti-parallel diode of Q2 is forward biased, while the anti-parallel diode of Q1 When S S S = 100: The switching state is shown Figure 5b, where switch S3 isThe ONcurrent and switches 3 biased. 4 5 is reverse Inductor L provides energy to theinload in the low-voltage side. iL S4 and S5 are OFF. The anti-parallel diode of Q2 is forward biased, while the anti-parallel diode of decreases linearly. Q1 is reverse biased. L provides energy to the load in5c,the low-voltage iL When S3S4S5 =Inductor 011: The switching state is shown in Figure where switches Sside. 4 and The S5 arecurrent ON and S3linearly. is OFF. The anti-parallel diode of Q1 is forward biased, while the anti-parallel diode of Q2 is decreases reverseSbiased. Inductor L provides energy to the load in the low-voltage side. The current iL When 3 S4 S5 = 011: The switching state is shown in Figure 5c, where switches S4 and S5 are ON decreases linearly. Capacitor C 1 is charged by the high-voltage side Uhigh. The clamp capacitor C1 and S3 is OFF. The anti-parallel diode of Q1 is forward biased, while the anti-parallel diode of Q2 is maintains the power switch Q5 ON. reverse biased. Inductor L provides energy to the load in the low-voltage side. The current iL decreases linearly. Capacitor C1 is charged by the high-voltage side Uhigh . The clamp capacitor C1 maintains the power switch Q5 ON.
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ihigh
Clow UC1
Q4
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Uhigh
Q2
(c) Figure 5. Energy flow paths of the proposed converter in the step-down mode; (a) S3 S4 S5 = 111; Figure 5. Energy flow paths of the proposed converter in the step-down mode; (a) S3S4S5 = 111; (b) (b) S3 S4 S5 = 100; (c) S3 S4 S5 = 011. S3S4S5 = 100; (c) S3S4S5 = 011.
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iL
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T/2
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t
Figure 6. 6. Typical Typical waveforms waveforms of of the the proposed proposed converter Figure converter in in the the step-down step-down mode. mode.
2.2.3. Synchronous Rectification Mode of the Proposed Converter Converter The on-state resistance of the power switch is lower than its corresponding anti-parallel anti-parallel diode. diode. As mentioned above, current flow into the corresponding anti-parallel diodes of the slave power switches higher conduction losses and lower efficiency. In orderIntoorder improve efficiency, switches will willresult resultin in higher conduction losses and lower efficiency. to the improve the the proposed synchronous rectifier technology [33,34]. efficiency, theconverter proposeduses converter uses synchronous rectifier technology [33,34]. The synchronous rectification operation principle of of the the proposed proposed converter converter is is shown shown in in Figure Figure 7. 7. Figure 7a shows shows the thegate gatesignals signalsofofSS step-up mode and Figure shows signals 1–S 5 in step-up mode and Figure 7b 7b shows thethe gategate signals of Sof 1– 1 –S 5 in S15 –S in step-down mode. In step-up mode, the current has to fully intocorresponding the corresponding in5step-down mode. In step-up mode, the current has to fully flow flow into the antianti-parallel diodes the slave power switches , Q4Q , and Q5 dead at thetime deadtdtime td . the When thepower slave parallel diodes of theofslave power switches Q3, QQ 4, 3 and 5 at the . When slave power switches arethe ON,current the current almost flows MOSFETS due theirlower loweron-resistance on-resistance as switches are ON, almost flows intointo the the MOSFETS due tototheir shown in same asas with thethe step-up mode as in Figure Figure 7c. 7c. In Instep-down step-downmode, mode,the thecurrent currentflow flowpath pathisisthe the same with step-up mode shown in Figure 7d.7d. TheThe only difference is that thethe slave power switches areare Q1 Q and Q2 .Q2. as shown in Figure only difference is that slave power switches 1 and When the ofof the slave power switches at the current current flows flowsinto intothe thecorresponding correspondinganti-parallel anti-paralleldiodes diodes the slave power switches dead time, thethe forward voltage drops of the diodes are close to zero. As a result, the slave at dead time, forward voltage drops of anti-parallel the anti-parallel diodes are close to zero. As a result, the active powerpower switches turn on andon turn with The turn on/off losses losses of the slave slave active switches turn andoff turn offzero withvoltage. zero voltage. The turn on/off of theactive slave power switches will notwill be not increased and theand efficiency of the converter can be improved. active power switches be increased the efficiency of the converter can be improved.
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Figure 7. Synchronous rectification operation principle of the proposed converter; (a) Gate signals Figure 7. Synchronous rectification operation principle of thethe proposed converter; (a) Gate signals and Figure Synchronous rectification principle (a) Gate signals and7.dead time in step-up mode; (b)operation Gate signals and deadof time inproposed step-downconverter; mode; (c) Current flow dead time in step-up mode; (b) Gate signals and dead time in step-down mode; (c) Current flow path and dead time in step-up mode; (b) flow Gatepath signals and deadmode. time in step-down mode; (c) Current flow path in step-up mode; (d) Current in step-down
in step-up mode;mode; (d) Current flow path step-down mode.mode. path in step-up (d) Current flow in path in step-down 2.3. Control Strategy for Bidirectional Power Flow
2.3. Control Strategy Strategy for Bidirectional Power Flow 2.3. Control Flowshould be able to respond to fast bidirectional power For a HESS,for theBidirectional SC interfacePower converter fluctuations Therefore, a virtual capacitor droop control is adopted for this For HESS,immediately. the SC SC interface interface converter should be able able to (VCD) respond to fast fast bidirectional power For aa HESS, the converter should be to respond to bidirectional power converter. At the same time, the battery interface converter uses a virtual resistance droop (VRD) fluctuations Therefore, a virtual capacitor droopdroop (VCD)(VCD) controlcontrol is adopted for this converter. fluctuationsimmediately. immediately. Therefore, a virtual capacitor is adopted for this control to make the battery provide total power at steady state. Due to using the VCD and VCR At the sameAt time, battery converter usesconverter a virtual resistance droop (VRD) control make converter. the the same time,interface the battery interface uses a virtual resistance droopto(VRD) control, the HESS can adapt to the distributed nature of the DC micro-grid and increase system the battery provide total power at steady state. Dueattosteady using the VCD and control, the HESS can control to make battery provide total power state. Due toVCR using theAsVCD and reliability andthe scalability [35,36]. The specific control strategy is shown in Figure 8. shown in VCR adapt to the distributed nature of the DC micro-grid and increase system reliability and scalability [35,36]. control, the8,HESS can adapt to the distributed nature of the DC micro-grid system Figure the voltage controller is used to follow the reference voltage Uref. The voltage Uincrease high and the The specific control strategy is in specific Figure 8.control As shown in Figure 8, the voltage controller is used to reliability and scalability The strategy is shown inthe Figure 8.current As shown in currents ihigh-sc and ihigh-bat[35,36]. areshown obtained by the sensor samplings. ihigh-sc refers to output of follow reference voltage Uand voltage and the currents ihigh-sc ihigh-bat areUobtained by Figure 8,SC the voltageconverter controller used to follow the reference voltage Urefand . The voltage high and the ref .isiThe high thethe interface high-bat refers toUthe output current of the battery interface converter. the sensor samplings. i refers to the output current of the SC interface converter and i refers currents ihigh-sc and ihigh-bat are obtained by the sensor samplings. ihigh-sc refers to the output current of high-sc high-bat Virtual to current of the and battery interface thethe SCoutput interface converter ihigh-bat refers converter. to the output current of the battery interface converter. Capacitance ihigh-sc
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(a) Figure 8. Cont.
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Battery stacks
(b) Figure 8. Control strategy for bidirectional power flow; (a) virtual capacitor droop (VCD) control; Figure 8. Control strategy for bidirectional power flow; (a) virtual capacitor droop (VCD) control; (b) (b) virtual resistance droop (VRD) control. virtual resistance droop (VRD) control.
The The operation operation modes modes of of the the proposed proposed converter converter switch switch between between the the step-down step-down and and step-up step-up modes modes according to the necessary conditions of a general load. The current relationship at the DC according to the necessary conditions of a general load. The current relationship at the DC bus bus is is expressed as expressed as iHESS = ihigh−sc + ihigh−bat (1) iHESS ihigh-sc ihigh-bat (1) where iHESS is the equivalent load current of the HESS and can be either positive or negative. The output where iHESS is the equivalent loadofcurrent of the HESS and can beunder either or negative. voltage–current (V–I) relationship the battery interface converter thepositive VRD control and thatThe of output voltage–current (V–I) relationship of the battery interface converter under the VRD control the SC interface converter under the VCD control are given by and that of the SC interface converter under the VCD control are given by Uhigh = U ∗ref − Rvb ihigh−bat U high U *ref Rvbihigh-bat (2) (2) U U high 11 i U * high-sc−sc = U ∗refref − sCvc ihigh high
sCvc
where is the the virtual virtual resistance resistance and is the the virtual virtual capacitance. capacitance. Based Based on on (1) (1) and and (2), (2), the the currentcurrentwhere RRvb vb is and C Cvc vc is sharing relationship between battery and SC is derived as sharing relationship between battery and SC is derived as −bat = ihigh ihigh-bat
11 iHESS sRvb Cvc +i1HESS
sRvbCvc 1
sRvbCvc 1
. i sRsRvbvb CCvcvc i HESS high −sc = sRvb ihigh-sc Cvc +1iHESS
.
(3) (3)
3. Characteristics of the Proposed Converter
3. Characteristics of the Proposed Converter 3.1. Wide Voltage Conversion Ratio 3.1. Wide Voltage Conversion Ratio 3.1.1. Voltage Conversion Ratio in Step-Up Mode the proposed converter shown in Figure 3.1.1.For Voltage Conversion Ratio in Step-Up Mode2, the voltage conversion ratio can be derived from the volt-sec balance of the inductor L. According to Figure 3a, Q4 and Q5 are ON, so that the voltages proposed converter in Figure the voltage conversion ratiothe canequations be derived from of C1For andthe Chigh are equal. In theshown low-voltage side2,current continuous model, can be the volt-sec balance of the inductor L. According to Figure 3a, Q 4 and Q5 are ON, so that the voltages obtained as follows: ( of C1 and Chigh are equal. In low-voltage side current continuous model, the equations can be 2Uthe low dBoost + (Ulow − Uhigh )(1 − 2dBoost ) = 0 (4) obtained as follows: UC1 = Uhigh 2U low d Boost +(U low U high )(1 2d Boost ) = 0 where UC1 is the voltage over C1 . By simplifying (1), the following equation can be derived: U C1 = U high (
Uhigh = 1−2d1 Ulow Boostfollowing where UC1 is the voltage over C1. By simplifying (1), the . equation can be derived: UC1 = Uhigh U high
1
U low
1 2d Boost converter . The voltage conversion ratio MBoost of is the proposed U = U high C1
The voltage conversion ratio MBoost of the proposed converter is
(4) (5)
(5)
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MBoost =
(6) (6)
1 M Boost 1 − 2dBoost 1 2d Boost
where 0 < dBoost < 0.5. where 0 < dBoost < 0.5. 3.1.2. Voltage Conversion Ratio in Step-Down Mode 3.1.2. Voltage Conversion Ratio in Step-Down Mode According to Figure 5c, the power switches Q4 and Q5 are ON, so that the voltages of C1 and According Figure 5c, the power switches Q4 andprinciple Q5 are ON, the voltages of C1 and Chighin Chigh are equal.toBy applying the volt-second balance onso L,that the voltage conversion ratio are equal. applying as the volt-second balance principle on L, the voltage conversion ratio in CCM CCM can By be obtained can be obtained as ( (Ulow − Uhigh )(2dBuck − 1) + 2Ulow (1 − dBuck ) = 0 . (7) low U high )(2d Buck 1) 2U low (1 d Buck ) = 0 (UU UC1 = . high (7) U C1 = U high
By simplifying (7), the following equation can be derived: By simplifying (7), the following equation can be derived: ( Ulow 2d −U1high )Uhigh U low= ((2 d Buck Buck 1) UC1 = U U C1 = U high high
(8)(8)
The ininstep-down Thevoltage voltageconversion conversionratio ratioM MBuck step-downmode modeisis Buck M
2d
1
(9) (9)
Buck MBuck = 2dBuck Buck − 1
where 0.5 < dBuck < 1. where 0.5
