Comparative Study of Different Modified Genetic ...

4 downloads 7740 Views 378KB Size Report
gives an up-to-date account on various non-slicing floorplan representations in VLSI floorplanning. 2.Keywords:Genetic Algorithm, VLSI Design,. Floorplanning ...
Comparative Study of Different Modified Genetic Algorithms for VLSI Floorplaning 1.

Mr. Rahul Karmakar , Assistant Professor , Dept. of Computer Science , The University of Burdwan, [email protected] 2. Raja Roy Chowdhury, M.C.A. Student, Dept. of Computer Science , The University of Burdwan [email protected]

1.ABSTRACT Floorplan representation is a fundamental issue in designing a VLSI floorplanning algorithm as the representation has a great impact on the feasibility and complexity of floorplan designs. This survey paper gives an up-to-date account on various non-slicing floorplan representations in VLSI floorplanning.

2.Keywords: Genetic Algorithm, VLSI Design, Floorplanning, Optimization, Area

3.GENETIC ALGORITHM Genetic algorithm has the ability to simultaneously examine a set of possible solutions, manipulate them to achieve an optimized solution of the problem. The genetic algorithm starts with determining individuals in a given population. The individuals are encoded as binary strings called as chromosomal strings. The GA operates on these encodings during the optimization process.

Fig2. Representational floor plan Figure 2 shows a representational floorplan. The darker shaded regions in the figure illustrate the dead space. Our proposed genetic floorplanner minimizes the dead space to achieve optimum fitness of the circuit modules. The lesser the dead space obtained by the genetic algorithm more is the optimality of the solution.

4.Floorplan Structure

Fig1. The GA cycle of reproduction

The GA then uses these individuals to produce a new generation .Thereby moving upwards on the evolutionary chart. The algorithm then uses two operators namely Crossover and mutation. The crossover performs an exchange of chromosomal information between two Individuals to produce an offspring. It combines the good qualities from the parents to produce fitter offspring. Thus the offspring inherit the best qualities from both of its parents. But the crossover operator leads to sameness in the genetic characteristics of individual generation by generation. The offspring resemble the parents to a great effect. Then mutation operator plays an important role in restoring lost genetic information by providing diversity. [1]

There are two layout structures in floorplan, namely, slicing and non-slicing floorplan. A slicing floorplan can be obtained by repetitively cutting the floorplan horizontally or vertically, whereas a non-slicing floorplan cannot [7]. The given dimension of each hard module must be kept. All modules are free of rotation; if a module is rotated, its width and height are exchanged. Figure 1 shows a slicing floorplan. A slicing tree is used to represent a slicing floorplan, it is a binary tree with modules at the leaves and cut types at the internal nodes. There are two cut types, V and H. The H cut divides the floorplan horizontally, and the left (right) child represents the bottom (top) sub-floorplan. Similarly, the V cut divides the floorplan vertically, and the left (right) child represents the left (right) subfloorplan.

2

5

2

4 3

4 1

6

1 5

3 Fig. 2: Slicing floorplan Fig.

3: Non-Slicing floorplan

The non-slicing floorplan is more general than the slicing floorplan as shown in Figure 3. However, because of its nonslicing structure, it cannot be modeled using a slicing tree. Instead, we can use a horizontal constraint graph (HCG) and a vertical constraint graph (VCG) to model a non-slicing floorplans. The horizontal constraint graph defines the horizontal relations of modules separately, and the vertical constraint graph defines the vertical ones.

5.Different Modified Genetic Algorithm 5.1.1. POEMS algorithm The POEMS method [8] works in iteration. Before the first iteration, an initial solution is generated. This solution is called a prototype. The aim of the following iterations of the POEMS algorithm is to find the best modification of the prototype with use of the genetic GA, which serves as a modification optimizer. The prototype modifications are obtained by applying sequences of defined actions onto the prototype solution. If an improvement is found after each iteration, the prototype is replaced. In every iteration, a steady-state genetic algorithm is executed in order to find the optimal action sequence. First, a population of N random action sequences of length L is created. The sequences are composed of individual actions and their parameters. The evolution is started, and a selection, crossover and mutation operators are used in order to breed the action sequences. The fitness function of each action sequence is defined as a fitness of the prototype solution after being modified by the particular sequence evaluated. The overall program schema is shown in figure 4.

Then, the module is removed from the queue and the space is shortened by its width. If there is no such module small enough to fit into the space, the current level is ended and a new level is started with the space reset to the original value.

5.1.4. Actions Each action in the POEMS algorithm [8] represents a certain parameterized modification of the prototype. Every action has a Boolean flag that enables or disables the action. If the action is disabled, it does nothing to the input tree. Individual actions are joined together to sequences that are optimized by the GA. This algorithm used six actions- rotate action, flip action, mirror action, exchange value action, exchange node action and hang node action. Rotate action flips and mirrors sub-trees of every node in the whole sub-tree starting from the specified tree node. Flip action flips (rotates) the module of the specified tree node. A mirror action changes the left and the right child of the specified tree node. This action does nothing on the leaf node. An exchange value action takes two specified nodes and swaps their values. The tree structure is not changed; only the shape of resulting placement is different. The exchange node action takes the first node specified and inserts it at the position of the second node specified. The second node is placed on the original position of the first node. This operation is permitted only if the first node does not lie in the sub-tree of the second node and vice versa. A hang node action takes the specified source node and places it as the left or the right child of the target node specified. If the target node is located in the sub-tree starting from the source node, nothing is done. If the target node contains a child at the target position, the child is replaced by the source node and inserted at the original position of the source node.

5.1.2. Prototype A prototype is the initial solution created and improved by the POEMS algorithm. Its creation is a very important step, because the initial position highly influences the space searched. As the solutions are binary trees, so best fit heuristic method is introduced here to create trees from the initial set of modules.

5.1.3. Best-fit heuristic method The best-fit heuristic is a general name for a greedy rectangle packing algorithm. The principle is to select the best fitted module for each hole in the final placement. Both holes and modules are stored in a queue and the algorithm iterates until the module queue is empty. After each placement of the module, the whole list is updated. In this method first, it rotates all modules so they are wider than higher and sorts them by width (descending) and height (ascending). This array represents a queue of the modules. Then, the tree is built level by level. On each level, a certain limited horizontal space must be filled. Initially, the space to be filled equals to the width of the widest rectangle or the square root of all modules area, whichever is bigger (this is further referred as the original value). Until the module queue is empty, the algorithm selects the first module from the queue, which can be placed into the space. Fig. 4: Overall program schema

5.2.1. GAPE: Distributed Genetic Algorithm In the paper „Distributed Genetic Algorithms for the Floorplan Design Problem‟ [4], authors have proposed anew algorithm GAPE ( Genetic Algorithm Based on theory of Punctuated Equilibrium). Punctuated Equilibrium is governed by two principals: rapid evolution of new species (allopatric speciation) and stability (stasis) [27].Under the constraint of equivalent “work,” GAPE has performed better than the simulated annealing approach, both in terms of the average cost of the solutions found and the best-found solution, in almost all the problem instances tried. GAPE was an early attempt which overcame drawbacks of simulated annealing [15]. Unlike simulated annealing, this algorithm can be implemented over distributed computer and local memory. Sequential Algorithms will not be suitable for local memory, message passing, distributed models of computation There are many simple avenues to parallelize a sequential genetic algorithm (assuming a global shared memory), e.g., selecting and crossing over pairs of solutions in parallel, and mutating solutions in parallel. Consider R1, R2 and R3 to be randomly selected instances with 25 modules. Area of these modules is selected from a random uniform distribution {1, 20}. R1 and R2 have Upper bound (ui)equal to 3 and for R3, (ui) is selected from uniform distribution over {1, 4}. All three modules are with flexible settings that is lower bound (li) and upper bound (ui) are governed by equation (ii).

Island

Sequential GA SubPopulation

Migration

Parallel GA Controller

Island

Sequential GA SubPopulation

Migration

Migration Policy

Migrants

Fig. 5 Model of Parallel GA Performance of Parallel GA on various bench marks are tabulated as per following.

li = (ui)-1 ....Equation (ii). Results obtained are as follows: for R1, the average score obtained by GAPE is 2964.6 and that by SA is 3144.3. Similarly GAPE average scores for R2 and R3 are 3452.2 and 3063.7 respectively. On the other hand, SA produced average results for R2 and R3 as 3652.0 and 3186.9 respectively. The results clearly infers to superiority of GAPE over simulated annealing (SA).

5.2.2. Parallel Genetic Algorithm for Floorplanning Parallel Genetic Algorithms are capable of delivering better results than Sequential Algorithms, even though resources used by both of them for computation are same. The paper “A Parallel Genetic Algorithm for Floorplan Area Optimization” [5] presents a Genetic Algorithm modified from Sequential Algorithm. The algorithm is based on island-based model as shown by fig.5. From fig.3, it can be stated that Island can be termed as a group of sub-population out of which best individual is selected via Sequential Genetic Algorithm and passed on to migration scheme. Factors influencing performance of Parallel GA are: 1. Number of islands 2. Migration interval 3. Size of sub-population on different islands 4. Crossover and Mutation probabilities 5. Selection strategy

Migration Interval 1 generation 5 generations 10 generations 15 generations

Best

Mean

0.96694 0.936119 0.95369 0.938156 0.93968 0.933279

Standard Deviation 0.01374 0.00926 0.00444

0.94533 0.932369

0.00760

Table1. Statistics for empirical results on bench mark (2 islands) Migration Interval 1 generation 5 generations 10 generations 15 generations

Best

Mean

0.93388 0.925533 0.94080 0.931818 0.94533 0.935849

Standard Deviation 0.00458 0.00589 0.00826

0.93804 0.928595

0.00633

Table2. Statistics for empirical results on bench mark (4 islands)

Migration Interval 1 generation 5 generations 10 generations 15 generations

Best

Mean

0.94442 0.927186 0.94155 0.931792 0.95489 0.933897

Standard Deviation 0.01154 0.00749 0.01314

0.95551 0.935583

0.01083

CONCLUSION

Table3. Statistics for empirical results on bench mark (8 islands) Best 0.93934

Mean 0.926202

The layout, when designed using Cadence tool is 96.8uM2 placing the blocks in the most optimized way possible. The same input when fed to our proposed algorithm returns with an area of 80uM2. The height of the IC was fixed as 4uM while the length was varied according to the placements. The cost function calculates it as 20uM thus giving 80uM2 as the final area.

Standard Deviation 0.07786

Table4. Statistics for empirical results for sequential GA on the benchmark Parallel GA is apt for clusters of computational structures or multi-computers of distributed memory.To achieve best possible performance, however, number of islands and migration interval must be ensured to be in direct relation. Migration web service is used by sequential GA to send its best individual to and receive best individual from the parallel GA web service.

RESULTS AND PLOTS The following graphs were obtained with the layout of a 16-bit adder as the input. It comprises of 17 blocks, 16 of a 1-bit adder and a single block for computing the output carry bit. The dimensions of the 16 blocks are thus the same while the carry block is smaller. These plots were obtained using the software MATLAB R2007a.

With recent advances in integration technology, in the nanometre era, VLSI floorplanning has transformed into multi objective optimization problem. Genetic algorithm facilitates in providing an optimum solutions to the problem as it is a more robust technique. It is applicable to both continuous and discrete optimization problems. Genetic algorithms are one of the best ways to solve a problem for which little is known. They are a very general algorithm and so work well in any search space and also Combining the merits of various Genetic Algorithms, it is possible to achieve highly optimum solution which can resolve conflicting parameters simultaneously, leading to circuit designs that would be far better than those available today. There has been a trade-off between achieving optimized area and runtime of an algorithm. Implementing these algorithms collectively will give a better chance to resolve this trade off. Distributed Genetic Algorithm provides the GAPE method which proves its efficacy over simulated annealing, Hybrid algorithm can efficiently optimize the floorplan design due to its local search operator. On the similar lines, Parallel Genetic Algorithms are proven for faster computation having advantages over Sequential Algorithms. Thus in future, we can combine these stellar advantages of these individual algorithms and implement a Genetic Algorithm which will take care of resolving these parameters simultaneously. This will enable us to implement area optimized designs along with shorter run time of an algorithm and higher efficiency. The work presented in this paper provides a compendium of advantages of these algorithms. Collective implementation and investigation of novel Genetic Algorithms will be a promising prospect for obtaining optimized solutions for complex floorplanning problems.

REFERENCES [1]. HameemShanavas .I and Gnanamurthy.R.K “Evolutionary Algorithmical Approach for VLSIFloorplanning Problem”, International Journal of Computer Theory and Engineering, Vol. 1, No. 4, October2009 - 1793-8201.

Fig6. Plot of cost v/s iteration

[2]. D.JackulineMoni, S. Arumugam and D.GraciaNirmala Rani, “VLSI Floor Planning relying on Differential Evolution Algorithm”, AIML Journal, Volume (7), Issue (1), June, 2007.

[3]. Pradeep Ruben Fernando , doctoral dissertation, University of South Florida “Genetic algorithm based design and optimization of VLSI ASICs and reconfigurable hardware”.

[17] J.-M. Lin and Y.-W. Chang, ―TCG-S: Orthogonal Coupling of P*admissible Representations for General Floorplans,‖ IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2004, pp.968 - 980.

[4]. PRATIBHA BAJPAI, “Genetic Algorithm – an Approach to Solve Global Optimization Problems”, Indian Journal of Computer Science and Engineering.

[18] B. H. Gwee, and M. H. Lim, ―A GA with heuristic-based decoder for IC Floorplanning‖, The VLSI journal, 1999, pp. 157-172.

[5]. D.F.Wong,andC.L.Liu,”A New algorithm forFloor plan Designs,”Proc.DAC.pp101-107,1986. [6]. H. Murata, K. Fujiyoshi, S. Nakatake, and Y.Sajitani,“VLSI module placement based onrectangle-packing by the sequencepair,” IEEETrans. on Computer Aided Design, vol. 15, pp.15181524, Dec. 1996. [7]. J. P. Cohoon, S. U. Hedge, W. N. Martin andD. S. Richards. Distributed Genetic Algorithms forthe Floorplan Design Problem. IEEE Transactionson Computer Aided Design, Vol. 10, No. 4, April1991. [8] S. Kirkpatrick, C. D. Gelatt, and M.P. Vecchi, “Optimizationby simulated annealing,” Sci. 220, pp. 671-680, May 13, 1983.4 [9] D. P. LaPotin and S. W. Director, “Mason: A global floorplanning tool,” in Proc. IEEE Int. Conf. on Computer-Aided Design, Santa Clara, CA, 1985, pp. 143-145. [10] R. H. J. M. Otten, “Automatic floorplan design,” in Proc. 19th ACM-IEEE Design Automation Conf., Minneapolis, MN,1982 [11] D.F. Wong, P.S. Sakhamuri “Efficient floorplan optimization,” in Proc. IEEE Int. Conf. on Computer Design, Port Chester, NY, 1983, pp. 499-502. [12] R. H. J. M. Otten and L. P. P. P. van Ginneken, “Floorplandesign using simulated annealing,” in Proc. IEEE Int. Conf. on Computer-Aided Design, Santa Clara, CA, 1984, pp. 96-98. [12] H. Murata, K. Fujiyoshi and Y. Kajitani: ―VLSI module placement based on rectangle-packing by the sequence-pair,‖ IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, V01. 15, N0. 12, 1996, pp. 1518-1524. [13] Koji kiyota, Kunihiro fuiiyoshi, ‖Simulated Annealing Search Through General Structure Floorplans Using Sequence-Pair‖, Symposium On Circuits And Systems, Geneva, Switzerland , IEEE, 2000, pp. 77-80. [14] Yun-Chih Chang, Yao-Wen Chang, Guang-Ming Wu, and Shu-Wei Wu,‖B*-Trees: A New Representation for Non-Slicing Floorplans‖ (c) ACM, 2000. [15] Tung-Chieh Chen, and Yao-Wen Chang,‖ Modern Floorplanning Based on B*-Tree and Fast Simulated Annealing‖ IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, VOL. 25, NO. 4, APRIL 2006, pp. 637-650. [16] Jai-Ming Lin and Yao-Wen Chang, ‖ TCG: A Transitive Closure Graph-Based Representation for General Floorplans‖, IEEE transactions on very large scale integration (VLSI) systems, VOL. 13, NO. 2, 2005, pp. 288-292.

[19] X. G. Wang, L. S. Yao, and J. R. Gan, ―VLSI Floorplanning Method Based on Genetic Algorithms‖, Chinese Journal of Semiconductors, 2002, pp. 330-335. [20] P. -N Guo, C. -K. Cheng, T., Yoshimura, ―An O-tree representation of non-slicing floorplan and its applications‖, Proc. 36th ACWIEEE Design AutoNation Cont., 1999, pp.268-273. [21] Liang Huang, Yici Cai, Xianlong Hong, ‖A Parallel VLSI Floorplanning Algorithm Using Corner Block List Topological Representation‖, IEEE, 2004, pp. 1208-1212. [22] Koichi Haua, Shin‘ichi Wakabayashi, Tetsushi Koide, ―Solving the Rectangular Packing Problem by an Adaptive GA Based on Sequence-Pair‖, ASP-DAC, 1999, pp. 181-184.