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Control of High Performance DC-AC Inverters. Using Frequency Domain Based Repetitive Control. Wang Wei, Sanjib Kumar Panda*, Senior Member IEEE, and ...

IEEE PEDS 2005

Control of High Performance DC-AC Inverters Using Frequency Domain Based Repetitive Control Wang Wei, Sanjib Kumar Panda*, Senior Member IEEE, and Jian-Xin Xu, Senior Member IEEE Department of Electrical and Computer Engineering 4 Engineering Drive 3 National University of Singapore Singapore 117576 *Email: [email protected]

Abstrct-This paper presents a digital plug-in frequency domain based repetitive control scheme for tracking output voltage of a single-phase DC-AC inverter used in uimnterruptible power supply. The proposed controller consists of a deadbeat controller and an online updated repetitive controller based on Fourier series approximation. The learning algorithm in the repetitive control is designed in frequency domain instead of commonly used time domain. It gives the freedom of choosing different learning gains individually for each harmonic component. Moreover, the time delay introduced due to ifiters used can be easily compensated for each harmonic component to be eliminated. Therefore, this approach offers better convergence of the voltage tracking error as compared to conventional time domain based repetitive approach. Experimental results are presented to validate the advantage of the proposed frequency domain based repetitive control scheme. I. INTRODUCTION High performance DC-AC inverters are widely used in uninterruptible power supplies (UPS) providing electrical power to critical loads. A UPS system must generate high quality AC output voltage with low harmonic distortions (THD) even when feeding nonlinear loads. Various control schemes have beenproose obectve.Convntinalconrol totomeetthi been proposed meet this objective. Conventional control schemes such as deadbeat control, cascaded control [l]-[2] provide fast response with relatively low THD, but their performance highly depend on the accuracy of plant model parameters. In addition, their tracking performance deteriorates under nonlinear loads. Repetitive control is a good solution for minimizing periodic errors, and it iS more effective to elimiinate for low frequency harmonics. Owing to the fact that low frequency harmonics significantly contribute to the error, repetitive control is a judicious choice for this system. Several different time domain based repetitive control schemes have been proposed and implemented for UPS system. In [3], a discrete time domain repetitive control (TDRC) is presented, but the performance of control system is dependent on the design of digital filters to remove thheunwanted harmonics in learning control. This paper proposes a frequency domain based repetitive control (FDRC) scheme. The scheme has already been succesiflly implemented for torque control of PMSM drive [4].

Frequency domain learing uses Fourier series analysis to obtain the magnitude and phase of each frequency component, and uses these parameters to reconstruct a signal which only contains the chosen frequency components for learing. As a result, frequency components to be eliminated could be easily learned to meet this objective rather than designing filters to eliminate unwanted harmonic component. Furthermore, phase delay due to analog filters can be compensated in a direct way. Experimental results obtained usig FDRC are presented and compared with TDRC in this paper in order to show the effectiveness of the propose control scheme. The paper is organized as follows. Section II presents design of time domain and frequency domain repetitive controller for a DC-AC inverter system. Section Im gives the specifications of the inverter system and experimental results of the two control methods. Section IV concludes the paper.

II. DESIGN OF REPETITIVE CONTROLLER FOR DC-AC INVERTER SYSTEM 1 Fig. shows the schematic diagram of the single-phase DCg AC inverters. The load Z could be linear or non-linear load.

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A. Structure of the Controller

The proposed control scheme in block diagram form is shown in Fig. 2, which is sieilar to that reported in [1]. The cascaded control structure with inner current contol loop and

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