Cutting-Edge Computing: Using New Commodity ... - IEEE Xplore

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Cutting-Edge Computing: Using New Commodity Architectures BY MING C. LIN

Guest Editor DINESH MANOCHA

Guest Editor

I. PRE FACE The recent trends in commodity processor architectures exploit multiple cores to achieve higher performance. Some examples include multicore processors that replicate identical serial CPU cores on a single chip, e.g., quad-core CPU chips available from Intel and AMD in 2007. The current trend seems to indicate that the number of cores is growing at a rate governed by the Moore’s law. An ongoing and contrasting trend has been the development of heterogeneous processor This special issue architectures that combine fine-grain addresses some of the and coarse-grain parallelism using challenges in this field tens or hundreds of disparate processing cores. Examples of such proces- through papers presented sors include the Cell BE processor, by researchers covering: which is used as a CPU in work- Hardware Trends, stations, game consoles, and many- Programming and core accelerators (e.g., GPUs), which Software Challenges and are designed with the goal achieving Applications. higher parallel-code performance for a class of applications. Compared to conventional CPUs, the heterogeneous processors or accelerators can offer an order-of-magnitude improvement in peak performance per dollar as well as per watt. Such processors are frequently used in current PCs, game consoles, and mobile platforms. The demand for many-core architectures is arising from consumer applications, including computer gaming and multimedia. At the same time, they have tremendous potential for desktop computing, high-performance computing, and embedded applications. As compared to conventional CPUs, the new accelerators and many-core processors have different characteristics. For example, top-of-the-line GPUs Digital Object Identifier: 10.1109/JPROC.2008.917717

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have tens of fragment processors and high memory bandwidth, i.e., ten times more than current CPUs. This processing power and memory bandwidth has been successfully exploited for scientific, database, geometric, and imaging applications and resulted in a new area called general-purpose computation on GPUs (GPGPU). In some cases, the use of such accelerators has resulted in more than an order-of-magnitude performance improvement. For example, GPUTeraSort1 used the processing power and memory bandwidth of commodity GPUs to improve the performance of external memory sorting by three times in terms of improvement in records/second per CPU and beat the well-known IndySort benchmark in 2006. The Cell BE consists of a symmetric multithreaded power processing element (PPE) and eight synergistic processing elements (SPEs) with pipelined single-instruction multiple-data capabilities. This heterogeneous processor can achieve a theoretical peak performance of over 200 Gflops for single-precision floating-point calculations. 1 http://www.research.microsoft.com/barc/ SortBenchmark/.

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The development of these new commodity architectures has resulted in many new challenges in terms of fully exploiting the capabilities of these processors. These include 1) Do these commodity architectures have the potential for a wide variety of applications and computing needs? What are their algorithmic and architectural niches and can they be broadened? 2) What are the major issues in terms of programmability, language, and compiler support and software environments for these new commodity architectures? Many of the current applications are not designed to take advantage of the newer architectures with multiple cores, and many of these applications are designed using millions of lines of serial code. What kind of new programming languages, environments, and debugging tools need to be dveloped to exploit these processors? 3) How do we handle heterogeneity in these new processors, and develop new models of computation for such processors? Most of the existing scientific and multimedia libraries are primarily designed to exploit singly core or homogeneous multicore processors? 4) What are the new kinds of commodity, consumer, and scientific applications that can effectively utilize the computational capabilities of these processors? What are the implications in terms of high-performance computing, as we tend to use such accelerators to achieve petaflop (or higher) performance? This special issue of the PROCEEDINGS OF THE IEEE addresses some of these challenges through a collection of nine papers presented by leading groups of researchers in different areas related to these topics. The contributing researchers include

experts from computer graphics, computer architecture, programming languages, compilers, databases, GPGPU, parallel and scientific computing. These papers provide an excellent survey of the state of the art while highlighting many new research challenges. We have classified the papers into three main categories.

A. Hardware Trends 1)

2)

3)

Rise of the Graphics Processor by D. Blythe: This paper presents an excellent overview of the development of GPU architectures over the last few decades. The earlier GPUs had a fixed-function pipeline and the latest GPUs offer considerable programmability with multiple cores. This programmability has been exploited for general-purpose computing using GPUs. Graphics Processing Units for Handhelds by T. AkenineMoller and J. Strom: This paper addresses the issues in the design of GPUs for the mobile market. These issues include power consumption, handling appropriate form factor, etc. Convergence of Recognition, Mining, and Synthesis Workloads and its Implications by Chen et al. from Intel. This paper presents an overview of a wide variety of applications from various areas that serve as the workload analysis for next-generation processor design and optimization. The authors discuss applications in graphics, gaming, media-mining, unstructured information management, financial analytics, and interactive virtual communities like Second Life. These applications in many ways influence the design of next generation of multicore and many-core processors.

B. Programming and Software Challenges 1) Challenges and Opportunities in Many-Core Computing by J. Manferdelli et al.: This paper addresses new arising software and application challenges due to the development of many-core processor. Unlike the multicore, the many-core processors may have tens or hundreds of heterogeneous processors to achieve high parallel code performance. This paper addresses many new system research issues that arise from programming such processors. 2) Scalable Programming Models for Massively Multicore Processors by M. McCool: This paper addresses the problem of developing programming models for a wide variety of commodity processors, including multicore CPUs, GPUs, and the Cell processor. It surveys various parallel programming models and addresses the challenges in developing scalable implementations of parallel algorithms. 3) An Experimental Study of S e l f - O p ti m i zi n g De n s e Linear Algebra Software by M. Kulkarni and K. Pingali: This paper describes the impact of memory hierarchy optimizations for numerical and specifically linear algebra software. It highlights the impact of these hierarchies in terms of compilers and selfoptimizing software systems. 4) Programming for Edge Computing: Using Cognitive Techniques to Manage Heterogeneous Resources by M. Hall et al.: This paper addresses issues in designing the new generation of heterogeneous processors, including multicore and manycore devices. It addresses

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many issues related to complex systems development, power consumption, and exploiting inherent parallelism. 2)

C. Applications 1) Database Optimizations for Modern Hardware by J. Cieslewicz and K. Ross: This paper gives an overview of optimizing database performance and queries over different processors, including recent multicore processors, network processors, and GPUs. Specifically, it surveys recent

architecture-sensitive database research and how these ideas can be applied to other data-intensive applications. GPU Computing by J. Owens et al. This paper describes various commodity and high-performance applications in the broad area of general-purpose computing using GPUs. They highlight how the data parallelism of GPUs has been exploited for numerical, database, geometric, and imaging applications. h

Acknowledgment The Guest Editors wish to thank all of the authors for their valuable contributions, as well as the anonymous reviewers who offered excellent feedback on these papers. Without the reviewers’ inputs, this issue would not have reached its present quality. They would also like to recognize the support from the staff of the PROCEEDINGS OF THE IEEE, especially the Managing Editor, J. Calder, and the Publications Editor, J. Sun. The editor’s work on this proceedings is supported in part by IARPA and RDECOM.

ABOUT THE GUEST EDITORS Ming C. Lin received the Ph.D. degree in electrical engineering and computer science from the University of California, Berkeley. She is currently Beverly W. Long Distinguished Professor of Computer Science at the University of North Carolina (UNC) at Chapel Hill. Her research interests include physically based modeling, haptics, real-time three-dimensional graphics for virtual environments, robotics, and geometric computing. She is an author or coauthor of more than 170 refereed publications and coeditor or author of Applied Computation Geometry (Berlin, Germany: Springer-Verlag, 1996); High-Fidelity Haptic Rendering (San Rafael, CA: Morgan & Claypool, 2007); and Haptic Rendering: Foundations, Algorithms, and Applications (Wellesley, MA: A K Peters, 2008). She has served on more than 70 program committees of leading conferences on virtual reality, computer graphics, robotics, haptics, and computational geometry, and cochaired more than 15 international conferences and workshops. She is a member of four editorial boards and has been a Guest Editor for more than ten special issues of scientific journals and technical magazines. She has also served on four steering committees and advisory boards of international conferences, as well as six technical advisory committees constituted by government organizations and industry. Prof. Lin has received several honors and awards, including the National Science Foundation Young Faculty Career Award in 1995, Honda Research Initiation Award in 1997, UNC/IBM Junior Faculty Development Award in 1999, UNC Hettleman Award for Scholarly Achievements in 2003, and six Best Paper Awards at international conferences on computer graphics and virtual reality. She is currently the Associate Editor-in-Chief of the IEEE TRANSACTIONS ON VISUALIZATION AND COMPUTER GRAPHICS.

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Dinesh Manocha received the B.Tech. degree in computer science and engineering from the Indian Institute of Technology, Delhi, in 1987 and the M.S. and Ph.D. degrees in computer science at the University of California at Berkeley in 1990 and 1992, respectively. He is currently Phi Delta Theta/Matthew Mason Distinguished Professor of Computer Science at the University of North Carolina (UNC) at Chapel Hill. His research interests include geometric and solid modeling, interactive computer graphics, physically based modeling, virtual environments, robotics, and scientific computation. His research has been supported by the Army Research Office, Defense Advanced Research Projects Agency, the U.S. Department of Energy, Honda, Intel, the National Science Foundation (NSF), the Office of Naval Research (ONR), and the Sloan Foundation. He has published more than 230 papers in leading conferences and journals on computer graphics, geometric and solid modeling, robotics, symbolic and numeric computation, virtual reality, and computational geometry. He has served as a Program Committee Member of more than 60 conferences and chaired many leading conferences on computer graphics, geometric and solid modeling, virtual reality, animation, and robotics. He has also served as a Member of the Editorial Board and Co-Guest Editor for leading journals in computer graphics, computer-aided design, applicable algebra, computational geometry, and parallel computing. Prof. Manocha received the NSF Career Award in 1995, Sloan Fellowship in 1995, ONR Young Investigator Award in 1996, Honda Research Initiation Award in 1997, and Hettleman Prize for scholarly achievement at UNC Chapel Hill in 1998. He has received multiple Best Paper and Panel Awards at the ACM SuperComputing, ACM Multimedia, ACM Solid Modeling, ACM VRST, IEEE Visualization, IEEE VR, and Eurographics Conferences.