Dataset demonstrating the temperature effect on

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May 30, 2017 - temperature of a particular QCA design. • The proposed dataset can be used to design robust and lossless arithmetic logic unit (ALU) in.

Author’s Accepted Manuscript Dataset demonstrating the temperature effect on average output polarization for QCA based reversible logic gates Md. Kamrul Hassan, Nur Mohammad Nahid, Ali Newaz Bahar, Mohammad Maksudur Rahman Bhuiyan, Md. Abdullah-Al-Shafi, Kawsar Ahmed www.elsevier.com/locate/dib

PII: DOI: Reference:

S2352-3409(17)30302-5 http://dx.doi.org/10.1016/j.dib.2017.06.058 DIB1618

To appear in: Data in Brief Received date: 1 March 2017 Revised date: 30 May 2017 Accepted date: 28 June 2017 Cite this article as: Md. Kamrul Hassan, Nur Mohammad Nahid, Ali Newaz Bahar, Mohammad Maksudur Rahman Bhuiyan, Md. Abdullah-Al-Shafi and Kawsar Ahmed, Dataset demonstrating the temperature effect on average output polarization for QCA based reversible logic gates, Data in Brief, http://dx.doi.org/10.1016/j.dib.2017.06.058 This is a PDF file of an unedited manuscript that has been accepted for publication. As a service to our customers we are providing this early version of the manuscript. The manuscript will undergo copyediting, typesetting, and review of the resulting galley proof before it is published in its final citable form. Please note that during the production process errors may be discovered which could affect the content, and all legal disclaimers that apply to the journal pertain.

Data article Title: Dataset demonstrating the temperature effect on average output polarization for QCA

based reversible logic gates Authors: Md. Kamrul Hassan1, Nur Mohammad Nahid1, Ali Newaz Bahar1,*, Mohammad Maksudur Rahman Bhuiyan 2, Md. Abdullah-Al-Shafi 3, Kawsar Ahmed1 Affiliations: 1

Department of Information and Communication Technology, Mawlana Bhashani Science and Technology University, Bangladesh. 2

University Grants Commission of Bangladesh, Bangladesh.

3

Institute of Information Technology (IIT), University of Dhaka, Bangladesh.

*Corresponding Author: Ali Newaz Bahar Member of IEEE, SPIE Assistant Professor Department of Information and Communication Technology (ICT) Mawlana Bhashani Science and Technology University Santosh, Tangail - 1902, Bangladesh Email: [email protected], [email protected]

Abstract

Quantum dot-cellular automata (QCA) is a developing nanotechnology, which seems to be a good candidate to replace the conventional complementary metal-oxide-semiconductor (CMOS) technology. In this article, we present the dataset of average output polarization (AOP) for basic reversible logic gates presented in [1]. QCADesigner 2.0.2 has been employed to analysis the AOP of reversible gates at different temperature level in Kelvin (K) unit. Specifications Table Subject area More specific subject area Type of data How data was acquired Data format Data accessibility

Electronics Nano-electronics Table, figure

Data set has been acquired using QCADesigner tool Analyzed Data is within this article

Value of the data  Reversible gates are the basic building block of reversible logic systems. This dataset helps researcher to enhance the performance and reliability of digital systems.  The presented data analysis can support the researchers to find the maximum operating temperature of a particular QCA design.  The proposed dataset can be used to design robust and lossless arithmetic logic unit (ALU) in quantum computers. 1. Data This article describes the average output polarization (AOP) for basic reversible logic gates of Double Feynman, Toffoli, TR, R, NG, SCL and BVF gates at different temperature level is shown in Table 1. 2. Experimental Design, Materials and Methods 2.1. AOP analysis The average output polarization is declined gradually with the increment of temperature [2]. At any specific temperature, the AOP of an output cell can be calculated by simply taking the difference between maximum polarization and minimum polarization and dividing the result by two.

To analysis the AOP, QCADesigner tool ver. 2.0.3 [3] has been used with coherent vector simulation engine. The following default parameters have been considered. The default parameters are listed as: QCA cell size=18 nm, diameter of quantum dots=5 nm, number of samples=50,000, relative permittivity=12.9, convergence tolerance=0.001, radius of effect=65 nm, clock low=3.8e-23 J, clock high=9.8e-22 J, clock amplitude factor=2.000, layer separation=11.5 nm and maximum iterations per sample=100. The graphical representation of AOP of different reversible logic gates presented in [1] is illustrated in Fig. 1. Table 1 Average Output Polarization (AOP) dataset of reversible logic gates at different temperature level Reversible Output Gate cell Double Feynman Gate Toffoli Gate

TR Gate

R Gate

NG Gate

P Q R P Q R P Q R P Q R P Q

Average Output Polarization (AOP) 1 3.518 3.511 3.505 3.515 3.510 3.508 3.515 3.509 3.502 3.506 3.518 3.502 3.515 3.502

2 3.504 3.509 3.505 3.505 3.507 3.506 3.510 3.508 3.502 3.505 3.515 3.502 3.513 3.502

3 3.500 3.507 3.505 3.503 3.503 3.506 3.506 3.506 3.502 3.503 3.510 3.501 3.513 3.501

4 3.500 3.506 3.503 3.501 3.500 3.504 3.503 3.502 3.501 3.503 3.505 3.500 3.513 3.501

5 3.493 3.500 3.500 3.500 3.500 3.500 3.501 3.500 3.499 3.490 3.501 3.499 3.510 3.495

Temperature 6 7 3.485 3.466 3.493 3.471 3.489 3.465 3.495 3.473 3.481 3.469 3.489 3.465 3.491 3.469 3.487 3.465 3.482 3.460 3.487 3.460 3.500 3.491 3.487 3.466 3.499 3.480 3.481 3.458

8 3.448 3.434 3.430 3.440 3.449 3.430 3.436 3.429 3.425 3.420 3.457 3.427 3.447 3.422

9 3.384 3.386 3.381 3.396 3.378 3.381 3.383 3.375 3.369 3.370 3.399 3.375 3.394 3.371

10 3.308 3.324 3.315 3.337 3.330 3.315 3.322 3.315 3.308 3.310 3.360 2,107 3.335 3.309

11 3.239 3.247 3.237 3.267 3.257 3.241 3.248 3.241 3.231

12 3.155 3.166 3.142 3.190 3.180 3.155

3.265 3.186 3.232 3.140

R P Q R S P Q R S

SCL Gate

BVF Gate

3.509 3.518 3.513 3.510 3.506 3.513 3.518 3.509 3.504

3.509 3.515 3.510 3.509 3.506 3.510 3.515 3.507 3.504

3.509 3.510 3.507 3.505 3.506 3.508 3.513 3.502 3.504

3.505 3.507 3.502 3.501 3.504 3.504 3.510 3.501 3.504

3.500 3.506 3.501 3.500 3.500 3.500 3.505 3.500 3.499

3.489 3.499 3.497 3.490 3.489 3.489 3.500 3.490 3.487

Temperature Vs AOP of Double Feynman Gate P

A O P

Q

3.465 3.490 3.483 3.473 3.465 3.479 3.495 3.470 3.466

R

P 3.6

3.5

3.5

3.4

3.4 A 3.3 O 3.2 P 3.1

3.3 3.2 3.1 3

3

2.9

2.9 2

3

4

5

6

7

8

3.381 3.396 3.389 3.380 3.380 3.399 3.420 3.390 3.379

1

9 10 11 12

2

3

Q

4

3.241 3.280 3.280 3.258 3.241 3.240 3.270 3.264 3.237

3.159 3.199 3.180 3.160 3.148 3.169 3.199 3.180 3.149

5

6

R

7

8

9 10 11 12

Temperature

Temperature

(a)

(b) Temperature Vs AOP of TR Gate P

Q

Temperature Vs AOP of R Gate

R

P

3.55 3.5 3.45 3.4 3.35 A O 3.3 P 3.25 3.2 3.15 3.1 3.05

Q

R

4 3.5 3 2.5 A O 2 P 1.5 1 0.5 0 1

2

3

4

5

6

7

8

9

10 11

1

Temperature

(c)

3.315 3.346 3.338 3.330 3.315 3.320 3.380 3.347 3.315

Temperature Vs AOP of Toffoli Gate

3.6

1

3.430 3.540 3.500 3.440 3.430 3.435 3.478 3.437 3.427

2

3

4

5

6

7

Temperature

(d)

8

9

10

Temperature Vs AOP of NG Gate P

Q

Temperature Vs AOP of SCLGate

R

P

3.6

3.6

3.5

3.5

3.4 A 3.3 O 3.2 P 3.1

3.4 A 3.3 O 3.2 P 3.1

3

3

2.9

Q

R

S

2.9 1

2

3

4

5

6

7

8

9 10 11 12

1

2

3

4

Temperature

5

6

7

8

9 10 11 12

Temperature

(e)

(f) Tempearture Vs AOP of BVF Gate P

Q

R

S

3.6 3.5 A O P

3.4 3.3 3.2 3.1 3 2.9 1

2

3

4

5

6

7

8

9 10 11 12

Temperature

(g) Fig.1. Temperature effect on Average Output Polarization (AOP) of (a) Double Feynman gate (b) Toffoli gate (c) TR gate (d) R gate (e) NG gate (f) SCL gate (g) BVF gate

References [1] Bahar, Ali Newaz, Mohammad Maksudur Rahman, Nur Mohammad Nahid, and MdKamrul Hassan. "Energy dissipation data of reversible logic gates in quantum dot-cellular automata." Data in Brief (2016). doi:http://dx.doi.org/10.1016/j.dib.2016.12.050 [2] Pudi, Vikramkumar, and K. Sridharan. "Efficient design of a hybrid adder in quantum-dot cellular automata." IEEE transactions on very large scale integration (VLSI) systems 19, no. 9 (2011): 1535-1548. doi: 10.1109/TVLSI.2010.2054120 [3] Walus, Konrad, Timothy J. Dysart, Graham A. Jullien, and R. Arief Budiman. "QCADesigner: A rapid design and simulation tool for quantum-dot cellular automata." IEEE transactions on Nanotechnology 3, no. 1 (2004): 2631. doi:10.1109/TNANO.2003.820815.