DC boost converter

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Electric Power Systems Research 134 (2016) 186–196

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Electric Power Systems Research journal homepage: www.elsevier.com/locate/epsr

Four-phase interleaved DC/DC boost converter interfaces for super-capacitors in electric vehicle application based onadvanced sliding mode control design Y. Ayoubi a , M. Elsied a , A. Oukaour a,∗ , H. Chaoui b , Y. Slamani a , H. Gualous a a b

LUSAC Laboratory, University of Caen—Basse Normandie, Cherbourg-Octeville, France Tennessee Technological University, Cookeville, TN, USA

a r t i c l e

i n f o

Article history: Received 8 July 2015 Received in revised form 15 January 2016 Accepted 26 January 2016 Keywords: Electric vehicles DC/DC boost converter Online controller Super-capacitors Four phase interleaved boost converter

a b s t r a c t Electric vehicles (EVs) has received an increasing interest from the power community and have become increasingly popular due to their importance in fighting climate change. An advanced power electronic converter remains the main and common topic for research in this area. In this paper, an advanced sliding mode control (ASMC) is designed for Four Phase Interleaved Boost Converter (FP-IBC). The novelty of the proposed controller relies on the use of an adaptive delay-time block with the conventional sliding mode control scheme which is designed based on chattering elimination method. The new scheme succeed to reduce the ripple contents in the converter’s output voltage and inputs currents, and achieve fast convergence and transient response. An experimental comparison study has been investigated between the proposed controller and Self-tuning Lead Lag Compensator (SLLC). The comparison study is performed at different loading conditions using Super-Capacitor (SC) module. The experimental results show that the dynamic response of FP-IBC is significantly improved based on the proposed control design. © 2016 Elsevier B.V. All rights reserved.

1. Introduction The growing number of human population yields increased energy consumption and depletion of finite resources such as, oil and gas. Therefore, Electrical Vehicles (EVs) are seriously considered as an alternative to fossil-fueled vehicles specially in smart-grids applications [1–3]. In EVs, Fuel cells (FCs), Supercapacitors (SCs), and batteries are usually used as energy storage devices. Combining such energy sources leads to a FC/SC/battery hybrid power system (HPS) [4–6], as it is shown in Fig. 1. Unlike single-sourced systems, HPS has the potential to provide the load with high power quality, high reliability and efficiency. In EVs, a DC/DC boost converter is a key element to interface HPSs to the EV’s dc-bus. Various DC/DC boost converters topologies have been studied and analyzed for EV applications in the literature such as Conventional Boost Converter (BC), Two-Phase Interleaved Boost Converter (TP-IBC), and Multi-Device Boost Converter (MDBC) and Multi-Device Interleaved Boost Converter (MD-IBC) and Four-Phase Interleaved Boost Converter(FP-IBC) [7–11]. MDIBC and FP-IBC are more powerful and more efficient than TP-IBC,

∗ Corresponding author. Tel.: +33 233014611; fax: +33 233014135. E-mail address: [email protected] (A. Oukaour). http://dx.doi.org/10.1016/j.epsr.2016.01.016 0378-7796/© 2016 Elsevier B.V. All rights reserved.

MDBC and BC as admitted in [11,12]. The higher efficiency of MD-IBC and FP-IBC is realized by splitting the input current, substantially reducing I2 R losses and inductor AC losses [13]. Other than that, their input current and output voltage ripples using interleaved theory are reduced compared to conventional BC, TPIBC and MDBC. Indeed, The voltage and current ripples are among the various phenomena that contribute to the lifespan’s reduction of energy storage devices such as, FCs, SCs, and batteries [14–17]. For the FP-IBC, double pole and right half plane (RHP) zero are dependent on the duty cycle, load variation, and converter parameters which make the control design more challenging from the viewpoint of stability and bandwidth. Many controllers are applied to boost converters to solve this problem. Among several robust control methods, variable structure control (VSC) scheme aims to provide as a popular robust strategy to treat system parameter uncertainties and external disturbances. The simplest VSC, sliding mode control (SMC), has received much attention due to its major advantages such as guaranteed stability, robustness against parameter variations, fast dynamic response and simplicity in implementation [18,19]. In [20], Sliding Mode Fuzzy Control (SMFC) has been designed and implemented to control the conventional boost converter and

Y. Ayoubi et al. / Electric Power Systems Research 134 (2016) 186–196

Fig. 1. Block diagram for the FC/SC/battery hybrid power system.

compared in the aspect of design and experimental results with PID fuzzy control. The results proved that the SMFC is able to achieve faster transient response with very little overshoot during startup, more stable steady-state response than PID and PI controller. In [21], a simple and systematic approach to the design of practical SMC has been presented aiming to improve the output voltage regulation of the converter subjected to any disturbance. The SMC introduced in [22] has the advantages of separate switching action and the sliding action, but the computation requirement of the inductor’s current reference function increases the complexity of the controller. Besides the robustness of the aforementioned SMC algorithms against uncertainties in plants models and its rapidity of reaching the sliding surface by using the discontinuous components of the law control, there is a big problem facing this algorithm which is well known as chattering phenomenon or ripples in power electronics [23]. It shows finite frequency oscillations of the controlled variables, especially in inductance current. In this paper, an advanced sliding mode control (ASMC) is designed, discussed, and analyzed for FP-IBC aiming to eliminate the chattering effects and reduce the voltage and current ripples is presented based on an adaptive gain control law. The proposed control law is able to achieve faster transient response with very little

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overshoot during startup, more stable steady-state response. The FP-IBC along with its controller is tested experimentally at different loading condition using two different power sources, i.e., Supercapacitor (SC) module. Results highlight that the proposed control scheme can successfully tune the controller parameters during the changes in system dynamics. The paper is organized as follows. The proposed converter structure and its operating modes are presented in Section 2. The converter modeling and its control design are discussed in Section 3. Finally, an experimental setup is designed using a suitable SC module to supply load demand via the proposed converter in Section 4. An experimental test is carried-out for different loading conditions to verify the effectiveness of the proposed converter and its controller.

2. Structure of the proposed converter Fig. 2a shows the structure of the proposed converter which consists of four DC/DC boost converter modules connected in parallel. Fig. 2b shows the switching device gate signals at d = 0.25, where d is the duty cycle. The gate signals are successively phase shifted by Ts / (nxm), where Ts is the switching period, n is the number of phases, and m is the number of parallel switches per phase. For FP-IBC, m = 1 and n = 4. As such, the current delivered by the electric source is shared equally between each phase and has a ripple content of period Ts/4. Similarly, the frequency of the output voltage and the input current is n times higher than the switching frequency fsw . The current sharing equally between each phase will provide tight sizing of power semiconductors, distribution of losses between modules and size’s optimization of the converter. In addition, the system reliability and converter power rating will be also increased by using paralleling phases. These advantages are behind the use of FP-IBC as a good candidate for EV power systems in particular for high power applications.

Fig. 2. (a) FP-IBC structure. (b) The switching pattern of FP-IBC at d = 0.25.

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• ueq : known as the equivalent control; is the ideal value of the control input that drives the system in the sliding mode, e.g. satisfying the second condition of (3). • udis : is the discontinuous component responsible for driving  to its zero neighborhood. The control law can be explicitly expressed as follow:



u=

3. Control design 3.1. Dynamic model of boost converter Fig. 3 shows one module of FP-IBC. It consists of a DC input voltage source (Vin ), a controlled switch (Sw ), a diode (D), a filter inductor (L), filter capacitor (C), and a load resistor (R). The state space averaging model [24,25] describing the operation of the converter can be written as:

(1)

⎪ ⎩ dVo = (1 − u) 1 i − 1 V o L C

dt

RC

where iL , Vo and u are the inductance current, load voltage and the duty cycle of PWM signal. 3.2. Conventional sliding mode control design (SMC)

T

T

(2)

→0

where  is the switching variable, T is the the transpose operator of a matrix, X is the column representing the state variables and Vref , iref are the reference values of the DC output voltage and inductor current, respectively. The main objective of our control system is to drive both variables inductance current (iL ) and output voltage (Vo ), simultaneously to their specified reference values. For this purpose, the chosen sliding variable  must satisfy both:

 ([iL , Vo ] = [iref , Vref ]) = 0 ˙ ([iL , Vo ] = [iref , Vref ]) = 0





(7)



X| (t, X) = 0

(8)

Then we express the value of ueq from its definition:



˙ u = ueq = 0

(9)

By assuming that the input power is equal the output power:

⎧ Vo2 ⎪ ⎪ ⎨ iL × Vin = R : ⎪ ⎪ ⎩i

ref

× Vin =

2 Vref

R

Reaching mode (∀) (10) Sliding mode ( = 0)

:

By combining (1), (3), (7) and (10) we find: ˙ =



1−

(1 − u) × Vo Vin

V in ×

L



k × Vo R×C



(11)

By substitution of (2) in (8):

˙ =

1−



(1 − u) 1 − ueq



where ˙ =

˙ ×  < 0 (if  = / 0)

d dt

(3)

(4)

ueq = 1 −





×

V

in

L



k × Vref R×C

(12)



Vin Vref

(13)

In order to ensure that the motion of the error variables is maintained on the sliding line which already exists by ueq definition, the following local reachability (attraction) condition developed from (4), also listed in [24] must be satisfied: lim , ˙

These conditions imply a control vector:

Where:

(6)

Then ˙ ueq = 0, implies:

• Attractiveness condition derived from the Lyapunov convergence   criterion with the Lyapunov function candidate V () =  2 /2 :

u = ueq + udis

if  > 0

where K = [1, k]. As we will be demonstrated in the following paragraphs, the experimental control set-up presents the chattering phenomenon caused by the loop control delay, by taken into account this problem we avoided the use of any integral or derivative actions in the surface variable. Therefore, the proposed control scheme start with measuring of the iL and Vo , then calculating the switching variable  and duty cycle (u) to apply on the switch Sw , as mentioned in Fig. 3. Before verifying the existence of the sliding mode and the attraction of the chosen sliding variable, first we define the sliding surface as:

• The existence condition



u− :

 (t, X) = K T (X − Xref )

S=

In this section, the SMC design is discussed and analyzed for FP-IBC. It consists of two control loops, inner and outer loop, the inner loop is used for current control, which is much faster than the voltage outer control loop. It is considered in this work that the sliding variable ( → 0) is running to verify two parameters, inductance current (iL ) and output voltage (Vo ), converges to their equilibrium point (Xref ). X = [iL , Vo ] −→ Xref = [iref , Vref ]

if  < 0

From (1), it is clear that reaching the steady state implies achieving the reference values of both controlled variables simultaneously. In this perspective, we propose a sliding variable as an affine function of the errors between the actual values of the controlled variables and their references in order to achieve both, references tracking and reaching trajectory choosing by tuning a parameter k; the sliding variable is:

Fig. 3. SMC scheme for one module of FP-IBC

⎧ di 1 Vin L ⎪ ⎨ dt = − (1 − u) L Vo + L

u+ :

→0

0 L R×C Case1:  → 0−  →0− the u = u− ,  so ˙ =  When   control  takes  1 − (1 − u− ) / 1 − ueq × Vin /L − k × Vref /R × C > 0 implies: Vin k × Vref − >0 L R×C

Fig. 6. Output voltage with and without delay in C-SMC.

To summarize, the verification of the condition guarantee the existence of the sliding mode, and reachability in finite time is:

⎧ ⎨ Vin × R × C > k L × Vref ⎩ u− < u < u+

(16)

FP-IBC is investigated with and without delay. This delay is used, in the simulation under Simulink platform, to illustrate the chattering phenomenon and its impact on FP-IBC currents and voltages. Eq. (17) describes the formula of the actual control signal in delayed loop compared to non-delayed one.



eq

ut =

3.3. Chattering phenomena in SMC of FP-IBC Ideal sliding mode implies infinite switching control frequency, which is not practical. In real-life, switching time delays and small time constants cause a dynamic behavior in the vicinity of the surface commonly referred to as chattering. This phenomenon leads to high ripple and heat losses in electrical power circuits, which reduces the power quality and the components’ lifespan. One way to alleviate chattering is to introduce a thin boundary layer neighboring the sliding plane [26–28]. It shows finite frequency oscillations of the controlled variables, especially in inductance current. In automotive applications where the energy sources are fuel cell or supercapacitors, chattering could have a drastically impact on their life cycle. The following section will explain the main sources of chattering phenomenon. By adding a new block, delay block, as shown in Fig. 4 to the control scheme which described in Fig. 3 and using the converter parameters which are listed in Table 1, the dynamic behavior of Table 1 Prototype system parameters. Items

Parameters

FP-IBC parameters

Inductance (L1 = L2 = L3 = L4 )

[−h, 0] → R :  ∈ [−h, 0]

 



ut  = u t + 



(17)

where h represent the maximal delay, R is the space of reel numbers,  is the actual loop delay value, and ut is the actual value of the control signal at the time t. Figs. 5 and 6 show the dynamic characteristics of FP-IBC based on the conventional SMC (C-SMC) with and without delay. As it is noticed from the figures, the impact of chattering is well clear on both inductor currents and the output voltage using delay time equal to 2 T and 0 T. The results show also that the dynamics characteristics of the delayed control stays almost the same as the without delay control scheme. The delay is determined by an empirical method, which consists of measuring the oscillations magnitude of inductance current (iL ) and output voltage (Vo ) then tuning the block delay value in the simulation Fig. 4, in order to approach the same oscillations of the experimental set-up. After several tests, we verified that the delay value is stable and quite close to the delay generated by the dSPACE serial communication bus [28]. The delay has a challenging effect on the ripples magnitude. To show this effect, different delay values are considered as T, 2 T, and 4 T. From Fig. 7, it is clear to note the effect of the delay time which added to the control system as in Fig. 4 on the inductor current ripples magnitude.

2m H

3.4. Chattering elimination algorithm

Simulation parameters

Capacitance (C) Capacitor resistance (Rc ) Switching frequency (fs )

6800 ␮F 24 m 10 kHz

Vref Vin Load values Delay DC Internal Resistance

40 V 20 V 20 to 10  2T = 2/fS 10 m

In literature there are three main methods for chattering elimination or reduction; observer based chattering suppression, frequency control, and adaptive control gain method. The first method will not be effective according to the delay is caused mainly by the loop-generated delay not by measurements uncertainties in the loop control. The second method doesn’t provide a good solution for boost converters since the control signal is a PWM signal with fixed frequency. In practice, chattering can be noticed only in steady state conditions and it is non-significant in reaching mode.

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Fig. 7. Inductor currents with different delay values.

In a general view, this phenomenon could be resumed to the discontinuous component of the control law in the steady state. So adaptive control gain method, consisting of reduction of the discontinuous component in a vicinity of the sliding surface (S (t, X) = 0), is quite suitable since it does not affect rapidity in reaching mode or its robustness in general. The control law has two parts; continuous part ueq and discontinuous part ud where the adaptive control gain takes on ud , as follow:



Fig. 8. The output voltage; with the ASMC and C-SMC for the same delay value.

u = ueq + ud ud = −

(18)

 M

where M is reel strictly positive. To take in consideration that the duty cycle u must be confined between zero and one (Umin = 0, Umax. = 1), the following transformation must be applied: u = sat ueq + ud Where:

 sat (x) =

Umax ; Umin ;

if x > Umax if x < Umin x; else

To summarize the control law for chattering elimination with SMC, the following conditions should be achieved:

⎧  ⎪ ⎪ ⎪ Umax ; if : ueq − M > Umax ⎪ ⎨

 x < Umin M

To make this solution more effective M must take the higher value possible; in other words achieving the largest possible range of  for ud reduction. So the resulting condition on M is: M = |min |+|max |

(21)

The couple ( min ,  max ) is determined by simulation in case of known delay value or perturb & observe tests and it depends only on the surface parameters [29] and the loop-generated delay, which is normally constant. Existence verification To verify the existence and reachability in finite time, the condition (13) is sufficient: By considering the first equation of is already verified; only the second equation must be realisable.

(19)

• If the system reaches the sliding mode S, then u = ueq according to (15), which is the definition of the equivalent control. • If  = / 0 then u− < ueq < u+ according to (15).

Choosing M: SMC is well known for its fast reaching to the sliding surface (tracked values) which is directly related to the discontinuous component of the law control ud from (18). In order to ensure that the proposed solution is functional only in the sliding mode, where  ∈ [min , max ], and to preserve to simplicity of the SMC, the parameter M must comply with the following sufficient condition:

3.4.1. Simulation results based on chattering elimination This section presents the simulation results of FP-IBC based on the proposed ASMC algorithm. The value of M is fixed to M = 2 where the simulation parameters are listed in Table 1. Figs. 8 and 9 show clearly the two phases, reaching mode and sliding mode, in case of using the modification (ASMC) or without modification (C-SMC). After disturbing the system at t = 0.2 s, the control tries to reach the sliding surface, after approximately 15 ms the system enter the sliding mode. The curve of the sliding variable in blue color

u () =

⎪ ⎪ ⎪ ⎪ ⎩

Umin ;

if

M ≤ |min |+|max |

: ueq −

ueq −

 ; else M

(20)

Y. Ayoubi et al. / Electric Power Systems Research 134 (2016) 186–196

Fig. 9. The input current; with the ASMC and C-SMC for the same delay value.

Fig. 10. The Duty cycle (u) of the PWM; with the ASMC and C-SMC for the same delay value.

Fig. 11. The sliding variable; with the ASMC and C-SMC for the same delay value.

demonstrates the attraction and the stability of the surface with a variable gain control is better that with fixed gain. The duty cycle shown in Fig. 10 is used to step-up the input voltage from 20 V to the output voltage 40 V. Due to the presence of modelling uncertainties (parasitic resistances), it is not possible to reach exactly the sliding surface, but to stay in a small zero vicinity because of the attraction properties as shown in Fig. 11. As results, the proposed ASMC algorithm succeed to eliminate the chattering oscillations. Moreover, the dynamic response characteristics; response time, the overshoot and static error conserves the same characteristics as in the ideal system, which proves that the modification takes place in the sliding mode without affecting the speed of the reaching mode. 4. Experimental results and discussion In order to evaluate the performance of the proposed converter (FP-IBC) with its proposed control strategy, an experimental test bench, shown in Fig. 12a, has been designed. The power circuit of the test bench shown in Fig. 12b encompasses the FP-IBC DC/DC boost converter, Supercapacitor module, DC electronic load, dSPACE 1104. The parameters of the FP-IBC are listed in Table 1. The 54 V Maxwell SC module (Hy-HEELS) shown in Fig. 12c is a self-contained energy storage device containing 20 individual capacitors that are connected in series together through bus bar connections to obtain 90 F. Each capacitor has a rating of 1800 F with a nominal voltage of 2.7 volts. The module is not available commercially and it is specifically engineered to provide high power

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density. Module temperature and voltage across each individual capacitor can be monitored through robust connectors. The module enclosure consists of top and bottom highly resistant shells. The supercapacitor module is selected to test the control system because it has fast variation in the input voltage and current during charging and discharging compared to the other DC-sources. The parameters of SC module are listed in Table 2. Moreover, the N3300A-1800 W Programmable Electronic load is used in current control operating mode to test the FP-IBC along with its controller at different realistic loading conditions. The programmable electronic load has the flexibility to test a wide range of loading conditions with fast operation, accurate programming. The Semikron. The dSPACE is widely used in many engineering fields and applications especially in the field of power electronics. Therefore, it is suitable for high-frequency power conversion systems. This is because of its ability to perform complex mathematical computations in a small time periods and with less effort. In this study, the control algorithm is first developed in MATLABSimulink and then compiled and downloaded into the dSPACE controller board. The desired signals for calculating the reference signal values are measured by appropriate sensors that are installed on the electrical board. MTX1032 and FLUKE 80i-110s are used respectively as differential voltage and current probes. SKM121AR is used as a switching device because its voltage and current characteristics make it a good candidate for DC-DC boost converter that can be used in EVs applications. On the other hand, Tektronix dpo2014 digital storage oscilloscope is used to display the supply voltage (Vin ), converter output voltage (Vout ), supply current (Iin ), converter output current (Iout ) with Sampling rate 1 GS/s. The rest of this section is organized as follows. The control system design of ASMC and SLLC is presented in Section 4.1. Then, the experimental results at different load conditions and using SC module are investigated and discussed in Section 4.2. 4.1. Control implementation using ASMC and SLLC This section presents an experimental comparative study between ASMC and SLLC. The SLLC is selected for this comparison as a good candidate and well known control method for this type of boost converter especially in EV applications. The aim of the comparison is to highlight the advantages of using ASMC over SLLC. Among these advantages, the ASMC doesn’t need auto-tuning process for its parameters during the variation of the converter’s variables such as load resistance and input voltage. In addition, ASMC has a faster transient response with very little overshoot during startup, more stable steady-state response than SLLC. The following sections will introduce the implementation of the aforementioned controllers. 4.1.1. SLLC implementation The SLLC control design of different topologies of FP-IBC consists of two control loops, inner and outer loop, the inner loop is used for current control, which is much faster than the voltage outer control loop. A pole at the origin is considered as an integral action and provides a very high gain at low frequencies. Moreover, the pole-zero pairs (pi, zi) for current controller and (pv, z v) for voltage controller aim to reduce the phase shift between the frequency of the two plant zeros and the frequency of two plant poles. This control design is illustrated and explained in details for interleaved multiple-input power converter in [30]. The equations of current and voltage control can be written as follow: Ci (s) = kci

(s + zi) s (s + pi)

(22)

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Fig. 12. (a) Prototype of a FP-IBC. (b) Test bench diagram. (c) SC module.

Cv (s) = kcv

(s + z v) s (s + pv)

(23)

where Cv (s) is the voltage compensator and Ci (s) is the current compensator that assures cancellation of the static error and high bandwidth.



zi = wcni

1 − sin ∅mdi , 1 + sin ∅mdi

 z v = wcnv

1 − sin ∅mdv , 1 + sin ∅mdv

pi =



pv =

zi 1 − sin ∅mdi /1 + sin ∅mdi



Table 2 SCs module parameters. Items

Parameters

SCs module parameters

Capacitance (Csc ) No. of cells in series, NSCs Module nominal voltage Max. cell voltage [Vmax cell ]

90 F 20 54 V 2.7 V

 (24)

zv 1 − sin ∅mdv /1 + sin ∅mdv

 (25)

In these equations, wcni and wcnv are the new crossover frequencies of the current inner loop and the voltage outer loop, respectively. The compensator phase margin of the current and the voltage controller are Abbreviated as ∅mdi and ∅mdv ,

Y. Ayoubi et al. / Electric Power Systems Research 134 (2016) 186–196

193

Fig. 13. Real time implantation of SLLC.

Fig. 14. (a) Dynamic response of the FP-IBC over step load variation using ASMC, (b) Dynamic response of the FP-IBC over step load variation using SLLC, (c) Transient response of the FP-IBC over step down load variation using ASMC, (d) Transient response of the FP-IBC over step down load variation SLLC, (e) Transient response of the FP-IBC over step up load variation using ASMC and (f) Transient response of the FP-IBC over step up load variation SLLC.

respectively [30]. kci is the current controller gain where kvi is the voltage controller gain which can be calculated as the following:at

where Ti (s) , Tv (s) are the open loop transfer functions for the inner and outer loop, respectively.

kci = 

(26)

Ti (s) = Ci (s) Hi (s)

(27)

Tv (s) =

   1   at w = wcni Ti (S)    1  kvi =   at w = wcnv T (S) v

for the inner loop

Cv (s) Ci (s) Hv (s) 1 + Ci (s) Hi (s)

for the outer loop

(28) (29)

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In this work, the crossover frequency of the current-loop is selected to be 1.2 times of the plant crossover frequency, with a phase margin equal to 50◦ . On the other hand, lower control bandwidth is used for voltage outer loop to avoid the interaction between the subsystems, which has a crossover frequency 1.1 times of plant one and a phase margin equal to 65◦ . The SLLC aims to apply an automatic tuning of the controller’s parameters. It is a slowly time-varying online parameters estimation process, which used to guarantee a system’s performance with parameters variation. In order to design a real-time self-tuning control, dSPACE MLIB/MTRACE modules are used as it is shown in Fig. 13. The function of these two libraries is to provide a direct access from MATLAB scripts to the variables of the application running on a dSPACE board, without interrupting the process. MTRACE provides real-time data capture for the converter’s variables such as load resistance and input voltage, while MLIB provides basic functions to read these variables and then to transfer them to Matlab workspace [31]. The controller based Matlab M-file loads these variables from workspace then calculates the new controller gains. Finally, MLIB feeds back the new gains to the dSPACE processor memory without interrupting the operation. In this work, the converter’s variables are captured and the controller’s parameters are tuned every 5 ms and the desired signals for calculating the reference signal values are measured by appropriate sensors that are installed on the electrical board. MTX1032 and FLUKE 80i-110s are used respectively as differential voltage and current probes. 4.1.2. ASMC implementation The control algorithm, ASMC, which mentioned in Section 3 is implemented on a dSPACE DS-1104 real-time control board [31]. This board can communicate with the operator via Control Desk windows. The dSPACE is widely used in many engineering fields and it is suitable for high-frequency power conversion systems such as the proposed control design for FP-IBC. This is because of its ability to perform complex mathematical computations in a small time

periods and with less effort. The control algorithm is first developed in MATLAB-Simulink and then compiled and downloaded into the dSPACE controller board. Using ASMC, the control system can improve the dynamic response of FP-IBC at load variation without using additional software such as MLIB/MTRACE. The desired signals for calculating the reference signal values are measured by appropriate sensors that are installed on the electrical board. MTX1032 and FLUKE 80i-110s are used respectively as differential voltage and current probes. 4.2. Experimental results using SCs module In this section, the dynamic response of FP-IBC under ASMC and SLLC are presented and discussed using SCs module as the input supply. In this work, two different realistic load current profiles are used. The first profile is considered to vary with step changes while the second one varies according to the New European Driving Cycle (NEDC) to verify the effectiveness of and to test the response of the proposed controller over SLLC [32]. 4.2.1. Step current profile In this section, the dynamic response of the FP-IBC using the ASMC and SLLC during transient and steady state conditions is recorded. The programmable DC-electronic load is programmed with a step current profile. The output current (Io ) and voltage (Vo ) are plotted in cyan and green color where the input voltage (Vin ) and current (Iin ) are plotted in blue and magenta colors, respectively. For the design and safety considerations which are recommended by the manufacture (Maxwell), the SC module should discharge from its rated voltage to 1/2 rated voltage in order to increase its life time [33]. The lower voltage, 26 V, is used as 1/2 of the rated voltage of the module (54 V). For both controllers, the output voltage is regulated at 60 V. Fig. 14a shows the steady state performance of the FP-IBC under the proposed control strategy ASMC using load step variation where the same under SLLC is shown in Fig. 14b.

Fig. 15. (a) Dynamic response of the FP-IBC over NEDC load variation using ASMC, (b) Dynamic response of the FP-IBC over NEDC load variation using SLLC, (c) Transient response of the FP-IBC over NEDC load variation using ASMC and (d) Transient response of the FP-IBC over NEDC load variation SLLC.

Y. Ayoubi et al. / Electric Power Systems Research 134 (2016) 186–196 Table 3 Comparison between ASMC and SLLC regarding the voltage response. Load profile

Step up/step down

NEDC Step load

Step up variation Step down variation

Response

ASMC

SLLC

Settling time Over shoot %

15 ms 1.2%

80 ms 4%

Settling time Over shoot % Settling time Over shoot %

10 ms 6% 18 ms 5%

40 ms 16% 60 ms 10%

195

As it is clear from Tables 3 and 4 that the ASMC has faster transient response with very little overshoot during step up and step down variation of load demand, and more stable steady-state response than SLLC. In addition, it has lower output voltage ringing at load step variation although the controller’s parameters of SLLC are tuned automatically based on MLIB/MTRACE and updated every 5 ms.

5. Conclusion Table 4 Comparison between ASMC and SLLC regarding the current response. Load type

Step up/step down

NEDC Step load

Step up variation Step down variation

parameters

ASMC

SLLC

Settling time Over shoot %

20 ms 7%

80 ms 25%

Settling time Over shoot % Settling time Over shoot %

20 ms 8.5% 25 ms 13.3%

70 ms 18% 75 ms 25%

The step up and step down transient responses of FP-IBC using the ASMC are shown in Fig. 14c and e. During load step up variation from 8 to 18 A, the settling time of the input current is recorded 20 ms with an overshoot equal to 8.5% where the settling time for the output voltage is recorded 10 ms with a little undershoot less than 6%. During step down load variation for the same control design, the settling time is captured 25 ms with an undershoot equal to 13.3% for the input current where the settling time is recorded 18ms with a little overshoot equal to 5%. On the other hand, the step up and step down transient responses using the SLLC are shown in Fig. 14d and f. During load step up variation as shown in Fig. 14d from 8 to 18 A, the settling time of the input current is recorded 70 ms with an overshoot equal to 18% where the settling time for the output voltage is recorded 40 ms with a undershoot less than 16%. During step down load variation for the same control design, the settling time is captured 75 ms with a undershoot less than 25% for the input current where the settling time is recorded 60 ms with a little overshoot equal to 10%. 4.2.2. Drive cycle current profile In this section, the DC-electronic load is programmed to deliver the output current profile as New European Driving Cycle (NEDC). NEDC is a driving cycle designed to represent the typical usage of a car in Europe. It consists of four repeated urban driving cycles (UDC) and one Extra-Urban driving cycle (EUDC). More details about NEDC can be found in [32]. Similar to the previous case study, the output current (Io ) and voltage (Vo ) are plotted in cyan and green color where the input voltage (Vin ) and current (Iin ) are plotted in blue and magenta colors, respectively. For both controllers, the SCs module is discharged from 42 V to 26 V and the output voltage is regulated at 60 V. The dynamic performance of FP-IBC under ASMC and SLLC with NEDC current profile are presented in Fig. 15 a and b, respectively. As such, the SCs module is discharged from 42 V to 26 V and the output voltage is regulated at 60 V. Fig. 15c and d shows the transient responses of FP-IBC using the aforementioned control methods. It can be noticed from Fig. 15c, the output voltage using ASMC is well regulated at 60 V and its overshoot is less than 1.2% during the transition of the input current from 18A to 5A, (dI = 13A) with settling time less than 20 ms, due to the merits of proposed control scheme. On the other hand, the output voltage in Fig. 15d using SLLC has an overshoot equal to 4% with settling time equal to 80ms during the same transition of the input current.

In this research, an efficient FP-IBC and a new control design have been proposed for EVs applications. The proposed controller based on chattering elimination method succeed to decrease the ripple contents of the converter’s output voltage and input current which will increase the life time of the input supply voltage. The proposed controller is compared with SLLC which its parameters are tuned every 5 ms to improve the dynamic performance during load and supply voltage variations. The experimental results under ASMC and SLLC at different loading conditions, step load variation and NEDC, highlight the fast dynamic response of FP-IBC based on the proposed control scheme (ASMC) during load variation using SCs module Simulation and experimental results along with numeric comparison for efficiency and the proposed control scheme have demonstrated that the proposed converter with its controllers (ASMC) are very promising for EVs applications.

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