dc-dc nonisolated boost converter with high voltage gain ... - IEEE Xplore

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Abstract—This paper presents a dc-dc boost converter with high voltage gain based on three-state switching cell for split-capacitor neutral-point clamped ...
DC-DC NONISOLATED BOOST CONVERTER WITH HIGH VOLTAGE GAIN ADEQUATE FOR SPLIT-CAPACITOR INVERTER APPLICATIONS George Cajazeiras Silveira, Luiz Daniel Santos Bezerra, and René Pastor Torrico-Bascopé*

Fernando Lessa Tofoli Universidade Federal de São João Del-Rei1 Departamento de Engenharia Elétrica (DEPEL) Campus Santo Antônio – Praça Frei Orlando, 170 – Centro São João del-Rei-MG – Brasil CEP 36307-352 Fone: 55 32 33792394 E-mail: [email protected]

Energy Processing and Control Group – GPEC Department of Electrical Engineering– DEE Federal University of Ceará – UFC Fortaleza – CE – Brazil E-mail: [email protected]* Abstract—This paper presents a dc-dc boost converter with high voltage gain based on three-state switching cell for split-capacitor neutral-point clamped inverters. The proposed converter is analyzed considering the operation in continuous conduction mode and duty cycle higher than 0.5, which corresponds to overlapping mode. The main characteristics of the topology are: operation at high switching frequency, while the input inductor is designed for twice such frequency; in order to minimize weight and volume, the voltage stress across the switches is lower than half of the output voltage and naturally clamped by one output capacitor, allowing the use of transistors MOSFETs with reduced intrinsic onresistance; the input current presents small ripple; the output voltage can be further step up by increasing the transformer turns ratio without compromising the voltage stress across the switches; the output voltage is balanced thus making the converter suitable for supplying split-capacitor inverters. Several topologies where high voltage step up is possible are initially investigated in literature. Then the principle of operation, the design methodology, and experimental results for a 1kW prototype are presented to validate the theoretical analysis and demonstrate the converter performance. Keywords — boost converters, high voltage gain, stepup dc-dc converters, voltage multiplier cells. I. INTRODUCTION Several types of applications such as uninterruptible power systems (UPSs) and adjustable-speed drives (ASD) often demand the low dc voltage from batteries, photovoltaic panels, fuel cells, and small wind turbines to be stepped up. Typical low voltages range from 12 V to 125 V and must be increased to 300 V or 440 V so that a dc bus is obtained to supply a dc-ac stage [1]. It is worth to mention that the conventional boost converter is not adequate in such applications because the high output voltage demands high value for the duty cycle, which on the other hand leads the main switch to remain turned on for long time intervals in the switching period. Since the current though the diode is high, serious drawbacks concerning the reverse recovery phenomenon exist. The connection of several boost converters in cascade would be a possible solution, even though increased complexity and reduced efficiency are serious drawbacks in this case [2].

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In order to overcome the aforementioned limitations, several high voltage gain topologies have been presented in literature and will be discussed as follows. The conventional push-pull converter is adequate for low power applications and low input voltages, since the voltage stress across the main switches is twice the input voltage [3]. Other drawbacks include the leakage inductance of the transformer, responsible for high voltage peaks across the switch during turn on, the consequent need for clamping circuits to preserve the switches and possible saturation of the transformer due to its asymmetrical design and eventual differences in the duty cycle of the main switches. A boost converter with two inductors and an auxiliary transformer is presented in [4], even though the source and the load are not connected to a same reference node. A novel version of the structure is the introduced in [5], where the reference node is now the same one. Both converters employ a unity turns ratio transformer where the load flows through two inductors that maintain proper current sharing. To increase the voltage gain, the output side is arranged as a doubler rectifier. Prominent characteristics of the proposal are the input current ripple; the maximum voltage across the switches is half of the output voltage; high efficiency i.e. higher than 90%. However, it is worth to mention that the converter in [4] demands the use of isolate drive circuits for the switches or isolation of the output voltage sample. Considering the converter in [5], the whole load current flows through the capacitors, thus compromising robustness and reliability. Besides, the output voltage is supposed to be at least four time higher than the input voltage, while the output capacitor are supposed to be previously charged before startup. Finally, the eventual simultaneous turn off for the main switches would lead to a serious failure because the inductors are not able to be discharged, and thus an additional protection circuit is necessary in this case. The topologies shown in [6] and [7] are based on the use of switched capacitors, what also allows voltage step-up. Since many capacitors are necessary, the high voltage stress regarding the active switches limits this structure to low power applications. An interleaved boost converter with multiplier capacitors is proposed in [8] and [9]. This arrangement is analogous to the series capacitors used on the SEPIC converter, but allowing the static gain to increase. Even though it is recommended for high current applications where the input current ripple is reduced and the voltage stress across the main switches is half of the total output voltage, the high

current through the series capacitors may cause efficiency so decrease significantly in high power applications. The interleaved boost converter in [10] uses a generic cell where one additional inductor is coupled to each boost inductor. The proposal maintains the same structure of the traditional two-phase dc-dc converter, but two coupled inductors, two diodes, and two capacitors are added. High voltage gain is achieved, while the input current is continuous and the voltages across the switches are lower than half of the output voltage. The topology presents high efficiency and high power density, but the hard commutation of the active switches cause appreciable switching losses. In order to minimize them, it is possible to adopt the soft switching cells studied in [10] and [11]. Since the concept of the three-state switching cell (3SSC) was proposed firstly in [12], numerous dc-dc and ac-dc converter topologies have been proposed in literature during the last ten years. At this point, let us focus the analysis specifically on 3SSC-based converters with high voltage gain. A novel family of dc-dc converters using the 3SSC and VMCs was introduced in [13], while significant advances have been achieved in terms of reduced voltage stress across the main switches, reduced input ripple current, minimization of size, weight, and volume associated to magnetics, reduced switching losses, and high efficiency over the entire load range. However, the reduced useful life of series capacitors and high component count can be pointed out as drawbacks. The topology in [14] corresponds to a boost converter using the 3SSC and a secondary winding, where the aforementioned advantages associated to the 3SSC are obtained [13]. Besides, for a given duty cycle, the static gain can be changed by properly adjusting the turns ratio without increasing the voltage stress for the active switches, which are less than half of the output voltage. In this structure, part of the input power is directly transferred to the load without flowing through the active switches, thus implying reduced conduction losses. Unfortunately, this converter does not work properly when the duty cycle is lower than 0.5 due to magnetic induction issues. Within this context, this paper presents the qualitative and quantitative study of a high voltage gain dc-dc boost converter based on the 3SSC, which can be connected to split-capacitor inverters e.g. a half-bridge dc-dc converter according to Fig. 1. Besides the advantages addressed to the topology studied in [14], the voltage stress for the diodes is reduced and the voltage gain can be further increased by adjusting the turns ratio and a given number of secondary windings. The output voltage of the converter remains balanced, what is adequate for neutral-point-clamped (NPC) [15], half-bridge, and dual half-bridge inverters [16]. Firstly, the operating stages of the converter are presented so that an adequate design procedure can be established. An experimental prototype is then properly implemented so that the theoretical behavior of the structure is validated and relevant issues can be discussed.

Fig. 1. Dc-dc boost converter using the 3SSC supplying a halfbridge inverter.

II. PROPOSED DC-DC BOOST CONVERTER A. Qualitative Analysis The converter is composed by the following elements: input voltage Vbat, inductor L1, autotransformer Tr connected to the active switches S1 and S2, rectifier diodes D1, D2, D3, D4, D5, and D6, auxiliary clamping capacitors C1, C2, C3, C4, and C5, and output filter capacitors Co1 and Co2. The operating stages for the boost converter are determined by the behavior of the current flowing through L1. Even though the converter is able to operate in continuous conduction mode (CCM), discontinuous conduction mode (DCM), or critical conduction (CRM) with both conditions given by D>0.5 (OM) or D