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Degradation in GaN-based Heterostructure Field Effect Transistors; Mechanisms and Effects Morteza Monavarian Department of Electrical and Computer Engineering, Virginia Commonwealth University, Richmond, Virginia 23284, USA Abstract―GaN-based Heterostructure Field Effect Transistors (or HFETs) are currently facing many reliability issues despite being the most promising devices in microwave and power electronics. In this paper we intend to focus mainly on the degradation of these devices. This would be consisted of thermal issues as well as hot-electron and hot-phonon issues in GaN. Some studies about these phenomena and methods for decreasing their effects to the extent possible are reviewed.
demonstrate high mobilities obtained by modulation doping.
Keywords-GaN HFET Degradation, Hot-Electron, Hot-phonon Degradation, Thermal Noise in HFETs, GaN HFET Structures, Dual Channel HFETs, Coupled Channel HFETs, Current Collapse, Self-Heating, Phonon Lifetime, Thermally driven.
I.
I
INTRODUCTION
MPROVEMENTS experienced in high-power and highfrequency devices in recent years are mostly due to IIINitride Material and devices. GaN-based Field Effect Transistors or HFETs remain to be the most promising device for these applications mostly owing to their reasonable electron mobility, high carrier density and high breakdown field strength [1]. The first ideas of accumulation of charges at heterojunction interface and the potential to become a device was first introduced by L. Esaki and R. Tsu at IBM in the late 1960s. Raphael Tsu and Leo Esaki began their well-known collaboration which yielded a theory of man-made quantum materials, superlattices and quantum wells when they were with IBM. In fact, L. Esaki and his group in Bell Laboratories (BLT) fist reported this phenomenon to Physical Review Letter which was rejected. However, he published his paper with the same idea when he was with IBM. In a comment by Esaki in a 1987 number of Current Contents regarding the original paper on superlattices he says: “The original version of the paper was rejected for publication by Physical Review on the referee's unimaginative assertion that it was 'too speculative' and involved 'no new physics.' However, this proposal was quickly accepted by the Army Research Office” [2]. Perhaps the IBM paper has gained its penetration from Bell Lab’s previous work. However, without high epitaxial quality deposition techniques, the idea of accumulation of charges to become a heterostructure device could not be realized until after the development of extremely high precision epitaxial-growth techniques in the 1970s [3]. In 1978, some fellows from AT&T Bell Labs (R. Dingle, H. L. Stormer, A. C. Gossard, and W. Wiegmann) working independently, were the first to
Figure 1. A simple structure of a GaN/AlGaN Heterostrocture Field Effect Transistor (HFET) [6]
Around two years later, a similar device named modulationdoped FET (MODFET) was introduced by University of Illinois and Rockwell [4]. During 1980s, these efforts resulted in more complicated devices with high performance such as dual-heterojunction FETs or HFETs [5]. The main structure of these transistors is shown in Figure 1[6] which is a GaN/AlGaN HFET. However, this is not the only structure for GaN HFET. InAlN/AlN/GaN is another structure used for this purpose. Although both structures feature polarization while the AlGaN variety having piezoelectric polarization as well, their effects can be more or less intensified due to their structural characteristics. For instance, in the case of GaN/AlGaN, the piezoelectric effect is more intensified than that of in InAlN/AlN case due to lattice mismatch between the layers [7]. However, for the InAlN/AlN/GaN structure, the spontaneous polarization has the only role except when an AlN interface layer is used [8].
Figure 2. Schematic of a control structure GaN HFET Grown with OMVPE at Microelectronic Materials and Devices Laboratory (MMDL) at Virginia Commonwealth University
Figure 3. Schematics of a (left picture) dual-channel and (right picture) coupled-channel GaN HFET Grown with OMVPE at Microelectronic Materials and Devices Laboratory (MMDL) at Virginia Commonwealth University
Taking a look at the growth conditions for both structures gives interesting insights of them. For a typical growth with OrganoMetallic vapor Phase Epitaxy. Basically, depending on structures, we can categorize GaN/AlGaN HFETs mainly in three types. In fact, we grow these structures in our group as well. The first structure which is called a typical structure or control structure consists of a single 2-Dimensional Electron Gas channel (2DEG). The reason for such nomenclature is that other HFET structures are usually compared with this one for properties improvement. We describe only this structure since the main ideas of all three structures are the same. The HFET control structure starts with AlN grown on sapphire substrate followed by a thick GaN layer. The first layers of this GaN layer should act as a semi insulating layer and that is the reason for using the GaN on AlN (lattice mismatch). After growing the GaN, it is continued with AlN spacer layer. It is observed that the high frequency performance of AlGaN/GaN HFETs are degraded due to transferring of high energy electrons from GaN to AlGaN barrier. AlN layer can be grown in between to prevent the high energy electrons from moving to AlGaN layer by confining the GaN electrons and causing a high density 2DEG. However, this layer should not be thick (typically not more than 2nm thick) because of lattice mismatch between GaN and AlN causing strain relaxation and cracking [9]. In fact, the electron penetration into the barrier material will change the effective mass and the scattering rates therefore, it is used for better confinement of the 2DEG channel because of its wider bandgap. After that, the AlGaN is grown so that it can cause the electrons to form the channel in GaN due to polarization difference between it and the GaN layer below. The final 2nm GaN layer is used to protect the AlGaN from oxidation. Also, we can have a better metal contact on GaN than what we can on AlGaN. This structure is shown in Figure 2. The second structure we use for HFET is one with two channels which is called dual-channel HFET. The structure is
shown in Figure 3(a). As will be covered later, this structure will have higher electron density. The last HFET structure is the coupled channel HFET shown schematically in Figure 3(b). In this structure, unlike the dual channel one, the two channels are in the same levels of energy so they can be coupled and form a channel called 3Dimensional Electron Gas or 3DEG. Generally, In spite of impressive performance values of GaN based HFETs, their developments are currently bottlenecked with their reliability and performance limits. This phenomenon has always been a very important issue for device physicists and engineers. Due to the high electric fields involved in these devices and interaction of thermal, physical and polarization phenomena, etc. there would be several degradation pathways exist in HFETs. That is the reason why this issue has not been addressed completely. They can cause thermal issue leading to electrical current degradation as well as reliability limitations, gate leakage current, power dissipation issue related to hot-electron and hot-phonon interactions, etc., and can be caused by several mechanisms which will be discussed more in detail later. Recently, there has been a vast effort on characterizing these degradation mechanisms (both theoretically and experimentally) and finding ways to reduce the effects of them. The physics of plasmons affected in presence of lattice vibrations (phonons), hot-electrons, heat and humidity causing degradation, lifetime estimation, and accelerated lifetime tests are different study fields gaining popularity in the field of Microwave and power electronics. In general, depending on the operating time there are three main failure regimes as shown in Figure 4 [6].As we can see in this figure, a device failure is not independent of its operating time. In the early stages, the failure is named infant failure which decreases as the device operates more. After this period, the failure rate stays constant for a period named as random failure period. Finally, after long time of operation, there should be a period in which the failure rate increases in time. This is named as wear-out failure rate. We would like to eliminate the infant and random failure and reduce the wearout as much as possible. In this paper we intend to describe the aforementioned degradations. For the sake of that, we first go over the definitions of each mechanism and then we take a look at some very recent findings. Although it is very hard to classify all of the degradation mechanisms, in order to understand
Figure 4. Device failure rate with respect to operation time [6]
them better, we intend to classify them into three main mechanisms; electrical, thermal, and mechanical mechanisms. These mechanisms and their correlation are illustrated in a socalled “well-known triangle” which is shown in Figure5. Here, we start by the electrical mechanisms.
II. A.
ELECTRICAL DEGRADATIONS
Current Collapse
Although the GaN/AlGaN HFETs show excellent power performance (ten times higher than that of the conventional GaAs/AlGaAs), the current collapse as one of the degradations happen more in this kind of HFETs [10], [11].The compression of the output current swing which causes the output power density and power added efficiency to reduce under high-frequency large-signal drive is caused by this current collapse [12]. The large amount of defect-related trap states in GaN/AlGaN materials can be the reason for current collapse [13].There are several studies trying to model the current collapse mechanism including: trapping/detrapping of surface states in the gate-to-drain region, trapping within the AlGaN layer, virtual back gate effect of the GaN buffer, gate biasinduced non-uniform strain in the AlGaN barrier layer, and source resistance modulation due to space-charge suppression of the electric field in the source-to-gate spacing region. In order to alleviate the current collapse problem, the passivation phenomenon is introduced [14]. However, it is not always that effective [15]. Another method to reduce the current degradation is to devise GaN/AlGaN double-channel HFETs [11].
Figure 5.The complete and well-known triangle demonstrating the pathways between Electrical, Mechanical and Thermal Stress. This is a very complete picture giving a general insight to the degradation mechanisms. Based on this we attend to classify the degradation Mechanisms [6]
The dual channel HFETs as we briefly explained in the introduction, are HFETs with two 2DEG channels. One of the main reasons for using them is their higher current and output power as compared with single channel varieties, everything else being equal. However, Tomás Palacios et al. represent that the purpose of these multi channel FETs (AlGaN/GaN) is not to increase the output current since the single channel structures have already shown high performance in terms of current densities due to high 2DEG densities achievable with polarization induced carriers. Instead, they consider the differential source access resistance (
) decreasing as the
main reason for using multi channel devices [16]. One of the most important problems of GaN-based HFETs is their very high access resistance, almost one order of magnitude higher than in other semiconductor materials such as GaAs and InGaAs channel varieties [16]. This is a major problem for the fabrication of high-speed electronic devices where parasitic delays currently dominate. On the other hand, increase of the access resistance at high drain current levels contributes to fast degradation of both the extrinsic transconductance and the frequency response at such current levels. This degradation seriously affects the linearity and the maximum frequency of operation in power amplifiers [19]. Some groups use superlattice cap layers to reduce the sheet access resistance in AlGaN/GaNHFETs [17]. One of them had previously reported increasing of differential access resistance with increasing drain current due to quasi saturation of the electron velocity [18]. Instead, it was working on alternatives such as heavily doped n+ cap layers, implanted access regions, and use of double-channel structures. In dual channel HFETs the electron distribution is very important. Figure 6 shows electron profile in a dual channel HFET (AlGaN-GaN-AlGaN-GaN) [13]. As will be discussed later, at a specific carrier concentration, the phonon-plasmon resonance occurs, meaning that the hot electrons contribution with hot LO phonons is the highest, and as a result there would be the best power dissipation and lowest thermal noise. This may vary by different carrier concentration. Our group also works on finding this dependency using dual and coupled channel HFETs to achieve better performance in terms of lowest noise.
Figure 6. A electron concentration profile measured and calculated in an study done by Rongming CHU [13].
B.
Hot-Electron and Hot-Phonon Issue
In HFETs we expect the output power to be high. Also, since the density of electrons in the channel is high, the capacitances will get charged and discharged more rapidly and as a result it can operate at relatively high frequencies. However, experiments show something quite opposite in GaN-based HFETs. As shown in Figure7 which is the gain cut off frequency versus the gate length for different electron densities (in which the squares, triangles, and diamonds represent the 2DEG densities of 2.5×1013cm-2, 2.07×1013cm-2, and 1.4×1013cm-2 and, respectively). For a specific gate length, there is no increase of cut off frequency with increasing 2DEG density [20]. This can be explained in terms of hot-electron fluctuation demonstrating a high correlation between microwave electron fluctuation and degradation of the nitride HFETs in terms of RF performance [21]. The correlation between microwave electron fluctuation and RF performance originates from the dissipation of the longitudinal optical (LO) phonons accumulated due to a high interaction of the non-equilibrium phonons (perhaps generated 30 times more in GaN than in GaAs [6]) and electrons subjected to high electric fields (see Figure 8) [20].When the electrons in 2DEG channel experience high electric fields, they come out of equilibrium and become hot as a result of getting more and more energy. These hot-electrons interact highly with hot phonons. Since GaN is a highly ionic material, as shown in Figure 8, these electrons tend to emit LO phonons more than other modes. However, this mode is accumulated in the material and does not dissipate efficiently because of its low group velocity. Therefore, for dissipation of heat generated by hot electrons, the LO phonons have to convert to another mode with higher group velocity (LA) [22]. Therefore, the faster the LO phonon decays to the LA, which have high group velocity, the better the heat dissipation is. This means that now we can consider the issue of power dissipation in the context of LO phonon lifetime [20]. In fact, hot LO phonon population is due to the very efficient electron phonon coupling in GaN and relatively inefficient LO phonon to LA phonon decay [6].
Figure 7. Gain cut off frequency versus gate length for different electron density (in which the squares, triangles, and diamonds represents the 2DEG densities of 2.5×1013cm-2, 2.07×1013cm-2, and 1.4×1013cm-2 respectively [20].
Figure 8. Schematic of dissipation paths in GaN for hot-electrons to cool down, They mostly emit LO phonons but not LA phonons [20].
Actually, in GaN since the TO phonons are also observed to participate and also because the LO phonon energy is higher than that of the LA, the path of converting of the LO phonon will definitely be TO+LA [23]. In Figure 9 we can see that the hot-phonon temperature is increasing with the 2DEG density [20]. In this figure, if the hot phonons do not convert efficiently, they will scatter more electrons in 2DEG channel and cause current reduction of the channel as well as the hot-electron drift velocity and the frequency performance of the device [24]. It can also cause point defects and degradation as a result [6]. There is a useful diagram showing the effects of hotphonon, degeneracy and self-heating on electron velocity in GaN based HFET on Monte Carlo simulation as well as experiments shown in Figure10. In this figure the red circles show the experimental data [6]. Now, we intend to find the phonon lifetime expression as what Matulionis et al. have done in their papers. Fluctuation dissipation based technique is applied to find the hot-electron noise temperature experimentally [20], [22]. This technique is best for electric fields and temperatures where the interaction of electron and LO phonon is the dominant way of dissipating the hot-electron energy [20]. In this method, the hot-electron fluctuation causes emission of microwave radiation which has power. This can be detected by a very sensitive radiometer. This pulsed noise power measurement is done before, during and after the voltage pulsed used to heat the electrons and integrate over time and also is compared with a known noise power. Finally, an average noise power of the sample is achieved. A schematic circuit of the gated radiometric set-up is illustrated in Figure 11. The equivalent noise temperature then can be achieved from the measured noise power as follows [22]
Tn f
1 Pn ( f ) kB f
(1)
Since the interaction of electron–LO-phonon in GaN is strong and because of the high density of electrons in a 2DEG channel, the electron temperature can be introduced [25]. In
some studies by M. Ramonas et al. we can see the Monte Carlo simulation results of electron distribution as a function of electron kinetic energy for different numbers of subbands in
Figure 11. Schematic diagram radiometric set-up for measuring the hotelectron noise temperature [22]
Figure 9. Experimental data for hot-phonon temperature as a function of electric field, The bullets, stars, and triangles represent the 2DEG densities of 8×1012cm-2 , 1.2.×1013cm-2, and 2.5×1013cm-2 respectively [20].
Figure 12. Simulation results for electron distribution as a function of electron kinetic energy for a AlGaN/AlN/GaN heterostructure at 300K lattice temperature and 10 kV/cm applied electric field, Circles, squares, and triangles stand for the first, second, and third subband, respectively and the solid line is fitted Fermi-Dirac distribution, here the estimated electron temperature is Te=590K [9].
Figure 10. The drift velocity versus electric field simulation results considering different degradation such as self heating and hot-phonons, as well as experimental date. We can see the effects of those degradations separately [6].
AlGaN/AlN/GaN HFETs (see Figure 12) [9]. According to this figure, it is observable that for each of the branches using the same temperature and Fermi energy, the figure can be fitted by Fermi-Dirac distribution (solid lines). Therefore, one can consider an equivalent electron temperature corresponding to the fitted distribution function [9], [26]. According to Monte Carlo simulations, the noise temperature Tn is close to the hot-electron temperature Te.
This is shown in Figure 13 [20]. Original fluctuation technique estimates the hot-phonon lifetime τ LO
according to the
Arrhenius type expression for the dissipated power
Pd
LO exp exp LO LO k BTe
Under steady-state conditions the supplied power
[25]: (2)
is equal to . When the electron LO phonon interaction is the dominant electron energy dissipation, the dissipated power is determined by the electron and LO phonon temperatures. The electron energy dissipation includes spontaneous and stimulated emission of LO phonons by high-energy electrons
Figure 13. Noise temperature dependency of the electron temperature for 2DEG channel located in AlGaN/AlN/GaN at 300K (circles) and AlGaAs/GaAs/AlGaAs at 77K (open triangles). Line is the hot-electron temperature. [20].
and re-absorption of LO phonons by all electrons. The power dissipated by an average electron as follows [20]:
Pd
where
LO 1 N LO p LO N LO p sp abs
(3)
τ sp is the mean time for spontaneous emission of an
LO-phonon by a hot-electron,
τ abs
is the mean time for LO-
phonon absorption by any of the electrons, and the
probabilities P to find an electron ready either to emit (–) or absorb (+) an LO phonon which are given by the following integral [20]:
p D
f 1 f
LO d / n2 D
(4)
Since short-wavelength LO phonons do not interact with the electrons and play no role at all, the higher energy modes are mainly responsible for the power dissipation and as a result the introduced equivalent hot-phonon temperature is representative for the all hot-phonon modes. The obtained dependency of
TPh
on
Te
is demonstrated in Figure 14 [22].
We can approximately say that:
Tph Te
(5)
Because of strong coupling inside the hot subsystem in the GaNheterostructures, the hot electrons and the hot-phonons demonstrate close temperatures and relax together [28]. Thus, the phonon lifetime will be:
LO e , (6)
Figure 14. Equivalent hot-phonon temperature dependency of hot-electron temperature for GaN 2DEG channel located in Al0 0.33Ga0.67N/AlN/GaN (bullets) and In0.18Al0.82N/AlN/GaN (squares). Dashed line represents hotelectron temperature. [22].
where the hot-electron relaxation time can be measured from the noise experiment as [28]:
e kB
dTe dPs
(7)
At a specific carrier concentration, the phonon-plasmon resonance occurs, meaning that the hot electron interaction with hot LO phonons is the highest, and as a result there would be the best power dissipation and lowest thermal noise. Our group also works on finding this dependency using single dual and coupled channel HFETs to find better performance in terms of lowest noise. Figure 15 shows LO phonon lifetime versus electron concentration for some channels: single channel, standard and camelback channels with profile showing in Figure 16 measured by capacitance-voltage technique that will be explained [29]. The way to find the electron profile from the CV measurement is interesting. After getting the C-V characteristics of a Schottky diode, using the following equation we can find the approximated 2DEG density [29]: 1 d 2 (8) C n 2 qA2 dV Here ε is the dielectric constant, q is the electron charge, and A is the area of the diode. The electron density as a function of the depletion depth in a study of our group, is shown in Figure 17 using this equation [30]. The approximated 2DEG density versus applied voltage can also be obtained by integrating of the density versus depth with respect to applied voltage, which is also done and shown in the same figure [30]. There are also some other studies showing that hot phonon lifetime depends on power (see Figure 18). For a device with a 2DEG density of 0.8×1012 cm-2, the value of hot phonon lifetime tends to decrease to a minimum and subsequently
begins increasing again as the power applied to the 2DEG is increased further and further [30].
affected. And also the peak electron density decreases by increasing the temperature. As a result, the 2DEG resonance density is incrasing with increasing the temperature. This dependency is shown in Figure 19 as done in a study by Matulionis et al [31].
A.
Figure 15. Hot-phonon lifetime versus sheet electron density for different HFET structures with electron density profile shown in the next figure to find the resonance, Solid line guides the eye. The resonance density is 7×1012 cm2 [29].
Gate Leakage Current
Gate leakage current is another form of degradation that happens at high fields. When the drain bias is high, there would be a high field at the edge of the gate. The electrons in the gate would experience a high field. Therefore, some of them gain enough energy for tunneling to the surface of the semiconductor [32]. In order to understand better this phenomenon and the degradation caused by it, shown in a figure (Figure 20) from the handbook, is the gate I-V characteristics for a device before and after RF stress [6]. These electrons can have four different effects.
Figure 16. The measured electron density profile done by MMDL [29] Figure 18. Hot-phonon lifetime measurement with respect to different 2DEG 12 density (open squares)and for fixed 2DEG density of electrons of 0.8×10 -2 cm for different applied power (closed squares) done by MMDL. The solid lines are a fit using the simple resonance curve using equation (1) [29].
Figure 17. Electron density versus depth profile coming from the C-V measurement of aschottky diode done by MMDL, Also, 2DEG density as a function of applied voltage [30]
Another Issue we consider is the 2DEG channel temperature’s dependency on supplied power. We know that a gas expands when heated. Therefore, the plasmon frequency is
Figure 19 .The estimated resonance 2DEG density dependency of hot-electron temperature [31]
In Figure 21 (also from the handbook) we can see this phenomenon more clearly [6]. First, they can accumulate at the surface of the semiconductor. In this case, the accumulated charges between the gate and the drain acts as a “virtual gate” meaning that it causes the gate to be extended to the drain side [33]. These charges will affect the channel because of the electrostatic field and will deplete the channel and degrade the output power as a result. This degradation will be more and more noticeable with continual operation. Therefore, this can be a very important reliability issue which needs to be considered seriously. Recently, there have been several studies working on decreasing this effect resulting in solutions such as surface passivation and using field plate for it [34]. Using field plate (or fabricating T-shaped Gate) will increase the area in which the electric field will spread and as a result reduce the effect of high fields and in that way it can reduce the electron tunneling. R. Borges et al. have shown
Figure 21 .Mechanisms for Gate leakage current in GaN-based HFETs [6]
some simulation results of GaN HFET reliability using field plates. Figure 22 shows the surface temperature simulation with and without field plates [35].However, some critics illustrate the reduction of operation frequency of the device. It is clear that using a plate will increase the area and the corresponding capacitance which causes time constants and lower frequencies of switching [6]. In field plate GaN/AlGaN HFETs both the peak electric fields at the gate and field plate edges are sufficiently suppressed. In a study [1] using both gate and drain field
Figure 20 .I-V characteristic of a GaN/AlGaN HFET for (a) Gate drain diode and (b) gate source diode before and after applying RF stress. The effects of the stress on these characteristics are quite clear [6].
Figure 22 .Simulation results for surface temperature of GaN HFET (a) without any field plates, (b) with both gate and source field plates and (c) only with gate field plates. This shows that in the case of using field plates, electron temperatures near the drain-edge of the gate is much lower compare to what
exists in the absence of the field plates. Note that the field plates are not shown in this figure [35].
plates, is mentioned that the channel breakdown voltage can be increased by adding the drain field plate which spreads out the electric field around the drain. This is true because the electric field at the drain side is the field which first reaches the limit for breakdown voltage. Using surface passivation is another solution for gate leakage current. For the sake of reducing the accumulated charge in the surface of the semiconductor, we can use a thin layer with high dielectric constant such as SiNx and SiO2 on the surface of the semiconductor. In previous studies, silicon nitride passivation layers have been found to lead to increased dc current density and improved RF power output in AlxGa1xN/GaN HFETs [36]. The SiO2 also reduce the gate leakage effect. In a study done in the University of San Diego, it is claimed that using the SiO2 layer as a passivation layer cause the increasing of the carrier concentration and reduction of the mobility as well. They consider it consistent with a shift in the Fermi level at the AlGaN surface towards the conduction-band edge in the presence of the SiO2 layer compared to its position for the freeAlGaN surface [37]. Second, they can go to the drain side by moving along the surface by trap to trap hoping mechanism and cause a gate to drain current [6]. Third, the charges the surface have not a precise amount and can vary. Therefore, the current and output power degradation is not always the same. This can cause the HFET’s instability. Finally, in the case of very high energy of the electrons, avalanche ionization can occur at the surface of the semiconductor. In the case of gate being reverse biased, when an electron comes to the surface, it can pass the depletion region in semiconductor by trap to trap hoping. Since the depletion region on the drain side is wider, it goes to that side. This electron can cause another electron-hole pair generation to occur. This process happens like an avalanche (that’s the reason it is called the avalanched ionization) and causes a current. In the case of GaAs MESFETs after ending this process, there is a light coming out of the gate. However, this is not the case for GaN HFETs [6]
B.
Metallurgical Degradation
In addition to degradation related to semiconductor, the metals can also be degraded. Metallurgical degradations are basically due to the metal contacts in devices. Here we intend to very briefly go over two main kinds of these degradations; Electromigration and Phase change [6]. When the electrons in a wire become very hot (due to high applied field) they collide with the lattice and displace the atoms mainly caused by unidirectional current flow. This
phenomenon is called electromigration. It happens like what happens in avalanche mechanisms or every phenomenon that occurs with positive feedback. When one electron cause one atom to displace, the area of the wire through which the current flows become smaller. This means that the electrons will face more atoms in their path (equivalent to higher resistivity). Therefore, this mechanism becomes stronger and stronger to the point that if the wire’s dimension is small enough, it can even be cut from a point. However, this cannot be the case when we are dealing with relatively high metal dimension (typically more than 1μm). In Figure 23, we see an image of a wire (or can be interconnect in VLSI) after electromigration [38].
Figure 23 .Electromigration causing damage to an interconnect [35]
The same can happen in the metal contacts of the HFETs due to the high applied electric field needed in power microwave systems. Although it may not cause cutting like what happened in VLSI interconnects, the displacements of the atoms in the lattice caused by hot-electrons can be a trap which has bad degradation effects. During device operation, as we said before, the temperature becomes high and can cause phase changing of the metal contacts which can cause the device not to operate properly and cause instability. Therefore, this also can be a source of degradation. A.
Hot-Electron Effects
High drain bias, which is the case most of the time since HFETs are designed to get high output power, causes the electrons in the 2DEG channel to become hot. These hot electrons are observed to cause traps in the semiconductor. Theoretically, these hot electrons affect the atoms of the semiconductor due to their high energy and cause them to change position. Even if the displacement is not very much, it can be a trap and cause degradations. In a study by a group from Cornell University, an experiment is done to find the effects of hot electron stress on the degradation of undoped Al0.35GaN0.65/GaN power HFET with SiN passivation [39]. Schematic diagram of an AlGaN/GaN heterostructure grown by OMVPE by this group is shown in Figure 24. The DC stress has been performed at two different conditions (condition 1: (VDS = 10V, VGS = 0V) and condition 2: (VDS= 20V and VGS = -4.5V).) for 10 hours to separate the effects of thermal and hot electron induced degradations. These stress conditions cause different bias
conditions in the same temperature. In condition 2, the electric field between gate and drain is definitely higher increasing the hot electron effect. The results of I-V characteristics for both conditions are shown in Figure 25 which is consistent with theory.
III.
THERMAL DEGRADATION
A. Self heating Issue
Figure 24. Schematic diagram of a GaN/AlGaN grown by OMVPE by a group at Cornell University to find the hot-electron effect on device performance [39]
When the lattice cannot dissipate the heat generated by hotelectrons through hot- LO phonon emission, this additional heat accumulates in the structure and interacts with more hot electrons and cause more heat while there is no efficient dissipation mechanism. Therefore, the device gets hotter and hotter which causes degradation. This mechanism named “self-heating” is an important issue in GaN HFETs which deal with high current and high power. In a study done by R. Gaska et al. the self heating is studied based on whether using sapphire or SiC as substrate [40]. It is mentioned that in AlGaN/GaN HFETs grown on 6H-SiC, the maximum dissipated power is at least three times higher than that grown on sapphire under the same conditions. This can be a result of the higher thermal conductivity relative to sapphire. However, the problem with using SiC as substrate is its cost. To better understand the self heating effect, we can take a look at the simulation results of temperature rise in GaN/AlGaN HFETs having different geometry, layered structure, doping density and substrate type done by a group from UC Riverside [41]. In order to obtain the temperature rise, K. A. Filippov et al. start with nonlinear flow equation and continue with simulation of temperature rise in the doped and undoped GaN/AlGaN HFET channel on SiC. The structure used for simulation and the simulation result are shown in Figure 26, Figure 27 respectively [40]. From the figure, it seems that the sample with GaN 2DEG channel layer does not dissipate the heat well compared with the sample with the same condition and with doped GaN channel layer. From solid state physics we know that there are two mechanisms that contribute for thermal conduction. Thermal conduction can be the result of lattice vibration as well as electronic conduction. The lattice contribution to thermal conductivity in pure crystals is given by
1 klattice T vS Clattice T L(T ), 3 where
(9)
T is the temperature, vS is the velocity of sound,
Clattice T is the lattice specific heat, and L T is the phonon mean free length. However, in the electron contribution to thermal conduction is not significant for doping concentration less than 1019 cm3 . On the other hand, since threading dislocations degrade Figure 25. I-V characteristics of AlGaN/GaN HFETs before and after hot electron stress. (a) Stressed at VDS=10V and VGS=0V for 10 h. (b) Stressed at VDS = 20 V and VGS= 4.5V [39]
vS and
increase the phonon scattering,
the thermal conductivity reduces by increasing the dislocation density (the freestanding GaN has much better thermal conductivity than GaN epilayers). The increase of phonon scattering due to increase of doping concentration is predominates over the increase of electronic contribution.
Therefore, the thermal conductivity decreases (around factor of two decrease in for every decade increase in n ) by increasing the doping concentrations which is consistent with the findings here [42], [44].
(a)
Figure 26. layered structure of doped/undoped HFET, simulation on this structure is done by a group from UC Riverside [41].
They also illustrate that for more temperature rises, the mobility starts to degrade more and also for smaller device dimensions, the adverse effect of the doping is even more pronounced (probably because of increasing the density of dislocations and defects due to decreasing the size).
A. Thermally Driven related Degradations In order to find a specific degradation effect on the device, it is customary to devisetest condition in such a way that other degradation mechanisms do not interfere with the specific results. When the gate is reversed biased, the drain current is
(b) Figure27 .Temperature rise profile in the (a) undoped and (b) doped channel GaN/AlGaN HFET grown on SiC substrate. Note the temperature scale difference in two figures [41].
very low and therefore when applying heat, we can assume that there is no any other effect exists in channel except the applied thermal energy. This way we can keep track of the thermally driven degradation effects. Thus, applying this condition to the device, we can find out how the thermal energy is dissipated in the channel. This can be related to the thermal conductivity of the material. We know that the more acoustic phonon modes occupied in a structure, the more the thermal conductivity is. As we showed before, the acoustic phonon group velocity is much higher than that for the optical branches. Therefore, we see that at low temperatures (where the optical phonon modes are not occupied and only the acoustic modes are occupied. However, this is only true for low electric fields which is usually not the case for HFETs unless we measure for very small drain and gate biases. We can also say that According to
(9), At low temperatures L is relatively long and is dominated by finite crystal size (size effect) and defects (in the case of pure crystal it is negligible) and Clattice T ~
T / D
3
D is Clattice T
, where
the Debye temperature. As the temperature increases
begins to saturate [44]. At very high temperatures the thermal
conductivity drops due to the Umklapp (anharmonic phononphonon or phonon-electron scattering) processes [42] (see Figure 28). In a recent study, some methods such as Micro-Raman thermography, micro-photoluminescence spectroscopy, and thermal simulation are applied to better understand the thermal properties of AlGaN/GaN HFETs. It is mentioned that in bulk GaN, the thermal conductivity is higher than in epilayers due to the fact that the bulk material has less density of dislocations. However, if the bulk’s quality is good enough, the epilayers will also be good (unless the growth quality is not good). However, it is proved that the thermal resistance of GaN-on-SiC is quite similar to that of the GaN-on-GaN. The reason can be related to the absence of the thermal boundary resistance between the device layers and the substrate [43]. In the case of the latter although GaN has slightly smaller thermal conductivity – 260Wm1k 1 for bulk GaN compared to 480Wm1k 1 for SiC– the thermal resistances of GaN-on-SiC (Manoi et al. presented from 1108W 1m2 k to 6 108W 1m2 k [44]) quite similar to that of the GaN-on-GaN. In Figure 29 the surface temperature and depth profile at the center of a 30 × 80 μm2ungated AlGaN/GaN device is shown, measured with micro-PL spectroscopy and microRaman thermography, respectively. Using this figure and the assumption of zero Thermal Boundary Resistance (TBReff) at the GaN–GaN interface and a homogeneous thermal conductivity of the GaN, and fitting the measured curve with the 3D-T thermal model with standard thermal conductivity temperature dependence of T 1.4 (different from handbook which was T 1.22 ) the thermal conductivity of 260Wm1k 1 is obtained which is relatively higher than that of a thin epilayer which is around 150Wm1k 1 . However, this seems not be a so new figure.
Figure 28. Thermal conductivity of a 200μm freestanding GaN versus temperature, the dashed line shows the 500 μm phonon mean free path scattering limit due to size effect, T-1.22 dependence between about 80 – 300K, and earlier results of Sichel and Pankove [45]
Figure 29. Temperature rise versus depth from the surface of the device to the bulk GaN [43].
Assuming 260Wm1k 1 is correct, it compares with 230Wm1k 1 which one should have in the epilayer [43]. This figure also reveals a comparison of vertical temperature profile of the GaN-on-GaN and GaN-on-SiC. There are many groups focusing simply on improving the thermal issue of the GaN-based HFETs which we couldn’t bring them here since it necessitates more time, and even more space. Actually, going over of these progress history can be done as future works. A. Reliability and Lifetime Test
Thermal effect is one of the main issues causing troubles for the device performance. This is very popular mechanism since the device is mostly working in relatively high temperatures. Device reliability is a very important issue in the industry. Nowadays every company as well as many research institutes has a specific section mainly focusing on the quality and reliability of its devices. A minimum device lifetime is required for any devices produced. Therefore, industry pays an important attention on their devices reliability. There are several tests done on devices called lifetime tests. As one can understand from the name of it, these tests are done to estimate the lifetime of a device. Since one cannot wait for 10 years (for example) to see what happens, they apply some conditions to do a short test for lifetime estimation-called accelerated lifetime test. This accelerated lifetime test is mainly done for three different temperature and the Mean Time To Failure (MTTF) of each is measured. This is called three-temperature life test. Extrapolation to a temperature in which the device is mostly operated (note that the channel temperature is higher than the case temperature) one can get the MTTF for the device. In Figure 30 we can see how they estimate the MTTF in threetemperature lifetime test [6]. To be more exact, it is usual to stress the largest numbers of devices possible but in the way that they do not lose any precision (as realistic as possible) [6].
Figure 30. Mean Time To Failure At three different temperatures 260, 285, and 310c° leading to activation energy of 2eV and by extrapolation, the MTTF of more than 107 h in 150c° [6].
IV.
MECHANICAL DEGRADATIONS
A. Inverse Piezoelectric Effect The mechanical concern is also important as part of the famous triangle shown before. One of the most important mechanisms related to mechanical degradation is inverse piezoelectric effect. When applying a reverse gate bias, the channel will be more and more depleted. When applying high reverse gate bias the semiconductor will be mechanically affected and even broken. This effect is called inverse piezoelectric effect. We know that, GaN is a polar material meaning that the valence electrons are not evenly shared between two neighbors. This causes the crystal to be locally polarized. However, globally the polarization vector is zero. Therefore, when applying mechanical pressure, as shown in Figure 31 [45], the crystal structure may bend or expand (depending on the force direction) and cause a net polarization which can act as electric field. This phenomenon is called piezoelectric effect. On the other hand, if we apply electric field to this crystal, again the crystal may bend or expand (depending on the electric field direction). This time, the electric field causes the mechanical force. This effect is called inverse piezoelectric field. Now, suppose that we apply too much electric field in the direction opposite to the direction of crystal relaxation. This causes a very high mechanical force and may cause damage to the crystal. This is exactly what happens to the GaN when applying too much reverse bias to the gate. This is another issue which we have to consider since we need to increase device longevity or lifetime.
Figure 31. The inverse piezoelectric effect in GaN materials, from the left to the right we can see that the three N atoms have been expanded due to electric field. In the case of high field, it can cause mechanical damages [45].
B.
Correlation of Electrical and Mechanical Degradations
In general, degradation can be either reversible, or irreversible. If a device after ending the stress test returns to its normal condition as before, we can say that the degradation affected the device is reversible. However, sometimes after the degradation ends, the device is changed. When applying electric field to a device (which can be reversible at relatively low fields), the electrical degradation is characterized by a critical voltage. Applying higher voltages than the critical voltage causes irreversible degradation starts to happen. A group from MIT has written a paper in which not only they showed the significant crystallographic damage caused by very high fields using TEM, but they also they demonstrate a correlation between the electrical degradation (mostly current collapse) and material degradation as mechanical effect [46]. Figure 32 shows TEM pictures obtained for selected devices from the step-stress experiments. As we can see from the figure, the devices stressed less than 16 V show minimal structural degradation. The devices stressed far more than the critical voltage (25V and 37V) shows significant physical degradation in the form of deep pits (up to 4–6 nm in depth and 17 nm in width at the surface). Similar observations also have been reported on the source side since the stress is symmetrical to the both sides. In order to find the correlation between electrical and physical degradations they measure the pits depth and width for different samples from the TEM pictures. Then, they graph the degradation in uncollapsed I Dmax (in absolute amount) and the value of current collapse against the depth of the defective region in order to get to a quantitative comparison between electrical and mechanical degradations. This is shown in Figure 33 [45] meaning that these mechanisms are correlated and there is evidence showing that the crystallographic damage responsible for electrical degradation.
Figure 33. the correlation of electrical and physical degradation by showing (a) permanent I Dmax and (b) current collapse versus pit depth [45].
Another study shows that the UV illumination decreases the critical voltage in GaN-on-Si very much but for GaN-onSiC the effect is not significant [47]. If we suppose that the grown material quality is good enough (which may not be the case, specially for GaN on Silicon) we can say that the results given by this group can be justified as follows. The UV causes the electrons to detrap and due to the electric field caused because of the inverse piezoelectric effect. Therefore this effect is much more pronounced in GaN-on-Si because of the large number of traps [47]. This can be another correlation of electrical and physical degradations.
V.
Figure 32. Cross-sectional TEM pictures of drain side of the gate at different bias conditions (different voltages) [42].
CONCLUSIONS
GaN based Heterostructure Field Effect Transistors are undoubtedly, the most promising devices for high power and high frequency applications. As discussed in this article, despite of their tremendous improvements their performance is limited by many issues which cannot be fully addressed. Here, we intended to demonstrate some of the most important degradation mechanisms. Generally, we classified these degradations due to their origins and effects into Electrical, Thermal, and Mechanical degradations. Each of the classified mechanisms are tried to be described as much as possible. Finally, we come into this conclusion that although the GaNbased HFETs have outperform the present other semiconductors applied in industry (such as GaAs, Si, InP), there are lots of efforts in design, fabrication, and also understanding of device physics needed to overcome these degradations and find its right place in the industry.
ACKNOWLEDGMENT The author would like to gratefully appreciate Prof. Hadis Morkoç for intelligent selection of this attractive topic, his guidance while preparing the parts and recommendation on how to make it better.
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