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Abstract—This paper proposes a fault direction estimation technique for a line with a thyristor-controlled series capacitor. (TCSC). Such a compensated line ...
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IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 28, NO. 2, APRIL 2013

Directional Relaying in the Presence of a Thyristor-Controlled Series Capacitor Premalata Jena and Ashok Kumar Pradhan, Senior Member, IEEE

Abstract—This paper proposes a fault direction estimation technique for a line with a thyristor-controlled series capacitor (TCSC). Such a compensated line imposes problems to directional relaying schemes due to reactance modulation, current, and voltage inversion issues and TCSC-control action. Three positive-sequence-based classifiers are combined in an integrated approach to estimate the direction of fault for a line with TCSC. The method is tested for different fault situations, such as high resistance fault, close-in fault, as well as voltage and current inversions, and is found to be accurate. Index Terms—Current inversion, digital relay, directional relay, thyristor-controlled series capacitor (TCSC), transmission-line fault, voltage inversion.

Fig. 1. Three-phase power system.

relaying. The performance of the technique is evaluated for numerous fault situations, which include balanced and unbalanced faults, high resistance fault, close-in fault, change in source capacity, and variation in TCSC control action, and is found to be accurate.

I. INTRODUCTION

II. POWER SYSTEM

T

HYRISTOR-CONTROLLED series capacitor (TCSC) has been applied increasingly to control power flow through a network, limit short-circuit currents, mitigate subsynchronous resonance, damp out power oscillations, and enhance transient stability [1]–[3]. With the presence of TCSC, a protection problem arises due to the variable reactance inserted to the network, modulation in current, and the functioning of metal–oxide varistors (MOV) protecting it [4]–[14]. The control action in TCSC leads to asymmetric structure and produces sequence components. For unbalanced faults in the line, the TCSC modulates the fundamental components of voltage and current, and the directional relaying algorithms based on sequence components are affected [8]. With the operation of TCSC in the capacitive mode, voltage and current inversion problems may arise [7] and will lead to challenge directional relaying. This paper addresses the problems with directional relaying in the presence of TCSC in a line and proposes a solution. It is found that a single classifier using the phase information of sequence components is inadequate to provide direction of fault for all situations for a line with TCSC. More reliable protection algorithms can be achieved by combining several protection principles together [15], [16]. The voting method, which uses various classifiers in combination, is applied for directional Manuscript received August 25, 2011; revised June 28, 2012; accepted February 10, 2013. Date of publication March 12, 2013; date of current version March 21, 2013. Paper no. TPWRD-00713-2011. P. Jena is with the Department of Electrical Engineering, Indian Institute of Technology Roorkee, Roorkee, India (e-mail: [email protected]). A. K. Pradhan is with the Department of Electrical Engineering, Indian Institute of Technology Kharagpur, Kharagpur 721302, India (e-mail: [email protected]). Digital Object Identifier 10.1109/TPWRD.2013.2249538

A 400-kV, 50-Hz three-phase power system as shown in Fig. 1 is considered. In the system, line segments are modeled with distributed parameters in EMTDC/PSCAD. Line-2 is compensated and the TCSC is placed at bus-M as shown. The directional relay at bus M is studied in this paper. The CT ratio is 2000: 5 and PT ratio is 400 kV: 110 V. The detailed system data are provided in the Appendix. The TCSC operates with four modes of operations: 1) blocking mode; 2) bypass mode; 3) capacitive boost mode; and 4) inductive boost mode depending on the situation. III. DIRECTIONAL RELAYING PROBLEM IN THE PRESENCE OF TCSC Current and impedance change when TCSC switches over from one mode of operation to another mode. This transition period introduces the transient and harmonics in voltages and currents. The modulation in voltage and current signals affects the directional relaying algorithms. During capacitive boost mode of operation, voltage and current inversion problems may arise. A. Voltage Inversion Condition Voltage inversion at a relay bus occurs when the total impedance between the voltage source and the fault is inductive and simultaneously the impedance between the bus and the fault point is capacitive. Voltage inversion results in the relay seeing the forward fault in reverse direction. The equivalent reactance diagram of the TCSC system is shown in Fig. 2. For a fault at F and with TCSC in capacitive mode, the fault current through the relay bus M in Fig. 2 will be

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JENA AND PRADHAN: DIRECTIONAL RELAYING IN THE PRESENCE OF TCSC

Fig. 2. Reactance diagram of the line with TCSC.

Current lags or leads the voltage by 90 , depending on the sign of the denominator. Further

(2) will be inverted when the following conditions are satisfied: (3) For the above situation, the directional relay will see the fault in the reverse side. B. Current Inversion Condition For a forward fault in the line, if the current at the relay location leads the relay voltage by 90 due to the large capacitive reactance in the fault loop and simultaneously the relay voltage is in phase with the source voltage, current inversion occurs. The condition for current inversion becomes (4) At this situation also, the relay will see the fault in the reverse direction. IV. PROPOSED DIRECTIONAL RELAYING TECHNIQUE FOR THE LINE WITH TCSC In case of the TCSC line, the presence of capacitor and TCR introduces harmonics in voltage and current and modulates the line reactance. Thus, any sequence component-based directional relaying algorithm finds limitations at different situations. In this paper, three positive-sequence-based classifiers are combined using the voting technique. For the simulation, the three-phase power system of Fig. 1 is considered with the directional relay at bus M. A. Classifiers The positive-sequence component is available for all types of faults in a power system. Three positive-sequence-based classifiers are considered for the estimated direction of fault. The first classifier uses the angle between the positive-sequence fault current and voltage to obtain the direction of fault. The second one uses the angle between the positive-sequence superimposedbased voltage and current. The angle between the positive-sequence fault and prefault current is used by the third classifier for the estimated direction of fault. 1) Classifier-1: Phase Angle Between the Positive-Sequence Component of Fault Current and Voltage: The angle between the positive-sequence fault current and voltage is a

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common technique for directional relaying. Fig. 3(a) and (b) shows the different positive-sequence phasor positions during faults in the Fx and Fy sides of the relay, respectively. With during a fault in the system, the rule of decision with such a classifier in the normal line will be: a positive angle corresponds to a fault in the upstream and negative angle for the downstream fault. Though this is an important classifier, it has limitations during voltage/current inversion in a TCSC-compensated line. During capacitive mode of operation, for the fault in the Fx side, is positive and provides the correct direction of fault. For a fault in the Fy side, is again positive, resulting in an incorrect direction of fault due to the voltage inversion. During voltage inversion, the angle between fault and prefault voltage at the relay location is much higher as shown in Fig. 3(b) and is used as the indicator of voltage inversion. During current inversion, the fault voltage at the relay location is more than the prefault voltage [18]. The change in magnitude of positive-sequence fault and prefault voltage and are positive and are used as the indicator of current inversion [18]. Knowing the inversion situation, the estimated direction can be corrected. For an inductive mode of operation, for a fault in the Fx side, the positions of phasors are the same as shown in Fig. 3(a). For fault in the Fy side during the inductive mode of TCSC, the phasor positions are shown in Fig. 3(c). in this situation is negative and provides a correct direction of fault. 2) Classifier-2: Phase Angle Between Positive-Sequence Superimposed Voltage and Current: The second classifier determines the direction of fault by considering the angle between the superimposed relay voltage and current [17]. The superimposed components are obtained as (5) (6) , where and are the fault and and prefault voltages at the relay point, respectively, and and are the fault and prefault currents at the relay point, respectively. The decision rule with such a classifier will be: if the angle difference is positive, then the fault is in the upstream (Fx side) and if it is negative, then the fault is in the downstream (Fy side). During capacitive mode of operation, for a fault in the Fx side, the corresponding phasor positions are shown in Fig. 4(a). The superimposed component lags the superimposed component , providing proper fault direction (the angle difference being positive). For a fault in the Fy side, the superimposed component leads the superimposed component , providing proper fault direction (the angle difference being negative) as shown in Fig. 4(b). For faults in the Fx and Fy sides during inductive mode of operation, the phasor diagrams are the same as for the capacitive mode of operation. The superimposed component approach has limitations during the load change in the system. 3) Classifier-3: Phase Angle Between the Positive-Sequence Component of Fault Current and Prefault Current: The third classifier obtains the direction of fault by using the angle between the fault current and prefault current [18]. For a fault in

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Fig. 3. Phasor diagrams for classifier-1. (a) For a fault in the Fx side. (b) For a fault in the Fy side for capacitive mode of operation (voltage inversion). (c) For a fault in the Fy side for inductive mode of operation.

Fig. 5. Phasor diagrams for classifier-3. (a) For the fault in the Fx side. (b) For the fault in the Fy side for capacitive mode of operation. (c) For the fault in the Fy side for inductive mode of operation.

relay fault current leads , which contradicts the without inversion condition. This will result in an incorrect decision by the classifier. During current inversion, the fault voltage at the relay location is more than the prefault voltage as shown in Fig. 5(b). At this situation, if and are positive, then current inversion is assumed. With the classifier being current based, for voltage inversion, this classifier will not be affected. For inductive mode of operation, for a fault in the Fx side, the phasor diagram is the same as shown in Fig. 5(a). For the Fy side fault, the corresponding phasor diagram is shown in Fig. 5(c). In this case, the classifier correctly identifies the fault direction. B. Voting Method Fig. 4. Phasor diagrams for classifier-2 for the capacitive and inductive mode of operation. (a) In the Fx side. (b) In the Fy side.

the Fx side, the corresponding phasor diagram is provided in Fig. 5(a). The angle between and is positive and the decision for fault direction would be correct. For the fault in the Fy side during current inversion as shown in Fig. 5(b), the

In case of a line with TCSC, the variation in line reactance changes the power flow in the line. Due to the variation in reactance, the fault path may become capacitive or inductive. It is observed that the voltage and current inversions may occur at certain situations. From the study, it is found that a single classifier does not perform correctly for all of the fault situations. Further, all three classifiers do not fail for a particular case simultaneously. A voting method is proposed to combine all three

JENA AND PRADHAN: DIRECTIONAL RELAYING IN THE PRESENCE OF TCSC

decisions of the classifiers to derive the final fault direction. In the voting method, the final decision is based on the maximum votes marked against a particular decision [19], [20]. The majority voting technique is easy to implement and is applied to the decision process that produces a unique class label as output and requires no training. In a voting technique, suppose are the outputs of each classifier with C elements, where C is the number of output decisions. The output of each classifier can be “1” or “ 1” for a two-class problem like directional relaying and in that case. At time , the decision rule selects the output as the class that carries the majority vote (7) (8) In (7), X is derived from , which is a vector of the same length as the number of classifiers (N). In (8), the matrix D can be formulated from the data of having different C classes. If the decision of the classifier belongs to a class, it is assigned “1” or else “0” in the D matrix. y(j) is a vector of length C and each element indicates the total number of votes for a particular class. The least square technique using one-cycle data is used to estimate the phasors. The three classifiers estimate the fault direction and the majority voting technique provides the direction of fault at a situation. V. RESULTS OF THE PROPOSED TECHNIQUE A 400-kV, 50-Hz three-phase system as shown in Fig. 1 is considered for simulation. In the system, line-1 and line-2 segments are 25 km and 100 km, respectively, for the voltage inversion case. The detail system data are provided in the Appendix. Line-2 is compensated and the TCSC is placed at the relay end as shown in the figure. During all of the faults simulated, the TCSC control action is activated and, therefore, the voltage/current signal patterns may be different than that of a line without TCSC. The performance of the directional relaying using voltage/current information at bus M is evaluated. During faults in a line with TCSC, the voltage and current waveforms are modulated significantly. Subsysnchronous resonance phenomena also introduce amplitude modulation of voltage and current signals [21]. A least square technique is formulated to estimate the fundamental component accurately at that situation. At each phasor computation, a window of 1-cycle data samples was considered. In the results, the performance plot is provided to access the technique. The data sampling rate was maintained at 1 kHz. Positive-sequence components were estimated with phase-a as a reference. The cycle-to-cycle comparison approach was applied for fault detection purposes. The convention used in this work is such that the output of the algorithm should be “1” if the fault is in the upstream (Fx side) and “ 1” if the fault is in the downstream (Fy side) of the relay. Individual classifier decisions , , and are assigned “1” or “ 1,” depending on their positive or negative angle and voltage/

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current inversion index. Therefore, the size of the D matrix is (3 2). For example, for a case if becomes [1, 1, 1], then

and Thus, corresponds to class “1” in this case. 1) Three-Phase Fault: Three-phase faults are created in Fx and Fy sides with respect to the relay bus M. The three angles by the three classifiers are calculated. Table I provides the result for the three-phase fault at one cycle after inception. For a fault in the Fx side, the angles for classifier-1, classifier-2, and classifier-3 are 1.72, 1.26, and 1.34 rad, respectively. For this case, all of the classifiers estimate a correct direction of fault since the angles are positive (output 1 for each classifier). Applying the voting method, the overall decision (D) on the direction is obtained as “1,” a case of upstream fault and is correct. Next, the three-phase fault is created in the Fy side at 25 km from the relay location and it is found that this is a case of voltage inversion (as in details of classifier-1). The angle for classifier-1 is 0.71 rad, which will lead to a wrong estimation of direction. In this situation, the angle between the fault and prefault voltage is high ( 1.28 rad) and, therefore, classifier-1 output is modified. Classifier-2 has its angle 1.90 rad and 0.75 rad for classifier-3. Corresponding classifier decisions d1, d2, and d3 are 1, 1, and 1, respectively. Using the voting method, the overall decision (D) becomes 1; a case of a downstream fault. The performance of the technique with time for three-phase faults in Fx and Fy sides is shown in Fig. 6(a) and (b), respectively. In Fig. 6(a), up to 0.12 s, all three angles are positive (the output of all classifiers is “1”) and the decision by voting method is “1” case of the upstream fault. But after 0.12 s, becomes negative and the other two angles are maintained positive. changes from a positive to negative value due to the change in power in the line (corresponding reactance change of the TCSC). Still, at this situation with the proposed voting technique, the output is “1” which is correct and consistent. Thus, it is observed that even though classifier-2 fails for the case, the integration technique provides correct direction. For the fault in the Fy side, the performance of the algorithm with time is shown in Fig. 6(b). It is found that all of the classifiers estimate negative angles throughout and the decision of 1 is correct and consistent. 2) Line-to-Ground Fault: Line-to-ground faults of the ag-type are created in Fx and Fy sides with a fault resistance of 1 . The results are provided in Table II. For a fault in the Fx side (25 km away from the relay), all of the angles for the three classifiers are positive (1.14, 0.87 and 0.95 rad) and provide a correct direction of fault by applying the voting technique of integration. For an ag-fault in the Fy side, the angles are 0.07, 2.03, and 0.39 rad. The proposed technique correctly provides the direction of fault as 1; a case of downstream fault. It is to be noted that even if the angle is very small and not reliable, the overall decision will not be affected. Corresponding performances of the proposed technique with time are shown in Fig. 7(a) and (b). The plots show that although the individual classifier observes variation in its

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TABLE I RESULTS FOR THE THREE-PHASE FAULT, VOLTAGE INVERSION CASE

RESULTS

TABLE II AG-TYPE FAULT

FOR THE

Fig. 6. Performance during the three-phase fault. (a) In the Fx side. (b) In the Fy side. Fig. 7. Performance during the ag-fault. (a) In the Fx side. (b) In the Fy side.

angles, the output of the integrated approach remains correct and consistent. 3) High Fault Resistance: To test the technique, a line-toground fault of ag type is simulated in Fx and Fy sides at 0.04 s with a fault resistance of 50 . Corresponding results are provided in Table III. For a high resistance fault in the Fx side, all three classifiers derive correct direction of the fault since the three angles are positive (0.41, 0.96, and 0.17 rad, respectively). The angles are smaller than the earlier case of the ag-fault (with low fault resistance). The overall decision (D) derived from the classifier is “1;” a case of upstream fault which is correct.

Next, an ag-fault is created in the Fy side with 50- fault resistance. Classifier-1 has the angle of 0.11 rad and will lead to an incorrect decision. Classifier-2 and 3 have their corresponding angles of 1.92 and 0.15 rad, respectively. With the help of the integration technique, the output is “ 1,” which is a case of downstream fault. The performance plots with time are provided in Fig. 8(a) and (b) for the Fx and Fy side faults, respectively. It is observed that due to the control action of TCSC in the initial portion of , following fault inception, the angle is positive. The output for the Fx side is “1,” indicating correct direction

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TABLE III RESULTS FOR THE AG-TYPE FAULT WITH A FAULT RESISTANCE OF 50

RESULTS

TABLE IV CLOSE-IN FAULT

FOR THE

Fig. 9. Performance for the close-in fault. (a) In the Fx side. (b) In the Fy side. Fig. 8. Result for the ag-fault with 50In the Fy side.

fault resistance. (a) In the Fx side. (b)

after 3 ms of fault inception. The plot for the fault in the Fy side is shown in Fig. 8(b) where the output is “ 1” which is correct and consistent. 4) Close-in Fault: To test the algorithm for the close-in fault, three-phase faults are created in the Fx and Fy sides close to the relay bus M, and corresponding results are provided in Table IV. For a fault in the Fx side, all three angles are positive (2.20, 1.10 , and 1.53 rad). The overall output (D) for the case is “1” and is correct.

Another fault is created in the Fy side close to the relay. For this, angle-1 is positive (0.90 rad) which should be of negative value for proper estimation of direction. The angles for the other two classifiers are 1.66 rad and 1.43 rad. Thus, the voting method derives the correct estimation “ 1,” which is a case of downstream fault. Corresponding performances of the algorithms for the two cases are shown in Fig. 9(a) and (b). In both cases, the angle for classifier-1 oscillates due to CCVT transients but the other two angles are correct and consistent. The overall decisions for the two cases are correct and consistent as obtained through the algorithm.

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RESULTS

FOR A

TABLE V CHANGE IN SOURCE CAPACITY

Fig. 10. Variation in power through line-2 during the three-phase fault in the 0.04 s at 60 km. Fy side at

Fig. 11. Performance during the three-phase fault in the Fy side at at 60 km.

0.04 s

5) Test With a Change in TCSC Control Action During the Fault: To see control action of the TCSC during the fault corresponding response of the algorithm, a three-phase fault is created at 60 km in line-2 from the relay location at time. The variation in power through line-2 is shown in Fig. 10. Corresponding performance of the algorithm is shown in Fig. 11. At this position due to the change in reactance of the line, the angle of classifier-1 varies differently in comparison to two other classifiers. Classifier-2 and 3 will provide a correct decision even during such variation in power flow. During this situation, the output is “ 1;” a case of downstream fault which is correct. 6) Change in Source Capacity: Depending on the power system generation capacity, the control action of TCSC and fault current may change. To test such a situation, the equivalent impedance of the L-side source is increased by 35% for the system. In this situation, three-phase faults are created in the Fx and Fy sides of the relay bus M. The results are provided in Table V. For a fault in the Fx side, all three angles are positive and the output of the corresponding algorithm is “1,” confirming the downstream fault. For the fault in the Fy side, due to voltage inversion, angle-1 is positive (0.68 rad). At the same time, two

Fig. 12. Performance with a change in source capacity. (a) Fault in the Fx side. (b) Fault in the Fy side.

other angles are negative ( 1.88 and 0.81 rad) and provide correct direction of the fault since the output is “ 1” which is a case of the downstream fault. Corresponding performance plots with time are shown in Fig. 12(a) and (b). From Fig. 12(a), it is seen that at this situation, all three angles are positive initially. After 0.13 s of fault inception, angle-2 is negative, but the other two angles are still positive. The overall output is “1;” a case of upstream fault. The performance plot for the fault in the Fy side is shown in Fig. 12(b). In this situation, all three angles are negative. The output is “ 1,” which is a case of upstream fault. A. Results for Current Inversion To generate the current inversion situation, the system with data provided in the Appendix is considered. Three-phase faults are created in the Fx and Fy sides. Corresponding results are provided in Table VI. For a fault in Fx side, all three angles are positive and the corresponding output (D) of the algorithm is “1,” a case of upstream fault. For a fault in the Fy side, , , and are positive and are 3.32 V, 0.63 rad, and 0.28 rad, respectively. This is clearly a current inversion case and the direction for classifier-1 and 3 is adjusted accordingly. Applying

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RESULTS

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TABLE VI CURRENT INVERSION

FOR

F/km Zero-sequence capacitance (For voltage inversion): Line1—25 km, line2—100 km; (For current inversion): Line1—10 km, line2—100 km. The parameters of each source are: Positive-sequence impedance ; Zero-sequence impedance . TCSC and controller data: Main capacitor , inductance 9 mH; Proportional gain 0.2, Integral time constant 5 s; Phase-locked loop (PLL) data: PLL proportional gain 30; PLL integral gain 300. REFERENCES

Fig. 13. Performance during the three-phase fault, current inversion case. (a) In the Fx side. (b) In the Fy side.

the voting method, the overall decision (D) by the algorithm is “ 1:” a fault in the downstream which is correct. The performance plots of the technique are shown in Fig. 13(a) and (b) for a fault in the Fx and Fy sides. The two figures show the consistency of the proposed technique. VI. CONCLUSION In this paper, the issue of directional relaying in the presence of TCSC is addressed. Three positive-sequence-based classifier outputs are combined with the voting method to obtain the direction of fault. The method is tested for voltage and current inversion situations, variation in source capacity, fault resistance, balanced/unbalanced fault, and close-in fault. The performance of the algorithm is also found to be correct with the variation of control action of TCSC. APPENDIX System data. The parameters of each line are: Positive-sequence impedance Positive-sequence capacitance Zero-sequence impedance

km; F/km; km;

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[16] Y. L. Ren, Z. Q. Bo, J. H. He, and A. Klimke, POWERCON, “An integrated relay for differential protection of transmission lines,” in Proc. IEEE Power Syst. Technol. Power India Conf., 2008, pp. 1–5. [17] P. G. McLaren, G. W. Swift, Z. Zhang, E. Dirks, R. P. Jayasinghe, and I. Fernando, “A new directional element for numerical distance relays,” IEEE Trans. Power Del., vol. 10, no. 2, pp. 666–675, Apr. 1995. [18] P. Jena and A. K. Pradhan, “A positive-sequence directional relaying algorithm for series-compensated line,” IEEE Trans. Power Del., vol. 25, no. 4, pp. 2288–2298, Oct. 2010. [19] D. L. Hall and J. Llinas, Hand Book of Multisensor Data Fusion. Boca Raton, FL: CRC, 2001. [20] A. R. Webb, Statistical Pattern Recognition. Hoboken, NJ, USA: Willey, 2002. [21] D. Novosel, A. G. Phadke, M. M. Saha, and S. Lindahl, “Problems and solutions for microprocessor protection of series compensated lines,” in Proc. Conf. Develop. Power Syst. Protect., 1997, pp. 18–23. Premalata Jena received the M.Tech. and Ph.D. degrees in electrical engineering from the Indian Institute of Technology, Kharagpur, India, in 2006 and 2011, respectively. Currently, she is an Assistant Professor in the Department of Electrical Engineering, Indian Institute of Technology Roorkee, Roorkee, India. Her research area is power system protection.

Ashok Kumar Pradhan (M’94–SM’10) received the Ph.D. degree in electrical engineering from Sambalpur University, Sambalpur, India, in 2001. He has been with the Department of Electrical Engineering, Indian Institute of Technology, Kharagpur, India, since 2002, where he is a Professor. He served in the Department of Electrical Engineering, University College of Engineering Burla, Burla, India, from 1992 to 2002. Dr. Pradhan is a Fellow of the Indian National Academy of Engineering. His research interest includes power system relaying and monitoring.