Electro-Thermal Modeling of SiC Power Devices for Circuit Simulation Shan Yin, Tao Wang, K. J. Tseng, Jiyun Zhao, Xiaolei Hu School of Electrical and Electronic Engineering Nanyang Technological University Singapore Email:
[email protected] semiconductor devices are temperature-sensitive, the conventional models are no longer suitable for power electronics simulation, especially when temperature is critical.
Abstract—The behavior-based electro-thermal models for commercial SiC Schottky diode and SiC MOSFET have been developed for circuit simulator PSpice over a wide range of temperature. The Foster RC network is used for thermal modeling and coupled with the electrical modeling by the interaction between power loss and junction temperature. Based on the measurement and parameters extracted from datasheet, both static and dynamic models are formulated by curve fitting. Some simplifications are introduced during modeling to improve convergence and simulation speed. An all-SiC boost converter is also analyzed by simulation to evaluate the models.
To account for the self-heating effect in power semiconductor devices, electro-thermal modeling has been developed for Si IGBT and implemented in some circuit simulators [1]. This model predicted the dynamic temperaturedependent electrical characteristics and the temperature distribution of thermal network. Even though the electrothermal modeling is not a new concept, very limited electrothermal models for SiC power devices are available. In [2-3], the physical-based models for SiC PiN diode, Schottky diode, MPS diode and MOSFET have been developed with temperature-dependent characteristics. However, the calculation time was too long for circuit and system level simulations. By contrast, the behavior-based model for SiC Schottky diode was developed in [4], in which the temperature-dependent parameters were characterized by curve fitting. In [5], a system level model of SiC Schottky diode was presented based on basic semiconductor theories. The authors in [6-8] developed the behavior-based models for 10 kV SiC JBS diode, 10 kV SiC MOSFET and 1200 V SiC MOSFET, respectively. The models in [2-8] only considered the temperature-dependent electrical characteristics, instead of coupled electro-thermal simulation. Infineon has expanded their electro-thermal models (indicated as level 3) for Si power devices [9] to SiC Schottky diode, and made them available on the website. However, convergence and accuracy issues have not been fully addressed.
Keywords—behavior modeling; electro-thermal; MOSFET; PSpice; Schottky diode; SiC
I.
INTRODUCTION
The increasing demands for high temperature applications have pushed the Si-based power electronics to approach the theoretical limits of Si material (200 ˚C maximum junction temperature). SiC is now regarded as the next generation wide band gap power semiconductor material for high temperature (600 ˚C theoretically), high power and high frequency applications. With recent advancement in SiC wafer processing technology, several kinds of SiC power devices, including Schottky diode, BJT, JFET and MOSFET, are already commercially available. To fully utilize the advantages of SiC power devices, realistic models are essential for circuit designers. Besides, as the cost of SiC devices is much higher than that of Si counterpart, realistic models help to lower costs of circuit design and analysis. As the most widely accepted circuit simulator, PSpice provides various models including diode, BJT, JFET, MOSFET, IGBT and ICs. To date, reliable models of SiC power devices for circuit simulation are still lacking. The very limited models from the suppliers in support of their products are limited in certain details or difficult to converge.
The analytical behavior modeling (ABM) of simulators such as PSpice allows creation of new device models which are not available in the standard libraries or are not provided by device suppliers. The detailed physical parameters are not required for modeling, and hence making it straightforward for electrical engineers. In addition, it provides the ability for system level modeling. Based on ABM, the electro-thermal models for the commercial Cree 600 V SiC Schottky diode (C3D06060) and 1200 V SiC MOSFET (CMF10120) are developed in present work, which provides precise predictions of temperature-dependent electrical characteristics, junction temperature and power loss with fast simulation speed and fast convergence. To further validate the models, an all-SiC DC/DC boost converter is investigated over a wide range of temperature.
Most of the conventional models well-established for Si discrete devices or ICs account for the effect of temperature by setting the general ambient temperature in simulators, which is kept constant during simulation process. For low power circuits, this assumption may be reasonable. However, for high power circuits, the junction temperature may vary over a wide range and also vary for different components due to the self-heating effect. As the physical properties of power
978-1-4799-0224-8/13/$31.00 ©2013 IEEE
718
2.0
TJ
Thermal impedance, ZTH (K/W)
MOSFET Solder Baseplate TCASE
Fig. 1. Simplified packaging structure with multiple thermally resistive layers. RThi
TJ +
TCASE
1.0
0.5
1E-4
1E-3
0.01
0.1
1
Time (s)
Fig. 3. Transient thermal impedance.
Cauer
Ambient
the junction temperature instead of the temperature distribution. A “black box” is assumed between the input (junction) and output (case). As the transient thermal impedance is directly available in the datasheet, it is easy and fast to get the values of the RC network by curve fitting. For thermal modeling with the heat sink, the transient thermal impedance from the junction to ambient should be measured again and the RC values should also be recalculated.
RThi TJ
TCASE
+ CThi
PLOSS
Foster
Ambient
Fig. 2. RC thermal network.
II.
n t ZTH Ri 1 exp i 1 Ri Ci
THERMAL MODEL
Fig. 1 shows a simple packaging structure with a MOSFET directly soldered to the baseplate. Each packaging layer can be modeled by a thermal resistor and a thermal capacitor. Unfortunately, as most simulators do not permit thermal components, they are modeled by the equivalent electrical components, as given in Table 1[9]. Cauer and Foster RC network are two of the most widely used equivalent thermal circuits, as shown in Fig. 2. The Cauer RC network is closely related to the real physical structure and can be used to describe the temperature distribution inside the packaging. However, the temperature distribution is not of concern most of the time. Besides, the packaging details are normally unknown and the spreading effect (different areas between adjacent layers) makes calculation of thermal resistance difficult. In power electronics packaging design, where the detailed temperature distribution is necessary for analysis of heat transfer and thermal stress, finite element method (FEM) tool should be used instead of RC network. TABLE I.
1.5
0.0 1E-5
CThi
PLOSS
Diode PSpice Diode datasheet MOSFET PSpice MOSFET datasheet
Unit K W K/W J/K
Thermal Parameter Voltage Current Resistance Capacitance
(1)
The power loss (PLOSS) is modeled by a voltage-controlled current source (VCCS) and then fed into the thermal circuit. The junction temperature is given by TJ TC PLOSS ZTH
(2)
where TC is the case temperature. The temperature reference node, TJ is fed back into the electrical circuit until convergence. The transient thermal response is obtained by substituting RC values into the simulator, then stimulated by a current pulse, as shown in Fig. 3. III.
SIC SCHOTTKY DIODE MODEL
From Fig. 4, SiC Schottky diode consists of a metalsemiconductor contact for rectifying current, an N-type lightly-doped drift region for blocking reverse voltage, an Ntype heavily-doped substrate for mechanical support, and two metal electrical contacts. The physical-based modeling was used for the forward characteristics of SiC Schottky diode in the early works, in which the I-V characteristics of Schottky contact are given by the thermionic emission theory
CORRESPONDING PARAMETERS BETWEEN ELECTRICAL AND THERMAL CIRCUITS.
Electrical Parameter Temperature Power Thermal resistance Thermal capacitance
Unit V A Ω F
qV I F I S exp D 1 , when VD BV kT
In thermal modeling, the Foster RC network is preferred even though it is purely a mathematical formula, as Eq. (1) illustrates. The order of RC components corresponds to the accuracy of mathematical approximation, rather than the number of packaging layers. In present work, 4 th order Foster RC network is used. The Foster RC network can only predict
(3)
where IS is the leakage current of Schottky contact, q is the electric charge, VD is the voltage drop across the Schottky contact, k is Boltzmann constant, T is the temperature, and BV is the breakdown voltage. However, the physical-based forward characteristics lead to serious convergence problem
719
Anode
N- drift
N+ substrate
12
Cathode
Datasheet PSpice
Forward current, IF (A)
-
+
10
LA
D
-
+
Anode
-
+
CJ RS
Cathode LC
Fig. 4. SiC Schottky diode.
I F 0, when BV 1000 times higher than the doping concentration of drift region (ND). So the junction potential of Schottky contact (VJ) is around 0.1~ 0.2 V lower than the Schottky barrier height (ϕB). Fig. 6 shows a good match of CJ between PSpice model and datasheet. IV.
SIC MOSFET MODEL
Similar to SiC Schottky diode, there is also an N-type lightly-doped drift region for blocking reverse voltage in SiC
As Schottky diode is majority carrier device, there should be no reverse recovery current during switching and the transit
720
expression is similar to that of RS. The channel resistance (RCH) can be obtained by differentiation of VDS with respect to IDS. RCH shows negative temperature coefficient, which is due to interaction of numerous transport mechanisms. The dominant mechanism is decrease of interface traps with increasing temperature [10]. Hence more electrons are available for current conduction in the channel and threshold voltage decreases with increasing temperature. As µn decreases with increasing temperature, KP shows negative temperature coefficient.
Drain LD Source
CGD
+ -
N+
Gate oxide
P well Gate
M LG
N- drift
RG
+ R - D + D -
CDS
CGS
N+ substrate
LS
Drain
Source
MOSFET, as Fig. 7 shows. When VGS is smaller than the threshold voltage (VT), the MOSFET is assumed to be totally turn-off. The sub-threshold current is also neglected. The avalanche breakdown is modeled by the body diode. When VGS is smaller than VT, an inversion layer is formed in the channel region and the MOSFET turns on. During turn-on, the MOSFET operates in linear (or triode) region when VDS < VDS,sat and in saturation region when VDS ≥ VDS,sat. The I-V characteristics of MOSFET are given by (10)
VDS , sat VGS VT
(13)
Drain current, IDS (A)
(12)
where λ is the channel modulation index, µn is the electron mobility in the channel, COX is the capacitance of gate oxide, W and L are the channel width and length respectively. For SiC MOSFET, the transition from linear region to saturation region is not as significant as that of Si MOSFET or IGBT. It is the result of low µn and therefore SiC MOSFET behaves similar to a voltage controlled resistance.
VGS = 20 V
20 10 VGS = 10 V 0
2
4
6
8
10
12
10
12
Drain-source voltage, VDS (V) 50 TJ = 135 Datasheet PSpice
40
Drain current, IDS (A)
1 2 K PVDS , sat
TJ = 25 Datasheet PSpice
30
0
The on-resistance of MOSFET (RDS,on) is sum of resistances of contact, N+ source, channel, accumulation layer, JFET region, N- drift, and N+ substrate. It is difficult to evaluate the contribution of each component without a physical-based model, which is unsuitable for circuit simulation. Hence the expression of RDS,on is simplified by RDS ,on RD RCH RD
(16)
50 40
1 W n COX 2 L
VT VT 0 1 TC1 T T0
The dynamic characteristics of SiC MOSFET are more complicated than that of SiC Schottky diode. Although as the majority carrier device, there are no holes stored in the drift region of MOSFET. The parasitic capacitances still need to be charged and discharged during switching transitions. Three capacitances are normally used to model the dynamic characteristics of SiC MOSFET, including input (Ciss), output (Coss) and reverse transfer (Crss) capacitances, as Eq. (17)
I DS K PVDS2 ,sat 1 VDS VDS , sat , when VDS VDS , sat (11)
KP
(15)
Hence, the on-state characteristics can be modeled by a temperature-dependent VCCS and a temperature-dependent resistance, which is actually also a VCCS. From Fig. 8, the output characteristics of SiC MOSFET at 25 ˚C and 135 ˚C show good match between PSpice model and datasheet.
Fig. 7. SiC MOSFET.
2 I DS K P 2VDS , satVDS VDS , when VDS VDS ,sat
K P K P 0 1 TC1 T T0
(14)
30
VGS = 20 V
20 10 VGS = 10 V 0
where RD is sum of resistance components except that of channel. RD shows positive temperature coefficient and the
0
2
4
6
8
Drain-source voltage, VDS (V)
Fig. 8. Output characteristics of SiC MOSFET.
721
12
4
10
Datasheet PSpice
Capacitance (pF)
2
Coss
1
Crss
10
10
Forward current, IF (A)
3
10
0
10
0
200
400
600
Experiment PSpice C3D06060
10
Ciss
8 6 4 2 0
800
0
1
2
3
4
Forward voltage, VF (V)
Drain-source voltage, VDS (V)
Fig. 9. Capacitances of SiC MOSFET.
Fig. 10. Forward characteristics of body diode at 25 ˚C.
illustrates. The gate-source capacitance of MOSFET (CGS) is due to overlap of polysilicon gate over channel region and is almost independent of drain-source bias. The drain-source capacitance (CDS) is depletion capacitance between P well and N- drift and can be modeled by the junction capacitance of body diode. The gate-drain capacitance (CGD, also named as Miller capacitance) provides feedback loop between input and output, which consists of gate oxide capacitance (COX) and drain depletion capacitance beneath gate oxide (CGDJ). The expressions of parasitic capacitances are given by Eq.(18) ~(22). The comparison of MOSFET capacitances between PSpice model and datasheet is shown by Fig. 9.
voltage drop of body diode is much larger than that of SiC Schottky diode C3D06060. That is the reason why additional freewheeling diode is necessary and the intrinsic body diode should always be eliminated from the circuit in most of the time.
Ciss CGS CDS , Coss CGD CDS , Crss CGD
(17)
CGS CGS 0
(18)
CGD COX , when VDS VGS
CGD
COX CGDJ , when VDS VGS COX CGDJ
CGDJ
qN D
2 VDS VGS
AGD
(19) (20) (21)
I L
VIN D Lf
(23)
(22)
The parasitic body diode is a PN diode, anti-parallel with the MOSFET and functions as the freewheeling diode. However, this function is of no interest in real situations, as the forward voltage drop is too large to be used as freewheeling diode. Instead of the electro-thermal model of SiC Schottky diode, the default diode model in PSpice is directly used for the body diode. As mentioned above, the BV and CDS of MOSFET are modeled by the parameters of body diode. The transit time of body diode can be estimated from the datasheet with the expression τT = Qrr/IF, where Qrr is the reverse recovery charge. As Fig. 10 shows, a good match of forward characteristics of the body diode between the PSpice model and measurement is observed. Besides, the forward
U2 C3D06060
TC
A
C
POW TJ TC
1 VSD / VJ
As Fig. 11 shows, due to the current rating of SiC Schottky diode C3D06060, two diodes are used in parallel connection. The gate drive circuit for SiC MOSFET is simplified by a voltage pulse source. The parasitic parameters of the passive components are neglected, as they are not the major concern in this work. A 500 uH inductor is selected to limit the current ripple across the inductor below 2 A and also ensure continuous conduction mode (CCM) operation. A 470 uF capacitor is used to limit the output voltage ripple at 0.035 V.
TCASE 25
TC L1
U3 C3D06060
0
A
500u
VIN 200
U1 CMF10120
RG 4.7 V1 = 0 V2 = 20 TD = 0 TR = 5n TF = 5n PW = 5u PER = 10u
G V4
POW TJ TC
C
POW TJ TC
CDS 0
Based on the electro-thermal models developed for Cree SiC MOSFET CMF10120 and Schottky diode C3D06060, an open-loop, all-SiC boost converter with an output power up to 2.6 kW is investigated, which can be easily scalable to the power rating of 50 kW (typical for hybrid electric vehicle). The operating parameters are given as below: input voltage 200 V, duty circuit 0.5, load resistance 60 Ω, switching frequency 100 kHz, and case temperature 25 ~ 105 ˚C.
D
2 VDS VJ
ADS
ALL-SIC BOOST CONVERTER
S
qN D
CDS
V.
TC TC
0
Fig. 11. All-SiC boost converter.
722
470u COUT
RLOAD 60
VC
VOUT VIN RLOAD COUT f
for thermal modeling with the Foster RC network, which only predicts the junction temperature instead of the internal temperature distribution. The models are implemented by ABM and show good match with the measurement and parameters extracted from datasheet. With simplification in modeling, the convergence as well as simulation speed are improved. Finally, an all-SiC boost converter is investigated to evaluate the models. The converter efficiency remains above 98 % even at high temperature.
(24)
Fig. 12 shows the current waveforms of the inductor, MOSFET and diode when the case temperature is 25 ˚C. By putting the voltage probe on pin TJ, the junction temperatures can be obtained: 44.3 ˚C for MOSFET and 36.2 ˚C for diode respectively. In real situations, the junction temperature is difficult to measure without placing the temperature sensors inside the package. The electro-thermal models provide a fast and easy way to estimate junction temperature. The power loss can either be calculated from the junction temperature, or by integrating the curve of real-time power loss (from voltage probe on pin POW). The switching loss of MOSFET (13.7 W) is comparable with conduction loss (15.5 W), while the switching loss of diode (0.67 W) is much smaller than conduction loss (5.24 W).
REFERENCES [1]
From Fig. 13, the converter efficiency shows an insignificant degradation tendency with temperature increasing, due to the superior high temperature performance of SiC. In real situations, the efficiency should be lower than this value, due to neglect of parasitic parameters of capacitor and inductor, which degrades significantly at high temperature. VI.
CONCLUSION
Current (A)
15 10
Current (A)
15 10
Current (A)
The electro-thermal models of Cree SiC Schottky diode (C3D06060) and MOSFET (CMF10120) have been developed for circuit simulator PSpice. Due to the limitation of thermal components in PSpice, equivalent electrical circuits are used
15 10
Inductor
5 0
MOSFET
5 0
Diode
5 0 10.00000
10.00002
10.00004
10.00006
10.00008
10.00010
Time (s)
Fig. 12. Current waveforms of inductor, MOSFET and diode. 98.6 50 98.5 40
Efficiency (%)
98.4
30
98.3
20
98.2
98.1 20
10
Diode
40
60
80
Power loss (W)
MOSFET
100
0
Case temperature (C)
Fig. 13. Efficiency and power loss vs. case temperature.
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