Fast Feedback Control for Plasma Positioning With a ... - IEEE Xplore

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IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 53, NO. 3, JUNE 2006

Fast Feedback Control for Plasma Positioning With a PCI Hybrid DSP/FPGA Board D. F. Valcárcel, I. S. Carvalho, B. B. Carvalho, H. Fernandes, J. Sousa, and C. A. F. Varandas

Abstract—The need to control in real-time the plasma parameters in fusion devices leads to the development of algorithms requiring intensive computation and providing results on a few hundred microseconds. The present work’s objective was the implementation of the current filaments method (CF) to model in real-time the ISTTOK plasma shape and position. The hardware used was the on site developed PCI-TR-256 hardware configurable module, which includes the latest technology in DSP and FPGA. The algorithm estimates the position of the plasma column and generates the control signals for the vertical magnetic field actuators. The main advantage of this system is to provide a digital approach to feedback plasma position control with similar cycle times to those of analog systems but allowing flexible, user defined, algorithms. Index Terms—Plasma position, real-time control, tokamak.

I. INTRODUCTION

T

O ACHIEVE self-sustained nuclear fusion reactions, keV), high density a high temperature ( ) Deuterium-Tritium plasma must be stably ( confined with a confinement time 1 second [1]. Nowadays these plasmas are magnetically-confined in toroidal configurations such as tokamak, stellarator and reverse field pinch, with a superiority of the tokamaks that are the most successful approach to controlled thermonuclear fusion reactors. The tokamak ISTTOK [2] is a small device with large aspect cm, a major radius m, ratio, minor radius T. The iron core transand toroidal magnetic field former produces 0.25 V.s of inductive flux, which allows plasma discharges of up to 45 ms, with plasma currents up to 10 kA. In the present setup with toroidal magnetic field of 0.5 T, electron temperatures of 100 eV have been measured, using a Thomson scattering diagnostic, and the energy confinement time is estimated to be around 0.5 ms. The vacuum vessel is surrounded by a 1.5 cm-thick copper shell with a characteristic “Skin Time” 2.5 ms that acts as a plasma passive stabilizer. Real-time control of plasma parameters plays an important role in advanced mode operation of magnetic fusion devices, being a critical issue to achieve high confinement and to detect and prevent major disruptions. In particular, the stabilization of Manuscript received June 17, 2005; revised April 3, 2006. This work was carried out in the frame of the Contract of Association between the European Atomic Energy Community and Instituto Superior Técnico, and was supported by Fundação para a Ciência e Tecnologia (FCT). The content of the publication is the sole responsibility of the authors and it does not necessarily represent the views of the Commission of the European Union or FCT or their services. The authors are with Associação Euratom/IST, Centro de Fusão Nuclear, P-1049–001 Lisboa, Portugal (e-mail: [email protected]). Digital Object Identifier 10.1109/TNS.2006.875128

the position of the tokamak plasma column requires feedback control of the intensities of both the vertical and horizontal magnetic fields. This control has been made in small and medium sized tokamaks with classic analog loops and/or pairs of magnetic probes (up/down, outside/inside). This is the case with ADITYA, a tokamak with similar dimensions to ISTTOK. It uses an analog PID controller to control both the plasma current and vertical field [3]. However, recent advances in Digital Signal Processors (DSP), general processors and high-end Field Programmable Logic Devices (FPGA) have allowed the usage of more complex detecting methods for plasma control in sub-millisecond cycletime. This approach is followed in the HYBTOK-II tokamak where digital signal processors are used for active feedback control [4]. The aim of this work is the implementation of an algorithm to control in real-time the position of the plasma column at the ISTTOK tokamak. The use of a PCI hybrid DSP/FPGA board is requested here by the necessity of a very short execution time s) and a better flexibility. For a good plasma con( trol, this cycle time must be smaller than the confinement time which is directly connected to the size of the device. For larger tokamaks the plasma position control is based on conventional computers (VME board, PC, ) working under real-time operating systems. Cycle times of 1–2 ms are thus achievable. The chosen hardware to achieve this goal was the on-site developed switched-mode power supply and the data acquisition board PCI-TR-256. The power supply is still being built, specifically for this purpose, and will be used to control the plasma position by varying the vertical magnetic field intensity. The PCI-TR-256 board was chosen mainly because it was already developed and since 2003 is proving to be a fast, low-cost, data acquisition and signal processing board, enabling us to achieve our goal: the implementation of the Current Filaments (CF) method, adapted to meet the imposed real-time constraints, namely the execution time must not exceed the 200 s limit. Its main advantages are the existence of an FPGA and of a DSP, both state of the art devices that allow the implementation of heavy numerical algorithms for plasma position reconstruction and control. The VME or PCI solutions based on general processors, like PowerPC® or Intel®, usually adopted in fusion have the advantage of using standard C code for signal processing, completely portable to other platforms. However these boards may not have onboard acquisition hardware, in which case there is the need to use a separate data acquisition board. In this case the communication between both is accomplished via the VME crate or the PCI bus, which does not guarantee the real-time behavior that we need. Our approach is based on local processing,

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VALCÁRCEL et al.: FAST FEEDBACK CONTROL FOR PLASMA POSITIONING

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Fig. 1. Block diagram of the system.

a single hybrid DSP/FPGA board with data acquisition channels. The only disadvantage of the PCI-TR-256 board is the difficult portability of the code written for the DSP and the FPGA to other hardware than the one used in this board. II. SYSTEM OVERVIEW Fig. 1 shows the general block diagram of the system used in this work to calculate and measure the plasma position. It is composed of five parts: • Array of 12 poloidal magnetic probes (pick-up coils) already installed at ISTTOK; • Plasma Position Controller developed in a transient recorder Peripheral Component Interconnect (PCI) hybrid board (PCI-TR-256); • Novel Servo Power Supply (SPS) developed on-site; • Sets of coils to control the horizontal position of the plasma; • A PC to visualize the results and to configure the plasma position controller. A. Magnetic Probes The array of 12 poloidal magnetic probes [5] were built on-site and each one consists of 50 loops over a 42 mm area mm, and 6 mm length. The probes are placed at r measured from the vacuum chamber’s center, equally spaced , starting at 8.8 from the equatorial plane and at oriented to measure the magnetic poloidal field. This information allows to determine the plasma current and position using numerical algorithms.

B. Magnetic Field Coils The plasma position is controlled by 2 sets of coils that are used to create the necessary poloidal magnetic field, the Equilibrium Field and Primary (EF) coils and the Control Vertical Field (CVF) coils [5]. These coils have the following characteristics: 1 CVF coils: • 24 loops distributed over 4 separate coils; 0.07 m and • Positioned at 0.07 m; • The current flows oppositely in the inner and outer coils to avoid the coupling with the transformer’s core. 2 EF coils: • 28 loops distributed over 2 separate coils; 0.13 m; • Positioned at • The current flows in the same way in both coils. C. Plasma Position Controller The architecture of the PCI-TR-256 board used to implement the controller is depicted in Fig. 2. It consists of four blocks [6]: • The analog block of the board has 8 galvanic isolated analog inputs capable of acquiring simultaneously on all channels at a rate up to 2 MHz with 14-bit resolution. The digitized signals are converted to a serial format by a Complex Programmable Logic Device (CPLD) instead of being transmitted to the next block (FPGA) in a parallel format. This allows the serial signal to pass through a single galvanic isolator chip. The parallel alternative needs more isolator chips to isolate the analog part completely of the board from the digital part due to the existence of

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Fig. 2. Block diagram of the PCI-TR-256 board.

more tracks on the board. The serial scheme allows to save space in the board and lowers its price. • The FPGA is a Xilinx® Spartan-II and its purposes are to implement de-serialization, synchronism, memory buffers and the DSP interface. • The DSP is a Texas Instruments® TMS320C6415 [7] Fixed-Point Processor running at 500 MHz achieving up to 2000 16-bit Million Multiply and ACcumulates (MMACs) per second or 4000 8-bit MMACs per second. It allows access to the PCI host-bus and to a Dual Inline Memory Module (DIMM) format dedicated Synchronous Dynamic Random Access Memory (SDRAM) of up to 512 MB via the 64-bit External Memory InterFace (EMIF). This interface also allows access to the FPGA memory space. The C64 DSP integrates a PCI controller which allows the communication between the processor and the PCI bus. This was the main reason why this fixed-point processor was used. Other reasons to choose this instead of a floating-point DSP include its advanced peripheral capabilities, such as EDMA memory transfer controller with 64 channels instead of the 16 channels present in the C67 family of processors, and its greater performance in terms of speed of signal processing. • The timing logic block provides the distribution of timing signals inside the module and to other PCI-TR-256 boards to which it can be connected.

To add flexibility to this board, the DSP, FPGA and CPLD can be programmed on-board, quickly and easily, through their Joint Test Action Group (JTAG) interfaces. This property adds flexibility to the plasma position controller in case that in the future we want to change the control algorithm without changing the hardware. As the PCI-TR-256 has only 8 analog channels and there are 12 magnetic coils, a choice was made to use four equally spaced pairs of probes. The plasma position controller’s internal functional structure is depicted in Fig. 3 and it’s a Proportional-Integral (PI) based controller which determines the necessary current to drive the plasma position to the desired setpoint. This current value is communicated through an optical link using a fast, 460 kbit/s, serial asynchronous protocol, implemented using the Multichannel Buffered Serial Port (McBSP) of the DSP, to the SPS that generates this current and feeds it to the CVF coils.

D. Servo Power Supply The SPS block structure is depicted in Fig. 4. The amount of current passing through the coils is controlled by two Pulse Width Modulation (PWM) signals applied to four Insulated Gate Bipolar Transistors (IGBT) in an H-bridge configuration


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Fig. 3. Block diagram of the controller.

Fig. 4. Block diagram of the power supply.

(Siemens, BSM75GAL120DN2), allowing the control and inversion of the current flow driven to the coils. The system is powered by a rechargeable battery (12 V, 100 Ah), which is capable of driving, at least, 700 A peak current through the circuit. The two PWMs necessary for the IGBT module commutation are produced by a 30 Million Instructions Per Second (MIPS) dsPIC30F4013 microcontroller. It also includes 13 multiplexed ADCs with a resolution of 12-bit at 100 kHz. At 30 MIPS the microprocessor is capable of generating two PWM signals (only one is used at a time in an H-bridge) with 9-bit resolution duty-cycle at 58.6 kHz. This enables a current A to 100 A variation intensity resolution of 0.2 A on a (one extra bit is due to PWM pin switch in H-bridge to obtain negative current flow).

The SPS generated current is stabilized by a digital Proportional-Integral-Derivative (PID) feedback control system implemented in the dsPIC® microcontroller. The feedback signal is provided by a current transducer (LEM® LAS 50-TP) and converted to digital format by one of the microprocessor’s internal ADCs. This controller modifies the PWM signal, effectively stabilizing the generated current in about 10 PWM frequency cycles, before a new equilibrium current setpoint is available. E. The Host PC Finally, the PC connects to the controller through the PCI host-bus, allowing the visualization of the results of a discharge and the configuration of the controller, namely of the controller’s parameters.

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III. ALGORITHM OVERVIEW Several methods were tested to estimate the plasma position and it was decided to implement the Current Filaments (CF) method [8] due to its best compromise between speed and accuracy. Using just one filament the plasma is modeled with a circular is a shape, which for large aspect ratio tokamaks good approximation for control purposes. In this condition we , associated with obtain (1) that relates the Green’s functions, normaleach probe with the corresponding magnetic field ized by the plasma current :

(1) The problem with this approach is the possible saturation of the transformer’s iron core. However, the operation of ISTTOK guarantees that it does not saturate and it’s always in the linear region. As such, we can scale the fields as currents. at each probe In this algorithm the poloidal magnetic field is first calculated from the acquired ADC samples. After, the plasma current is computed:

(2) where is a constant related with the spacing of each probe and is the radius of the circular perimeter where the probes probes equally spaced along a perimeter are installed. With of a poloidal section, . The method now involves adjusting, in a least-squares sense, the position of the filament, minimizing the functional:

As the measured samples from the magnetic probes are proportional to flux derivative, these are converted to magnetic field values by numeric integration in the DSP. These samples are also affected by a DC offset which accumulates in the integration process. This effect is present in each channel due to an offset present in each ADC. This offset is calculated by a digital low-pass filter during the idle time between shots and subtracted from the samples during the shot. Then we are able to determine the plasma position with the previously described algorithm. The calculation of the Green’s functions that are necessary for the minimization of (3) is considerably complex and it’s very complicated and time consuming to do it in real-time. So the solution adopted was to calculate offline the values of these functions in a grid of discrete points in space of the vacuum chamber and for each magnetic probe. The resolution of this grid is 1 mm of spacing between points. The result is a collection of matrices, each one associated with one of the probes, that can be uploaded to the PCI-TR-256’s SDRAM memory and the DSP can look-up any value it needs to perform the calculations. Although this approach speeds up the algorithm, it still takes far too long to execute when the whole G matrix is used. So a sub-matrix of the G matrix, centered at the position of the current filament, is used instead. The dimension of this sub-matrix is a compromise between the algorithm’s desired speed and its degree of trust. This sub-matrix was chosen to be an 11 11 square matrix. The calculation of the current necessary to generate a magnetic field that drives the plasma to the desired position is followed. This is accomplished with a PI controller. Presently only the horizontal position of the plasma (R) is controlled. We use (4).

(4)

(3) where each has already been normalized with , are the magnetic fields estimated by the Green’s functions at the the error positions of the magnetic probes as seen in (1), and associated with the measurement of each magnetic field.

where T is the sampling period. After the necessary current is calculated, its value is transmitted to the SPS that generates the necessary current to apply to the CVF coils. V. TESTS AND RESULTS

IV. SOFTWARE IMPLEMENTATION The algorithm was implemented on software using the DSP’s performance enhancement capabilities, such as multithreading and Enhanced Direct Memory Access (EDMA) transfers. As the DSP is fixed-point, the algorithm had to be implemented using fixed-point arithmetic to minimize its execution time. When 256 samples are digitized, the FPGA interrupts the DSP and the EDMA controller begins acquiring the samples to the internal memory. Thus, the program task that calculates the plasma position is called every 128 s to perform auxiliary calculations, such as the numerical integration of the acquired signals. However, the position calculation and control is performed only once every 512 s to achieve approximately 2 kHz of control frequency. The determination of the plasma position is made with the last of the acquired samples in this period.

The tests to the control system couldn’t be executed by actually controlling the plasma at ISTTOK due to the fact that the power supply isn’t produced yet. So, the behavior of the system was tested by simulating discharges, transferring to the board’s SDRAM the data acquired in a previous discharge. These samples are used in the calculations as if they were acquired at the time of the simulation and the timings are also the same. The measurement of the execution time of the control algorithm is accomplished by a timer that is started just before the calculations and stopped at the end. The overhead of starting and stopping the timer is taken into account in this measurement. The timing diagram of the system is depicted in Fig. 5, where we can see a full control cycle. It shows the time between the arrival of the blocks of 256 samples per channel to the DSP and the time required to perform all the calculations. It also shows


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Fig. 5. Timings.

the time it takes to send the control signal via the McBSP port of the DSP to the SPS and the time it takes to stabilize the current. All these tasks (data acquisition, calculations and control signal transmission) are done in parallel. The data acquisition and the control signal transmission use the EDMA controller to leave the DSP available to perform the calculations. Unfortunately, the timing of the numerical integration of the signals couldn’t be separated from the timing of the offset removal due to the way the code was written to maximize performance. So the timing is presented for both these operations together. As it was mentioned before, the plasma position calculation is performed only once every four blocks of samples arrive (2 kHz control frequency), although the numerical integration and offset removal operations are done in all the samples received. The result of the calculation of the plasma position in a simulation using the discharge number 11949 is shown in Fig. 6. A full equilibrium reconstruction on ISTTOK is not possible due to insufficient magnetic probes, namely the absence of flux

and saddle coils. So these results were compared to a simulation using 5 current filaments. The position of one filament calculated by the DSP is compared with the position of the centroid of 5 filaments calculated offline. We can see that the time evolution of the position in both cases is similar, although there are small differences in the case of the R coordinate and bigger differences in the Z coordinate. VI. CONCLUSION AND FUTURE WORK Despite the limitations imposed to implement this algorithm with real-time constraints, the tests have shown that the system is reliable enough to control, in real-time, the horizontal plasma position in the discharges at ISTTOK. The plasma position reconstruction and control is done in 34 s and all the auxiliary calculations in 36 s, which sums to 70 s total calculations. This shows that our goal to implement the algorithm below the 200 s limit was successful.

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Fig. 6. Plasma position relative to the center of the vacuum chamber for the discharge #11949.

In the present application, the FPGA only controls the data acquisition due to the fact that the firmware uses almost its full capacity. All the calculations are currently performed by the DSP. When the system migrates to a board with an FPGA with a higher density of logic gates, it will be possible to transfer some of the calculations to the FPGA, thus liberating the DSP for more complex calculations. Enlarging the dimensions of the G sub-matrix is one of the improvements to be made to the system that is more time consuming (in terms of algorithm execution time). In the future, this system is expected to grow to control not only the R direction of the plasma position, but also the Z direction and the plasma current, with the novel power supplies developed on-site. Also the flexibility of the system to allow the implementation of different algorithms without changing the hardware is a great advantage, reducing time and costs in the development of new technologies to perform real-time control. This solution was planned to a circular plasma with only 8 magnetic measurements, although the software developed shall be extended to more intensive applications. In particular it can also be used in D-shape plasmas like ITER, although it will require the use of 5 filaments with variable current fitting. At

the software level this can be achieved by first computing the appropriate G matrix to the specific application, uploading it to the boards’ memory.

REFERENCES [1] J. Wesson, Tokomaks, 3rd ed. London, U.K.: Oxford Univ. Press, 2004, p. 2. [2] B. Carvalho and H. Fernandes, “Real-time DSP-based Shape determination and plasma position control in the ISTTOK tokamak,” Fusion Eng. Des., vol. 71, pp. 77–82, 2004. [3] V. Balakrishnan, “Plasma current and position feedback control in ADITYA tokamak,” Fusion Eng. Des., pp. 809–813, 2003. [4] M. Toyoda, “Fast feedback control of plasma horizontal position by using DSP and IGBT inverter,” Elect. Eng. Jpn., vol. 148, no. 1, pp. 1–10, 2004. [5] B. B. Carvalho, “Real time control of ISTTOK tokamak,” Ph.D. dissertation, Instituto Superior Técnico, Lisboa, Portugal, 2003. [6] M. Correia, “A low-cost galvanic isolated fast PCI transient recorder with signal processing capabilities,” Fusion Eng. Des., vol. 71, pp. 159–165, 2004. [7] TMS320C6415 Datasheet, Texas Instruments Incorporated Document No. SPRS146F, Feb. 2001, (revised Feb. 2003). [8] B. J. Braams, “The interpretation of tokamak magnetic diagnostics,” Plasma Phys. Control. Fusion, vol. 33, no. 7, pp. 715–748, 1991.