Flash Memory Electromagnetic Compatibility - IEEE Xplore

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IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, VOL. 6, NO. 2, JUNE 2006

Flash Memory Electromagnetic Compatibility Adam D. Fogle, Don Darling, Richard C. Blish, II, Senior Member, IEEE, and Gene Daszko

Abstract—This paper analyzes the radiated electromagnetic compatibility (EMC) behavior of AMD/Spansion Flash memory integrated circuits. Using The Engineering Society For Advanced Mobility Land Sea Air and Space (SAE) J1752/3 method, the peak RF noise (EMC with respect to radiated emissions) was measured for various technologies and product features, determining statistically valid sensitivity factors for several independent variables. The findings show that radiated emissions vary based on technology shrink, memory size, access time, and package. The authors are able to predict a device’s radiated EMI to a precision of ∼ 4 dBµV (one sigma) and with good accuracy by fitting noise performance as a function of a density parameter (a combination of technology critical dimensions and number of bits) and the logarithm of the access time. It was found that devices built on current technologies generate much less noise than their predecessors primarily due to slew rate control to permit simultaneous read/write operations, output buffer driver design improvements, and smaller radiating antennae. Index Terms—Electromagnetic compatibility, electromagnetic interference, integrated circuit noise, MOS memory integrated circuits.

I. B ACKGROUND

T

HIS PAPER discusses measured RF signals radiated from several different technology families of AMD/Spansion Flash memory. Floating-gate and dual-bit-per-cell (MirrorBit) technologies as well as single-chip and multichip packaged parts were measured. It is the intent of this paper to determine radiated emissions by device and technology, and to explore whether the radiated emission levels will increase as operational speeds increase and internal geometries are scaled. As technologies are scaled, additional design rules are taken into consideration to help limit the amount of electromagnetic fields emitted. This paper intends to define those levels and determine whether there is a trend based on operational frequency and/or process technology. Device-radiated emission is becoming an increasing concern in many customer applications; the number of electronic devices within a small area is dramatically increasing along with device operational performance demands. Greater clock rates, faster access times, and decreased geometries enhance the device operational performance, but may contribute to increased electromagnetic radiation. This trend in the electronics industry has led to the need to evaluate individual device electromagnetic radiations. The American National Standard Dictionary for Technologies of Electromagnetic Compatibility (EMC), Electromagnetic Pulse (EMP), and Electrostatic Discharge (ESD) [2] provides Manuscript received August 2, 2005; revised October 12, 2005. The authors are with the Spansion, Inc., and Advanced Micro Devices, Sunnyvale, CA 94088 USA (e-mail: [email protected]). Digital Object Identifier 10.1109/TDMR.2006.876573

the following definition for EMC: the capability of electrical and electronic systems, equipments, and devices to operate in their intended electromagnetic environment within a defined margin of safety, and at design levels of performance, without suffering or causing unacceptable degradation as a result of electromagnetic interference. This definition refers to two different types of electromagnetic interference, namely: 1) radiated emissions and 2) susceptibility to electromagnetic interference generated by other components. This paper discusses only the radiated emissions of Spansion Flash memory devices. Past work has shown Spansion memories to have acceptable immunity to externally generated electromagnetic interference, but future experiments are being designed to more thoroughly evaluate any device susceptibility of different Spansion Flash technologies. “The Engineering Society For Advanced Mobility Land Sea Air and Space” (SAE) provides several standards that define a method to measure the electromagnetic radiation from an integrated circuit. These documents, SAE J1752-1 and SAE J17523, will be continuously referenced throughout this paper and are listed as [3] and [4]. It is also understood by the authors that there is an IEC 61967-2 “Integrated circuits—Measurement of electromagnetic emissions, 150 kHz to 1 GHz—Part 2: Measurement of radiated emissions, TEM-cell method and wideband TEM-cell method (150 kHz to 8 GHz)”; however, we have been unable to attain a copy of the released specification. Document searches have revealed that this is still a draft document and not yet a published standard. II. E XPERIMENTAL The testing methodologies used were in compliance with SAE J1752/3 [4]. Underwriters Laboratories Inc. was contracted to conduct the radiated emissions testing to ensure compliance to the aforementioned standard. The raw data were obtained from Underwriters Laboratories Inc. and are contained within project number 2004-376 [1]. With this test method, the IC under evaluation is mounted to a standardized test board. All critical board dimensions, the layout, and the layers are defined by the SAE standard. Fig. 1 shows the board layout requirements as determined by SAE J1752/3. This ensures standardization for isolating the IC within the transverse electromagnetic (TEM) cell. It is critical when performing the measurements that the IC under test is isolated on one side of the board to ensure that the emissions measured within the TEM cell radiate from the IC but not from other passive or active components populated on the board. Fig. 2(a) and (b) shows the Spansion board layout, which is in compliance with the SAE requirement. The key requirements are

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FOGLE et al.: FLASH MEMORY ELECTROMAGNETIC COMPATIBILITY

Fig. 1.

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EMC board compliant to SAE J1752/3.

that the TEM cell be an enclosed system in which a wave (the noise) is propagated along a 50-Ω terminated transmission line in TEM mode to produce a specified electromagnetic field for testing purposes [2] and that only the device under test (DUT) is isolated within the TEM cell. The “reference” against which the noise voltage is measured is the outer wall of the TEM cell, which is connected downstream to both the preamp/spectrum analyzer and upstream to the DUT board ground (not covered by solder mask). It is noteworthy that the 60-Hz “safety ground” has a large impedance at high frequency so it does not function as an effective RF reference. We report only worse case results, for a total of seven different device types across four different process technologies studied. For each device type, three devices, each from a different fabrication lot, were tested. Each device was mounted using surface mount technology to its own specific board in compliance with the SAE standard. Measurements were taken during all device operations for each device tested. This report highlights only the most significant readings measured. The Spansion Flash memory devices measured in this evaluation are listed in Table I. Fig. 2(c) shows that one end of the TEM cell is terminated with a 50-Ω load while the other end is connected to a preamplifier and a spectrum analyzer, allowing the radiated emissions to be captured. The RF energies radiating from the DUT are captured by the septum of the TEM cell and are output to the I/O port. The I/O drive current is small during the Read operation, but is consistent with conventional 5-V TTL levels (source ∼ 4 mA or sink ∼ 2 mA) for all devices. The signals are then amplified by the preamp, allowing the spectrum analyzer to

display the signal for a frequency range. Shielded coaxial cables were used to connect the Advantest 5334 production tester to the board mounted to the TEM. Fig. 2(d) shows what would be seen from inside the TEM. Fig. 2(e) shows the backside of the driver board. Not shown are the ground planes within the driver board, which shield the TEM cell antenna from noise emitted by traces and discrete devices on the driver board. Prior to taking the actual device-radiated emission measurements, several baseline measurements were taken for test setup verification. The first was “noise floor” measurement. This was taken to evaluate the background noise entering the system with none of the equipment under test powered up. Fig. 3 shows a plot of the measurements. The step function nature of the data shown in Fig. 3 is an artifact of how the raw data were acquired. The artifact was created to reduce the overall measurement time per device. As the bandwidth is increased, the sampled frequency interval needs to be increased proportionally, otherwise the elapsed time would increase linearly with bandwidth. Therefore, to keep the elapsed measurement time per device constant, the sampled frequency intervals were increased. The spectrum analyzer shows this increase in sampled frequency interval as an increase in the noise floor. The next baseline measurement taken was with the DUT inserted into the TEM cell and all the supporting testing hardware powered up and running, but without power being supplied to the Flash Memory IC isolated within the TEM cell. This setup reveals any “noise” signals entering the system being generated by the supporting test hardware rather than the Flash memory

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Fig. 2. (a) DUT side of PCB driver board, viewed from inside the TEM cell as upper left; also viewed from inside the TEM cell as upper right. (b) Specification for the board. (c) Terminated TEM cell with inputs and outputs. (d) “Topside” view of DUT on board to be placed inside TEM cell. (e) “Backside” view of DUT on board to be placed inside TEM cell. TABLE I FLASH MEMORY DEVICES TOGETHER WITH WAFER FABRICATION CRITICAL DIMENSIONS AND PACKAGE TYPES

IC under test. The only significant finding is a spike at 971 MHz of approximately 12 dBµV, ∼ 6 dB above the noise floor. This spike was observed on many test runs and constitutes a signal generated by the local test equipment. The spike shown in Fig. 4 does not represent a serious concern, but needs to be identified for accurate assessment of future measurement plots. The software developed to perform the device testing was done so in compliance with the Spansion data sheets and with specific customer applications and device operating modes taken into account. When running customer accessible embedded algorithms, internally the device is exercising several

Fig. 3.

Noise floor with test board.

different device operations simultaneously. Using only these embedded operational modes would produce ambiguity when trying to understand exactly which internal operations were contributing to the radiated emissions. Thus, some Spansion proprietary operating modes were used to isolate internal device operations.


Fig. 4.

Fig. 5.

Noise floor with test equipment running.

Am29F400BT. Verify zeros EMC plot.

III. E XPERIMENTAL R ESULTS BY D EVICE Am29F400BT-45EI is a 4-Mb 5-V-only boot-sector Flash memory device. The access time for this device is as fast as 45 ns. This device is manufactured using Spansion’s 320-nm process technology. All modes tested for the Am29F400BT45EI device show emission plots similar to those obtained for the noise floor except for the following. Fig. 5 shows that the primary noise frequency emitted by the Am29F400BT device occurs at 811 MHz with an amplitude of 30 dBµV. This is approximately 24 dB above the measured ambient. The typical ambient level is a function of the spectrum analyzer bandwidth and varies between −2 and +6 dBµV across the two upper frequency decades. The test mode being exercised during this measurement is a slow read access data verify. We attribute this spike primarily to the output buffer design and the slew rate rise and fall times. To convert from a reading in dBµV to a value in volts, we use the formula obtained from UL [1], i.e., Volts = 10 (dBµV/20) × 1 µV(Reference) . Thus, the 30-dBµV noise level equates to 31.6 µV. Using the SAE Emission Reference Levels as a guideline, this emission falls just above the Level 3 range. The figure in [5, Fig. 8] implies that ∼ 80 dBµV/m would be needed to generate cross-modulation product frequencies (our dBµV data are equivalent to electric field values in volts

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Fig. 6. Am29F400BT. Program zeros.

per meter). Thus, the measured value of 30 dBµV should not contribute to cross modulation. A second plot of interest obtained from the 5-V Flash memory device is shown in Fig. 6. The spikes of greatest significance shown above include 8 dBµV at 45 MHz, 16 dBµV at 100 MHz, 17 dBµV at 180 MHz, and 27 dBµV at 816 MHz. Note that the 816-MHz peak occurs near the previously measured peak at 811 MHz. Programming is achieved by hot electron injection from the drain terminal. To access the Embedded Programming routine, a specific command sequence is issued to the device. Once the proper sequence is received, the device will internally execute the programming algorithm. Internal slew rate rise and fall times can transition in as fast as 3 ns. The output buffers are designed to minimize di/dt noise and to prevent output driver crossbar current. The di/dt is reduced to allow the same output buffer switching time at both −55 ◦ C and 130 ◦ C. When these older technology devices were originally designed, high-speed switching noise was not as much of a concern as it is with today’s operational requirements and customer applications. In addition, the output buffers were designed to drive much more capacitance than later designs. Therefore, it is of no great surprise that we see emissions with the greatest amplitudes when measuring these “older” 5-V devices. IV. Am29BL802CB-65RZE The Am29BL802CB is an 8-Mb CMOS 3-V-only burstmode Flash memory device. Although the periphery operates on a 3-V basis, this device internally steps this voltage to drive an internal 5-V core. This device is also manufactured using Spansion’s 320-nm process technology. Upon first glance at Fig. 7, two observations may be immediate, namely 1) the frequency range has been increased from 1 to 1.1 GHz and 2) there are only two frequency decades being displayed. The answer for each is quite simple. For many of the measurements, the upper frequency window was increased to 1.1 GHz. This allowed viewing of noise emitted near the 1-GHz frequency more clearly. These plots contain only two frequency decades because it was observed that there was nothing of interest occurring within the first two frequency decades (no high energies emitted from 0.15 to 10 MHz) for all devices measured. Therefore, it was decided to perform the initial sweep for each device across the entire frequency range

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Fig. 7. Am29BL802CB. 40-MHz burst read.

Fig. 8. Am29BL802CB. 25-MHz burst read.

Fig. 9.

Fig. 10.

Am29LV160DT. Chip sector erase EMC plot.

Am29LV160DT. Verify zeros EMC plot.

(0.15 MHz to 1 GHz), and the subsequent two frequency scans were done only at the upper two frequency decades. Thus, some plots contained within this report will show the entire frequency range, while others will only contain the upper two frequency decades, depending on which plots displayed the worse case radiated emissions. Fig. 7 shows emissions of the Am29BL802CB device while in a 40-MHz checkerboard burst (synchronous) read mode. The burst mode is a synchronous read mode that allows data out in access times of as fast as 17 ns. Using the normal asynchronous read mode allows valid data output within 65 ns. The largest spikes are 26 dBµV at 299 MHz, 29 dBµV at 618 MHz, and 21 dBµV at 800 MHz. The most significant (greatest) amplitude shown above is ∼ 22 dB above the ambient level. Because this device is manufactured on the 320-nm process technology with an internal core operating on 5 V, it is of no great surprise to see it emitting levels comparable to that of the Am29F400BT device. The only other plot of significance attained from the Am29BL802CB device is of the 25-MHz checker board synchronous read, shown in Fig. 8. Although relatively small, the frequency and amplitude of the primary emission shown above occurs at 150 MHz with an amplitude of approximately 16 dBµV, 11 dB above the ambient noise level. This emission falls within the Level 2 IC reference emission level regime defined by the SAE standard. However, due to the previous plot obtained, this device would be classified as a “Level 3” emissions device per SAE standard [3], [4].

(periphery and core) discussed in this evaluation. This device is manufactured on a 230-nm process technology and is capable of access times of as fast as 70 ns. Although many of the plots for this device resemble those of the noise floor, there are a couple plots of interest (although the emissions measured are small in amplitude). The “significant” noise emissions shown in Fig. 9 are beyond the 1-GHz measurement window, with the highest peak at 1.060 GHz with an amplitude of 19 dBµV, 13 dB above the ambient noise level. This measurement was obtained while the device was running an Embedded Erase Algorithm. This is an internal algorithm that will automatically preprogram the array, if it is not already programmed, before executing the erase operation. During erase, the device automatically times the erase pulse widths and verifies proper cell margin. Thus, during this test mode, the device is actually internally preprogramming the array, verifying successful programming, erasing, verifying erase, and correcting any potentially over-erased bits. Thus, we have exercised most aspects of the device’s internal functionality. Fig. 10 shows the second most significant emission plot attained from the LV160DT device. The peak noise spikes measured on this device fall outside of the 1-GHz measurement window. According to SAE [4], the emission reference levels apply only to measurements over the frequency range of 150 kHz to 1 GHz. Therefore, this device behaves very well with regard to radiated emissions and falls within the SAE Level 2 emissions region.

V. Am29LV160DT-70EI

VI. Am29LV640MH-90EI

The Am29LV160DT is a 16-Mb CMOS 3-V-only boot-sector Flash memory device. This is the first true 3-V-only device

The Am29LV640MH-90EI device is a 64-Mb MirrorBit technology 3.0-V-only uniform-sector Flash memory with


Fig. 11. Am29LV640MH. Chip sector erase.

versatile I/O technology. The MirrorBit process technology architecture is different from that of standard floating gate technology. The MirrorBit architecture features two storage cells in a nitride layer rather than a single-bit cell formed from polysilicon (each cell can be independently programmed, erased, and read). The source and drain have identical junction profiles. In fact, they can be used interchangeably so that the cell can store charge in two separate sites, near the source or the drain. This feature makes it possible to place a charge at each end of the nitride, effectively doubling the storage size of the array. The emissions measured from the Am29LV640MH device are very small. In fact, the plot shown in Fig. 11 reveals the greatest emissions measured across all three lots tested. This shows that the 230-nm MirrorBit technology has a very low radiated emission level. The peak spike shown in Fig. 11 above occurs at 970 MHz with a peak amplitude of only 13 dBµV, which is ∼ 8 dB above the noise floor. This spike occurs at roughly the same frequency observed in the noise floor measurements of 12 dBµV at 971 MHz. Therefore, it is assumed that this spike is an artifact and that the actual emissions radiated from the device are much lower than the measured 13 dBµV. A close reading of Flintoft et al. [5] suggests that the presence of this consistent noise peak at 970 MHz is not likely to produce cross-modulation products between the clock frequency and the illuminating radio frequency interference (RFI) from the tester. The interfering signal (see [5, Fig. 6]) would need to be ∼ 80 dBµV or stronger to be significant. Much of the literature quotes electric field values in volts per meter, but we have quoted just a voltage (in its logarithmic form). In fact, the SAE specification [3], [4] shows that proper calibration of a TEM cell does produce a voltage that corresponds to the same voltage per meter. Because Fig. 11 reveals the highest measured emissions from all the MirrorBit devices tested, no other plots for the Am29LV640MH will be discussed. This device behaves very well with regard to electromagnetic-radiated emissions and clearly falls within the Level 1 IC emissions regime according to SAE. Our hypothesis why MirrorBit emits much less noise relative to poly-floating gate devices is that the former benefits from a more recent design (slew rate control) and smaller wafer fabrication technology critical dimensions (see Section XII).

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Fig. 12. Am29DL320GT. Simultaneous operation.

VII. Am29DL320GT-70EI The Am29DL320GT device is a 32-Mb 3-V-only simultaneous-operation Flash memory device. The simultaneous read/write operation allows data to be continuously read from one bank while executing erase/program functions within another bank with zero latency between read and write functions. This device is the only device on the 170-nm process technology evaluated in this study. This device also behaves very well with respect to radiated emissions. The plot showing the highest peak is shown below. This measurement was taken during the simultaneous operation. Before measurements were taken, we assumed that the simultaneous operation would emit a high electromagnetic interference; however, all measurements taken disprove that assumption. As seen from the plot, the device behaves very well during this mode. This is attributed to internal noise suppression methods, which allow the simultaneous read/write operation to function with zero latency. The spike shown in Fig. 12 occurs at roughly the same frequency observed in the noise floor measurements of 13 dBµV at 971 MHz, an artifact. This device easily falls within the Level 1 SAE IC emissions category. VIII. Am29DL640H-55EI The Am29DL640H device is a 64-Mb CMOS 3-V-only simultaneous read/write Flash memory device manufactured on Spansion’s 130-nm process technology. The radiated emissions measured for the Am29DL640H device exhibit a “low-level hum” across the uppermost frequency range. This is different from the previous devices measured, where we observed large emission spikes at single frequencies. The greatest amplitude shown in Fig. 13 occurs at 560 MHz and is only 15 dBµV, 8 dB above the ambient noise level. Regarding device-radiated emissions, this value represents a low number and falls within the Level 2 SAE emissions reference level. Another plot obtained from the Am29DL640H device is shown in Fig. 14. The greatest peak observed in this plot barely exceeds 14 dBµV, ∼ 8 dB above the ambient. These two images (Figs. 13 and 14) are from the two worse case measurements taken on this technology. All other plots acquired look similar with those of the ambient scans.

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Fig. 13. Am29DL640H. Simultaneous operation.

Fig. 16.

S71JL064HA0BAW01. Flash simultaneous operation.

Fig. 14. Am29DL640H. Checker board speed read.

Fig. 15. S71JL064HA0BAW01. Flash speed read.

IX. S71JL064HA0BAW01 S71JL064HA0BAW01 is a stacked multichip product (MCP) CMOS 3.0-V-only simultaneous-operation Flash memory and static RAM. This device contains a 64-Mb Flash memory device manufactured on a 130-nm process technology stacked below a 16-Mb SRAM device manufactured on a 110-nm technology. We found that the Flash memory packaged in the tested MCP device radiates noise at the same frequencies but with greater amplitudes when compared to its stand-alone Flash memory counterpart of the same technology and size. Fig. 15 shows the radiated emissions measured from the MCP device while the Flash memory is exercising a pattern speed read. Note the difference between S71JL064HA0BAW01 flash speed read and the Am29DL640H checker board speed read (shown in Fig. 14). Both parts use the same 64-Mb Flash memory architecture/device manufactured on a 130-nm

Fig. 17. S71JL064HA0BAW01. (a) SRAM programming. (b) SRAM speed read.

process technology. The greatest peak measured from the Am29DL640H part during the pattern speed read was 15 dBµV, 8 dB above the ambient noise level. The MCP Flash shown above exhibits a slight overall increase in noise emitted, with a maximum peak value of 19 dBµV, 12 dB above the ambient noise level. At worst, the MCP packaged Flash memory may emit 4 dBµV more noise than the same device placed in a thin small outline package (TSOP) package type. This effect is attributed to the additional wire bond lengths needed for the MCP package. The horizontal red lines in Figs. 15 and 16 are 20 dBµV (10 µV) instrument calibration stripes. The packaging configuration effect is further illustrated when comparing the S71JL064HA0BAW01 Flash simultaneous


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Fig. 18. IC emissions reference levels.

operation (Fig. 16) to the plot of the Am29DL640H simultaneous operation (Fig. 13). We can see that the Flash packaged in the stacked MCP (S71) emits an overall elevated noise level with a maximum peak value of 20 dBµV, ∼ 13 dB above the ambient. Thus, the S71 device has ∼ 4 dBµV more noise than the greatest emission measured from the stand-alone Flash memory in the same operating mode. Fig. 17(a) and (b) shows the radiated emissions measured from SRAM in the S71JL064HA0BAW01 MCP device. These plots are included to illustrate differences between the Flash memory and SRAM contained within the same package type. Fig. 17(a) shows the emissions of SRAM while in a checkerboard programming routine. If we compare this emission to that of the Flash device operating in the same mode and in the same package, we can see that SRAM emits a peak measurement of 17 dBµV, 11 dB above the ambient level at 160 MHz, which is ∼ 4 dBµV worse than the Flash. Likewise, comparing the SRAM checkerboard speed read [Fig. 17(b)] to the checkerboard speed read data obtained from the Flash memory (Fig. 15), we found that SRAM emits a maximum peak of roughly 22 dBµV, 16 dB above the ambient, whereas Flash emits a maximum peak of 18 dBµV, 12 dB above the ambient noise level. Thus, the SRAM portion of the MCP emits ∼ 4 dBµV more noise than the Flash. It is also noted when comparing the measurements that the SRAM emissions occur much earlier in the frequency domain than the emissions of the Flash device. X. G OVERNING S TANDARD Throughout this paper, device emissions are stated to fall within IC emissions reference levels (levels 1, 2, and 3). These reference levels are pulled directly from the SAE standard [4]

and are shown below in Fig. 18. Further research on how these emission levels were determined reveals these levels to be arbitrarily selected by application-specific governing bodies. The SAE standard [4] states “acceptance levels are to be agreed upon between the manufacturers and the users of ICs,” and that Fig. 18 is simply provided as a reference. It should be noted that we chose to characterize a small sample size of just three devices per technology, so naturally a users’ EMC result might vary from what we show here. As stated earlier in this paper, we acknowledge that there is an IEC 61967-2 document; however, we have been unable to attain a copy of the released specification. A response received from the Document Center states edition 1.0 of the standard will be sent for editing shortly. This document should be published by the end of the year. XI. D ISCUSSION It is noteworthy that Spansion Flash memories show noise peak voltages of 10–30 dBµV, yet the figure in [5, Fig. 4] shows noise in the range of 30–75 dBµV/m for 74-series TTL devices separated by a loop with spacing of 8 mm. To reiterate, our reported dBµV values are equivalent to electric field values in µV/m. Flash memory should be expected to generate less noise than the 74-series TTL partly on the basis of slower clock speed/slew rate and partly because the on-chip distances between the driven and return current paths would be approximately three orders of magnitude smaller than the test setup used in [6], [7]. Lee et al. [8] compared a set of discrete devices to a system in package (SIP), concluding that SIP offers 6–15 dBµV better performance up to 1 GHz. We believe we reap these same advantages either as a stand-alone chip or as a stacked memory

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Fig. 20.

Fitted noise versus log of technology CD.

Fig. 21.

Fitted noise versus log of access time.

Fig. 19. Noise and SAE Levels versus frequency across Spansion technologies. TABLE II FLASH MEMORY DEVICES TOGETHER WITH WAFER FABRICATION CRITICAL DIMENSIONS, NUMBER OF BITS, OPERATING VOLTAGE, ACCESS TIME, PIN COUNT, AND PACKAGE TYPE

module (SRAM and Flash). Our TEM data look quite different than Lee’s TEM data [8, Fig. 7], as Lee apparently looked only at the harmonics of the clock frequency (101 MHz). Lee did not see the odd harmonic noise characteristic of a square, triangular, or trapezoidal wave, which implies that this noise is either an artifact of noise floor variance or perhaps cross modulation. As noted previously, we also do not see any evidence for clock frequency harmonics. The clock frequency during our noise characterization was 25 or 40 MHz and trapezoidal in shape. Fourier analysis predicts only odd harmonics of the fundamental clock with the amplitude decreasing rapidly with frequency for a trapezoidal clock pulse. The amplitude decreases as the square of the harmonic frequency (12 dB/octave for power or 6 dB/octave for voltage). As all observed noise was observed at frequencies of 150–950 MHz, corresponding to very large multiples of the clock frequency (4–40 octaves), the corresponding amplitudes would be very small for clock harmonics, if they were to exist. An estimate for the maximum expected amplitude for the first clock harmonic relative (worst case) to the fundamental tone (not seen) if the clock were 40 MHz and the noise were 120 MHz (three octaves) is an amplitude down 18 dBµV from the clock fundamental, neither of which was observed. Marot and Dall’Agnese [10] used the same SAE method [4] and found an even greater profusion of noise spikes over the entire range to 1 GHz (amplitudes up to 30 dBµV). They

did find clock harmonics characteristic of their 16-MHz phaselocked loop (PLL) clock controller. Fig. 19 shows the peak values of noise measured from each device type tested. From this graph, we can see that the older CS39S (Am29F400) and CS39LS (Am29BL802) devices are the only parts to radiate emissions in the Level 3 regime. This illustrates that specific design enhancements made to reduce internal noise also help reduce radiated emissions on newer technologies. These improvements have been discussed and include slew rate control and output driver capacitance load reduction. XII. I NDEPENDENT V ARIABLES D RIVING N OISE (RFI) We used a correlation analysis on the data in Table II to see which independent variables affect RFI with the greatest statistical significance. Figs. 20–22 show scatter plots for our estimation of the most relevant parameters, namely: 1) technology critical dimension; 2) number of memory bits; and 3) access time. We characterize these correlations as more than adequate on the following basis. The calculated correlation coefficients were combined with the number of data points, converted to Fisher’s z-value, a t-statistic, and finally a degree of confidence that the regression fit accounts for systematic variation. For 19 data points (chosen


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XIII. C ONCLUSION Spansion Flash memory is compliant with the industry’s EMC-radiated emissions requirements. In comparison with other IC-radiated emissions, Spansion Flash memory will behave very well and will not be the most significant contributor to radiated emissions in a customer’s application. ACKNOWLEDGMENT The authors would like to thank all those within Spansion, including E. Duque, A. Suraphak, R. Henry, M. Ojeda, and K. Perez, that helped provide the engineering support needed to perform this evaluation, and K. Williams and B. Owsley of Underwriters Laboratories for helping with the EMC testing.

Fig. 22. Fitted noise versus Naperian log of memory size.

Fig. 23. Fitted versus actual noise using model based on log technology CD and log access time.

from the top three RFI frequencies across the devices) and the calculated R2 values, we derive confidence levels of 99.3% or more for Figs. 20–22. Fig. 23 shows a two-parameter fit of fitted noise versus actual noise. If the fit were perfect, one would want to see a unity slope, a zero intercept, and a correlation coefficient near unity. We nearly achieve all of these criteria. While we do not have explicit “proof,” we have hypotheses regarding why these fits are so effective. We find the operating voltage not to be an important issue, which is probably a result of unchanging charge pump design. Two arguments might account for the effects of technology critical dimensions and number of bits. One is simply that smaller cells provide less effective radiating antennae. The other side of the coin would be that smaller cells simply store proportionally smaller charges, so the necessary displacement currents are smaller. The other issue is that strongly scaled technologies rely on more metal layers to distribute signals, power, and ground. It is commonly known that ground planes are effective, but one can read [7] and [9] to see its efficacy.

R EFERENCES [1] “Electromagnetic compatibility (EMC) report,” Underwriters Laboratories, Inc., Project Number: 2004-376, Sep. 21, 2004. [2] American National Standard Dictionary for Technologies of Electromagnetic Compatibility (EMC), Electromagnetic Pulse (EMP), and Electrostatic Discharge (ESD), ANSI C63.14-1992, 1992. [3] Electromagnetic Compatibility Measurement Procedures for Integrated Circuits—Integrated Circuit EMC Measurement Procedures—General and Definitions, SAE, J1752-01, 1997. [4] Electromagnetic Compatibility Measurement Procedures for Integrated Circuits—Integrated Circuit Radiated Emissions Measurement Procedure 150 kHz to 1000 MHz, TEM Cell, SAE, J1752/3, 1995. [5] I. D. Flintoft, A. C. Marvin, M. P. Robinson, K. Fischer, and A. J. Rowel, “The re-emission spectrum of digital hardware subjected to EMI,” IEEE Trans. Electromagn. Compat., vol. 45, no. 4, pp. 576–585, Nov. 2003. [6] A. A. Smith, R. F. German, and J. B. Pate, “Calculations of site attenuation from antenna factors,” IEEE Trans. Electromagn. Compat., vol. EMC-24, no. 3, pp. 301–316, Aug. 1982. [7] M. P. Robinson, T. M. Benson, C. Christopoulos, J. F. Dawson, M. D. Ganley, A. C. Marvin, S. J. Porter, D. W. P. Thomas, and J. D. Turner, “Effect of logic family on radiated emissions from digital circuits,” IEEE Trans. Electromagn. Compat., vol. 40, no. 3, pp. 288–293, Aug. 1998. [8] S.-B. Lee, J. Park, S.-J. Hong, and H.-G. Jeon, “Electromagnetic interference (EMI) behavior of system in package (SIP),” in Proc. IEEE EMC, 2004, pp. 876–880. [9] S. J. Porter and A. C. Marvin, “Considerations leading to a strategy for the prediction of radiated emissions,” in Proc. IEEE Colloq. “Does Electromagnetic Modeling Have a Place in EMC Design?” Feb. 1993, pp. 2/1–2/2. [10] C. Marot and P. Dall’Agnese, “Reducing electromagnetic radiations with a multi chip module,” in Proc. Int. Electron. Manuf. Technol. Symp., 1998, pp. 16–20.

Adam D. Fogle received the B.S.E.E. degree from DeVry University, Oakbrook Terrace, IL, in 1996 and the M.S. degree in engineering management from San Jose State University, San Jose, CA. From 1996 to 2000, he was with Applied Materials as a Reliability and Manufacturing Engineer, where he worked on many leading edge projects, including: building and reliability testing the first metal deposition tool that incorporated both physical and chemical vapor deposition production. In 2000, he joined the Nonvolatile Memory Division of AMD and transitioned to Spansion Inc., where he is currently the Manager of Quality and Reliability working on sustaining engineering activities and qualifications targeting the automotive customer base, and external consortia standardization activities.

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Don Darling received the B.S. degree from the University of the Pacific, Stockton, CA, in 1977. He was with Honeywell, where he held various quality and reliability engineering positions and worked on raw material analysis, metrology, manufacturing process control, documentation, and audit roles in quality engineering and management. Since 1985, he has been with AMD/Spansion, Sunnyvale, CA, where he has also held various quality and reliability engineering management roles that included incoming materials analysis, reliability engineering, and customer quality engineering and where he supports microprocessor, interface, network, and Flash memory product lines. He is currently the Senior Manager of Quality and Reliability Engineering and works closely with design, technology, manufacturing, product and marketing groups to characterize the quality and reliability of Flash products for numerous applications. He is also a coauthor of a number of publications and patents.

Richard C. Blish, II (M’82–SM’02) received the B.S. degree in physics and the Ph.D. degree in materials science from Caltech, Pasadena, CA, in 1963 and 1967, respectively. He was with Bell Labs, Murray Hill, where he worked on the Picture Phone project for two years; Signetics, where he worked on analytical chemistry for 11 years; and Intel, where he was involved with package reliability for 15 years. He is currently with AMD, Sunnyvale, CA, where he is an AMD Fellow, working on reliability modeling for more than 11 years. He is the author of about 40 papers on a wide variety of reliability topics and the holder of 42 patents. Dr. Blish was a recipient of awards for paper quality from IRPS and ECTC. He was a General Chair and Board Chair of IRPS and the Chair of Sematech RTAB in 2000. He has also been an Editor of the IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY since its inception in 2001.

Gene Daszko received the B.S. degree in chemistry from Michigan State University, East Lansing, in 1974 and the M.B.A. degree in management from the University of Minnesota, Minneapolis-St.Paul, in 1980. From 1974 to 1985, he was with National Semiconductor, Honeywell SSEC, and Xicor, where he held various process engineering positions and worked on sustaining production engineering and process development of advanced CMOS wafer fabrication processes. From 1984 to 1994, he was with Xicor and SanDisk, where he took a variety of product engineering and quality and reliability (Q&R) engineering management roles and set up the overall quality system. Since 1994, he has been with AMD/Spansion, Sunnyvale, CA, where he supports the Flash memory product line in various product and Q&R engineering management positions. He is currently the Director of Customer Quality Engineering, where he works closely with numerous customers to study and characterize the quality and reliability of Flash products for numerous customer applications.