Ge

Silicon Photonics Silicon-based micro and nanophotonic devices

Silicon photonics: Optical modulation in silicon platform Laurent Vivien, Institut d’Electronique Fondamentale, CNRS UMR 8622, Université Paris Sud, 91405 Orsay Cedex, France http://silicon-photonics.ief.u-psud.fr/

http://silicon-photonics.ief.u-psud.fr/

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The Institute for Fundamental Electronics

IEF is a joint research unit between CNRS and University of Paris Sud 135 +100 ~ 400

CNRS researchers, professors and lecturers, technical staff PhD students, Post-Doc and visitors students undergoing training within IEF's ground

Spintronics and Si-based Nano-electronics

Micro-Nano systems and systems Photonics University Technology Center (CTU) MINERVE


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Laurent Vivien

University Technology Center IEF-MINERVE member of The French Network on “Basic Technological Research” (RTB)

University Technology Centre (1000 m²): Photolithography:  2-sided UV lithography with wafer bonding  Deep UV lithography (248 nm)  2 e-beams (Raith150 and 100keV nanobeam)  Laser

Etching: Wet etching (KOH, TMAH, …) Dry etching : fluoride gases RIE (2 systems)  ICP Si deep etching  IBE  02 plasma etching  Chloride gases RIE

…


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Laurent Vivien

FTTH

i-SicretOptical telecommunications Environment

Data centers

Interconnects http://silicon-photonics.ief.u-psud.fr/

Silicon photonics

Free space communications

Chemical/Biological sensors

Military Laurent Vivien4

Silicon photonic building blocks On-chip III-V laser on Si

Off-chip III-V laser

Germanium photodetector RF electrodes

Optical coupler

Input waveguide

Germanium-based laser

10 µm

Receiver

Emitter Laser

Modulator

Detector

“Silicon” modulator http://silicon-photonics.ief.u-psud.fr/

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Laurent Vivien

Passive photonic devices

WDM Waveguides Electric field Strip WG

Strip WG

Beam splitter


Electric field Slot WG

8 µm

14 µm

90°-turns PC-Slot WG

Fiber coupler

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Laurent Vivien

Ge waveguide photodetector

Dark current: ~1nA

40 Gbit/s @ -1V

Over 50GHz @ 0V


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Laurent Vivien

Optical modulation Electrical driver

Optical intensity

t

t

Modulated optical intensity

Optical modulator

Electroabsorption

t

Electrorefraction Refractive index variation under an electric field

Absorption coefficient variation under an electric field

Phase modulation interferometer

Intensity modulation


Intensity modulation 8

Laurent Vivien

Figure of merits I0

Imax

Figures of merit t

Imin

t

Output optical Input optical  VpLp Modulation efficiency intensity intensity

 IL Insertion loss Distinction between Imin et Imax  fc -3dB bandwidth I  ER Depth Extinction ratio  MD : Modulation -% MD  max

 Imin

Imax

 Voltage swing I  Extinction  ratio (ER)consumption - dB Power ER  10 log  max 

I  P  10 log  0  I  max 

 Insertion loss - dB


 Imin 

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Laurent Vivien

Modulator speed What are the limitations of the modulator speed?

 Intrinsic speed  Physical phenomenon limitation

 RC time constant  Electrical circuit limitation

 RF signal propagation  impedance adaptation  Matching of electrical and optical velocities http://silicon-photonics.ief.u-psud.fr/

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Laurent Vivien

Optical modulation Electrical driver

Optical intensity

t

t

Modulated optical intensity

Optical modulator

Electroabsorption

t

Electrorefraction Refractive index variation under an electric field

Absorption coefficient variation under an electric field

Phase modulation interferometer

Intensity modulation


Intensity modulation 11

Laurent Vivien

Thermo-optic effect  Thermo-optic coefficient

dn n  T dT

 In silicon 2.10-4 K-1 at 1.55µm

 Demonstration of silicon optical modulator: 

Bandwidth limited to few 100 kHz

Thermal effect can be a parasistic effect for high speed optical modulators. Espinola et al IEEE PTL, 15, 1366 (2003). http://silicon-photonics.ief.u-psud.fr/

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Laurent Vivien

Electro-optic effect Nonlinear Polarization:

 Pockels effect:  Linear electro-optic effect

 Kerr effect:  Nonlinear electro-optic effect

 Wavelength conversion  Wavelength conversion  Second Harmonic Generation (SHG)  Four wave mixing (FWM)

>> http://silicon-photonics.ief.u-psud.fr/

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Laurent Vivien

Electro-optic effect Nonlinear Polarization:

Without straining

With straining

 Pockels effect: layer layer  Linear electro-optic effect

Break the symmetry of silicon crystal

 Wavelength conversion  Second Harmonic Generation (SHG)

Strained silicon photonics

Jacobsen et al. Nature 441, 199-202 (11 May 2006) http://silicon-photonics.ief.u-psud.fr/

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Laurent Vivien

Mach-Zehnder modulator based on Pockels effect

 Pockel’s effect:  

 Conditions to achieve strain:  Bottom of waveguide fixed and top is strained  SiN induces strain all around the waveguide  Thermal annealing

Bartos Chmielak et al. (2011) Opt. Express http://silicon-photonics.ief.u-psud.fr/

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Laurent Vivien

Mach-Zehnder modulator based on Pockels effect  Pockel’s effect:

Still weak effect and high voltage BUT promising for the development of low power consumption devices  Intrinsically high speed  Field effect – no capacitance  Low power consumption

 Low bias swing  Low insertion loss  No doped regions http://silicon-photonics.ief.u-psud.fr/

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Laurent Vivien

Electro-optic effect in silicon  Free carrier density variation in silicon  Refractive index and optical absorption are modified by freecarrier concentration variations (Kramers-Krönig related) :

Carrier concentration

 Plasma dispersion effect

Free electrons

Free holes

Soref et al IEEE JQE QE-23 (1), (1987). http://silicon-photonics.ief.u-psud.fr/

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Laurent Vivien

Electro-refraction vs intensity variation Electro-refraction effect:  carrier density variation

1 µm

70 nm

380 nm

n   8.8  10

22

N  8.5  10

18

P

0.8

Refractive index variation Effective index variation of the guided optical mode Interferometers

Phase variation Optical intensity variation


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Laurent Vivien

Free carrier variation effect What are the possibilities to obtain a free carrier concentration variation in silicon-based materials ?

 Carrier injection in pin diode under forward bias voltage  Carrier accumulation in metal-oxide-semiconductor (MOS) capacitors  Carrier depletion in a pin diode under reverse bias voltage


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Laurent Vivien

Optical modulators based on carrier depletion  Phase shifters:  PN diode  Interleaved PN diode  PIN diode  PIPIN diode  MOS Capacitor PIN diode

PIPIN diode

 Interferometers  Ring resonator  Mach-Zehnder

 Photonic crystals


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Laurent Vivien

Carrier depletion optical modulator Lateral pn diode

Interleaved pn diode


Laurent Vivien

From the idea to the final device

?

Simulation of the diode

Figures of merite OptimizationStructure design

10 parameters need for optimization

ISE DESSIS

Optimization

Structure definition

Couplers

Optimized structure

Electrical simulation

- Drift-diffusion - SRH, Auger

DC, AC and Time

40G n  8,8 .10 N  8,5 .10 P Frequency and data   8,5 .10 N  6,0 .10 P transmission 22

 18

Optical simulation

10G

18

0,8

 18

Effective index, loss

Device model

Layout http://silicon-photonics.ief.u-psud.fr/

Technology

Characterization 22

Laurent Vivien

Carrier depletion Si optical modulator

PIPIN diode Metal

P-doped region

2004

2005

2006

2007

Metal

N-doped region

2008

2009

2010

2011

2012

Europe: Univ. Paris Sud, CEA Leti, Univ. of Southampton… Asia: A*Star, Petra, AIST, Chinese Academy of Sciences, Samsung Electronics, Tokyo Institute of Technology …

North America: Intel, IBM, Cornell, Luxtera, Ligthwire, Kotura, Oracle … http://silicon-photonics.ief.u-psud.fr/

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Laurent Vivien

Silicon photonics on 300 mm platform Optical modulators

Mach-Zehnder Interferometer 200mm wafer

300mm wafer

Length = 950 µm

Interleaved pn diode VpLp = 2.4 V.cm

40Gbit/s

Insertion loss = 4 dB -3dB cut-off frequency > 20 GHz ER ~8 dB @ 40 Gbit/s http://silicon-photonics.ief.u-psud.fr/

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Laurent Vivien

40Gbit/s optical link External laser

PRBS generator

40Gbit/s Si modulator

40Gbit/s Ge photodetector

RF cable

RF driver RF cable

Optical fiber

RF cable

Sampling oscilloscope


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Laurent Vivien

Silicon modulators Short distance and high volume applications (electrical bottleneck)

Main challenges:  Driving voltage of modulator  Power consumption Data-center Optical interconnects ITRS Roadmap: Optical interconnect  (…) A large variety of CMOS compatible modulators have been proposed in the literature (…)  “The primary challenges for optical interconnects at the present time are producing cost effective, low power components.” http://silicon-photonics.ief.u-psud.fr/

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Laurent Vivien

Power consumption For emitters and short optical links: ~100 fJ/bit down to fJ/bit

Mach Zehnder modulators  3 pJ/bit

(D.A.B. Miller, Opt Exp. , 2012)

Ring resonator modulators  0.5 to 1 pJ/bit

How do we reduce the power consumption ?


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Laurent Vivien

Power consumption

Reduction of capacitance of device  Slow-wave photonic crystals for reducing the length  Small radius Ring Modulators

Improvement of the modulation efficiency  Improve efficiency of Si modulator  MZM or EAM Hybrid modulator (ie III-V modulator on Si)  Ge EAM modulators  Franz-Keldysh effect in bulk material  Quantum Confined Stark Effect in quantum wells


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Laurent Vivien

Bulk vs Quantum Wells 

Bulk material

E=0



E≠0

QW structures

E0=hc/l0

l0

l

l

Ge/SiGe quantum well structures

 Absorption edge in QW structures is more abrupt than in bulk material  E0 depends on the quantum well thickness  Adjustment of the wavelength is possible http://silicon-photonics.ief.u-psud.fr/

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Laurent Vivien

Epitaxial growth by LEPECVD LEPECVD

 Growth of Ge/SiGe multiple quantum wells

Low energy plasma enhanced chemical vapor deposition

100 nm Si0.1Ge0.9 n-type

Si0.1Ge0.çà spacer

15nm Si0.15Ge0.85 barrier 10nm Ge QW 15 nm Si0.15Ge0.85 barrier

}

Strain-compensated QW stack repeated 20 times

Si0.1Ge0.9 spacer 500 nm Si0.1Ge0.9 p-type Relaxed buffer graded from Si to Si0.1Ge0.9 buffer layer

Low dislocation density - Best possible device performance

Si(100)

 Low-rate growth (~0.3 nm/s) for optimum layer and interface Ge QWcontrol  High-rate growth (510 nm/s) for maximum efficiency

 Temperatures down to 400°C L-NESS Como, Italy


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Laurent Vivien

Device processing 1. Mesa etching 5. Deep Etch for waveguide characterization

2. Etching of P-type layer

3. SiO2/Si3N4 Deposition and Patterning

4. Metallization: Lift off


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Laurent Vivien

Electroabsorption modulator

3 µm

1 µm

90 µm

Light 20 Ge/SiGe QW P. Chaisakul et al., Optics Express (2012).


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Laurent Vivien

Static performance: optical transmission 1V swing

~6x104V/cm ~7.5x104V/cm

2V swing

Bias from 0 to 5V : Extinction Ratio (ER) > 6 dB for 20 nm range Insertion Loss (IL) : 5 to 15 dB

~3x104V/cm ~4.5x104V/cm


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Laurent Vivien

Frequency response


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Laurent Vivien

Energy consumption

Energy to charge the device Energy/bit = 1/4 (CVpp)2 Energy dissipation of photocurrent Energy/bit = 1/B (IphVbias)


C ~ 62 fF Energy/bit = 70 fJ/bit (for a voltage swing of 1 V , 20 Gbps, 0.5 mW input power)

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Laurent Vivien

Electro-refraction effect in Ge/SiGe QW

The absorption edge shifted to 0.8 eV (quantum confinement + strain) QCSE observed Fabry-Perot (FP) fringes observed at energy lower than the absorption edge

TE polarization

One order of magnitude higher than carrier depletion effect in silicon http://silicon-photonics.ief.u-psud.fr/

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Laurent Vivien

Overlap factor optimization 3 µm 1 µm 12% overlap factor between the optical mode and MQWs

20 QWs

Overlap factor

IL

ER

Length

10%

10 dB

120µm

20%

10 dB

60µm

6.4dB

30%

10 dB

40µm

5.9dB


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8dB

Laurent Vivien

Integrated circuits based on Ge/SiGe QW ? doped-N Si0.1Ge0.9 Si0.1Ge0.9

2 µm Si0.1Ge0.9 relaxed buffer

QWs Si0.1Ge0.9 Si0.15Ge0.85 Ge Si0.15Ge0.85 doped-P Si Ge0.9 15 nm 10 nm 0.115 nm

13 µm thick gradual buffer from Si to Si0.1Ge0.9

2 µm Si0.1Ge0.9 relaxed buffer 13 µm thick gradual buffer from Si to Si0.1Ge0.9

Si

Si

The real scale

Schematic description

Challenge: coupling the light from silicon to Ge/SiGe QW http://silicon-photonics.ief.u-psud.fr/

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Laurent Vivien

Integration on bulk silicon 1st option: waveguide in the relaxed SiGe layer (thanks to the graded buffer ) doped-N Si0.09Ge0.91

Ge concentration in the waveguide: trade-off between • Strain compensation • Optical loss

Si0.09Ge0.91

QWs Si0.09Ge0.91 Si0.15Ge0.85 Ge Si0.15Ge0.85 doped-N Si 15Ge 0.91 15 nm 10 nm 0.09 nm

1.5 µm Si0.16Ge0.84 relaxed buffer

8 µm thick gradual buffer from Si to Si0.1Ge0.83

Si


P. Chaisakul et al, submitted

Optical loss of each device, including input/output coupling with Si0.16Ge0.84waveguide < 5dB 39

Laurent Vivien

Integration on SOI 2nd option: decrease the thickness of the buffer layer Challenge: keeping homogeneous and high quality layers

Buffer Si0.1Ge0.9 Si

SiO2 Thick gradual buffer from Si to Si0.1Ge0.9

Si

Ge/SiGe modulator integrated with SOI: estimated performance : Extinction ratio = 7.7 dB, loss = 4 dB

Under fabrication

M-S. Rouifed et al, submitted http://silicon-photonics.ief.u-psud.fr/

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Laurent Vivien

Power consumption evolution Carrier depletion modulator MZi Energy/bit ~ 5 pJ/bit

Ring resonator modulator Energy/bit ~ 0.7 pJ/bit

EA Ge/SiGe modulator energy/bit ~ 0.07 pJ/bit

Strained modulator

Ultra low power consumption modulator energy/bit ~ few fJ/bit


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Laurent Vivien


Electronic – Photonic convergence


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Photonics-electronics integration

Transistors

Photonics

Front-end fabrication

 Very low parasitics  Custom SOI, specific libraries  process co-integration http://silicon-photonics.ief.u-psud.fr/

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Laurent Vivien

Photonics-electronics integration

Photonics

Transistors

Photonics



Transistors

Back-end fabrication  On top of CMOS or in metal layers  Serial process  Compound yield  Thermal budget < 400C 44

Laurent Vivien

Photonics-electronics integration Photonics Photonics

Transistors

Photonics



Transistors

Transistors

Back-end fabrication

3D integration  Separate processes  On top of CMOS or in  No change in CMOS Front-End metal layers  No thermal budget!   Serial process  Other layers: MEMS, antennas  Compound yield  Higher (but reasonable)  Thermal budget < 400C parasitics 45

Laurent Vivien

Acknowledgements: Funding and collaborations National Research Agency SILVER, MICROS, GOSPEL, MASSTOR, ULTIMATE, Ca-Re-Lase, POSISLOT

HELIOS Photonics Electronics functional integration on CMOS

Plat4M photonic libraries and technology for manufacturing

Silicon photonics group

SASER Safe and Secure European Routing CARTOON Carbon nanotube photonic devices on silicon


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Laurent Vivien


Silicon photonics: Optical modulation and detection L. Vivien, D. Marris-Morini, G. Rasigade, L. Virot*, M. Ziebell, D. Perez-Galacho, P. Chaisakul, M-S. Rouifed, P. Crozat, P. Damas, E. Cassan D. Bouville, S. Edmond, X. Le Roux Institut d’Electronique Fondamentale, CNRS UMR 8622, Université Paris Sud, 91405 Orsay Cedex, France http://silicon-photonics.ief.u-psud.fr/

J-M. Fédéli, S, Olivier, Jean Michel Hartmann CEA-LETI, Minatec 17 rue des Martyrs, 38054 Grenoble cedex 9, France

G. Isella, D. Chrastina, J. Frigerio L-NESS, Politecnico di Milano, Polo di Como, Via Anzani 42, I-22100 Como, Italy

C. Baudot, F. Boeuf STMicroelectronics, Silicon Technology Development, Crolles, France


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