Graph Computation based Power Flow for Large

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Nov 8, 2018 - The timing statistics of a test on an open-source graph database Neo4j against a conventional relational database MySQL shows that.

2018 International Conference on Power System Technology (POWERCON 2018)

Guangzhou, 6-8 Nov. 2018

Graph Computation based Power Flow for Large-Scale AC/DC System Wei Feng, Student Member, IEEE. Chen Yuan, Member, IEEE. Renchang Dai, Senior Member, IEEE. Guangyi Liu, Senior Member, IEEE. Fangxing Li, Fellow, IEEE

Abstract—In this paper, a graph computation based power flow algorithm is introduced to solve large-scale AC/DC hybrid systems with multi LCC (Line Commuter Converter) based DC grids. The proposed approach is to improve the computational efficiency of constructing related matrices and getting power flow results without changing the conventional sequential iteration method. The hybrid system is modeled as a graph of vertices and edges with info of topology and parameters, thus local computation could be done independently for like formulating mismatch vectors of ΔP, ΔQ, Δθ, ΔV and matrices of B', B", only with parameters on its linked edges and adjacent vertices. Then by taking advantages of hierarchical parallel computing, the fdpf (fast decoupled power flow) of AC system, calculation of DC grids and mismatch comparing for each iteration of the sequential method could be done parallelly. This method is implemented on a graph database platform, and tested on IEEE 300-Bus, modified South Carolina 500-Bus system and a Chinese system to verify the accuracy and time-saving performance. Index Terms—Graph Computation, Large scale, AC/DC systems, Sequential Iteration

I. INTRODUCTION

W

ith the increasing demand of electric power, line commutated converter (LCC) based HVDC systems have been applied to transmit power around the world taking advantages of cost-effectiveness, lower power loss, and the ability to connect asynchronous AC grids. Today, LCC-HVDC is widely utilized to connect AC systems across wide areas, to construct an ultra-wide hybrid grid including multi independent AC grids and DC lines. Some latest development of power grids has mixed LCC-based and Wei Feng is an intern with GEIRINA (Global Energy Interconnection Research Institute North America), and a student with University of Tennessee, Knoxville, TN, 37996 USA ([email protected]). Chen Yuan is with GEIRINA, CA 95143 USA ([email protected]), Renchang Dai is with GEIRINA, CA 95143 USA ([email protected]). Guangyi Liu is with GEIRINA, CA 95143 USA ([email protected]) Fangxing Li is with University of Tennessee, Knoxville, TN 37996 USA ([email protected]) This work is supported by State Grid Corporation technology project SGRIJSKJ(2016)800

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VSC-based HVDC with existing AC systems to accommodate the requirements of renewable resource connection and transferring a large amount of power through a limited transmission corridor over long distances [1-4]. In general, there are two methods to solve power flow of AC/DC system: sequential method and unified method. The unified method was introduced by J. Arrillaga and P. Bodger [5]. In the unified method, a unified Jacobian matrix containing both AC/DC equations and variables is constructed. The unified method has better convergence; however, the unified Jacobian matrix has a higher dimension and is inflexible to modify when there is a need to remove and/or add an HVDC line from the model [6]. J. Reeve and other researchers proposed the sequential method [7] which solves AC systems and DC systems separately until the AC/DC interface voltages are converged. With practical and theoretical improvements [8], the sequential method is proven as a scalable and flexible method to solve complex, large-scale hybrid AC/DC systems, particularly with the assistance of parallel computing. Previous research works in sequential method focused on improving sequential method convergence or simplifying the calculation. However, computational efficiency to solve large-scale AC/DC system power flow is still a challenge. To improve the computational efficiency, a new method has been developed [9]. Among various methods to improve computational efficiency, parallel computing is a promising approach. However, the state of the art of power flow applications does not effectively harness the parallel capability because the traditional relational database and computation methods applied by power flow applications were not designed for parallel computing. Reference [10] introduced a graph computation to model power system problems by graph and then solve the problem in parallel. In this paper, the sequential method is applied to solve AC/DC system power flow, and then a graph based parallel computing is exploited and applied in the conventional method, to promote the computing efficiency and even to get power flow results within SCADA-rate for an extremely large system. The proposed graph computation could generate mismatch vectors and fdpf matrices B', B" on the base of vertex-based

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local computation, which only needs parameters of connected nodes via edges within 1-2 graph operations. Besides, the calculations for AC and DC grids and mismatch comparisons could be done in hierarchical parallel computing to solve more time. The remainder of this paper is organized as follows. Section II gives a brief description of graph theory and its application on power system. The detailed sequential iteration method for hybrid PF and implementation of graph computation are discussed in Section III, and test cases, verification of accuracy, and time-saving performances are shown in Section IV. Finally, conclusions are provided in Section V. II. GRAPH COMPUTATION A. Graph Theory Graph is a data structure to model objects and their relationships by vertices and edges denoted by G (V, E), where 𝑣𝑖 ∈ 𝑉 is the ith vertex, V represents vertices set, 𝑒𝑖𝑗 ∈ 𝐸 is the edge connecting vertices i and j, and E is the set of edges. Attributes of vertices and edges are expressed as 𝑃𝑣𝑖 , 𝑃𝑒𝑖𝑗 ∈ 𝑃. The graph datasets V, E and P can be used to model a large power system. For power flow calculation, the sparse matrix A can be represented by a graph. For example, matrix element 𝑎𝑖𝑗 ∈ 𝐴(𝑖 ≠ 𝑗, 𝑎𝑖𝑗 ≠ 0) is modeled as the edge between vi and vj, and aii is an attribute/element of vertex in a graph. Conventional relational database (RDB) stores structured data in tables with pre-defined types in column. The data relationship is created by using joint operations to search for common attributes in different tables. For example, creating connectivity of buses and branches requires a “joint” query on bus tables and branch tables. The searching time by the joint query increases exponentially with the database size. Different from relational database, a graph database (GDB) stores the bus-branch connectivity in edges. No joint search is necessary to create bus-branch connectivity relationship. The timing statistics of a test on an open-source graph database Neo4j against a conventional relational database MySQL shows that the overall performance of Neo4j searching dramatically outperforms MySQL. A study in [11] shows that graph database search can be up to 167 times faster than relational database regarding the bus-branch connectivity. B. Application of Graph Computation in Power System One of the challenges in computing power system problems is how to describe the relationship of connecting, together with parameters attached. In general, a conventional grid is made up of generation, transmission, convention, distribution, and consumption. All these components could be classified into bus-attached and line-attached. For instance, parameters of generators, loads, voltages, and devices like SVCs are attached on buses. In hybrid power system, the value of controlling

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angles and DC voltages are also attached on buses. Similarly, parameters of transmission lines, transformers, filters and devices like breakers are attached on lines. Thus, a standard power system could be expressed as a graph, with both info on topology connecting and related data. Then two methods of parallel computing could be executed. 1) NPC (Node-Based Parallel Computing). NPC is a parallel computing method in graph theory, which means simultaneous computation could perform at each independent node [12]. Fig.1 depicts how graph computation could be implemented in matrix computation. Shown as matrix A, the diagonal elements represent all nodes in the graph, the non-zero off-diagonal elements means there is a connection between related nodes, and the zero off-diagonal elements indicate there is no connection between two nodes Take the process of building an admittance matrix, which is the first and essential part in power flow calculation for example. The non-zero off-diagonal element is calculated from the start bus to the corresponding bus with connecting edge, and the diagonal element is calculated from the start bus to all connecting buses. Therefore, all non-zero elements in the admittance matrix could be computed independently. Similarly, the mismatch vectors of injection power, node variable vectors, and convergence check process could all be computed with NPC [13]. 2) HPC (Hierarchical Parallel Computing). HPC is another parallel computing method that used in graph to save time. For multi-computing processes like right-looking LU factorization, the parallel computing could be done for a single row, but the row in next level should wait until the previous computing is done. Thus, HPC means parallel could be done in each level, and the whole process is still serial. The typical HPC used in power flow are LU factorizing and solving linear equations.

Fig. 1 Application of Graph Computing in building admittance matrix

III. GRAPH COMPUTATION BASED SEQUENTIAL ITERATION A. LCC Model and Equations In a typical LCC-based HVDC, high-voltage and large capacity thyristors are utilized to construct several two-level or multi-level converter valves working in twelve pulse bridge. Since thyristor is a type of semiconductor which could only be controlled to conduct with triggering angle, thus it could only be turned off depending on the inverse of AC line voltage. Fig.2

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shows a typical LCC-HVDC converter station with converter transformers.

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(3) AC/DC coupled equations For R side, power flows from AC grid to DC grid, thus the rectifier could be a variable load, whose active and reactive power depends on operating status. Neglecting the power loss of converters, the injected power of R is: R PDCR = VDC I DC (4) R QDCR = PDCR tan R = VDC I DC tan R (5) Where ∅𝑅 is DC power factor of R. Meanwhile, for the coupled line, the equivalent reactance is much larger than resistance, namely, 𝑋𝐶𝑅 ≫ 𝑅𝐶𝑅 . The parameters of a converter could be expressed as:

R VDC = Nr (

Fig. 2 Simplified HVDC converter model of LCC based DC valve

Generally, a single LCC line has two terminals or stations, connected with AC bus, namely rectifier (R) and inverter (I). When the hybrid system in operation, active power of AC grid is transferred from R to I via DC lines as shown in Fig.3.

Fig. 3 Power exchange model of hybrid AC/DC system

Typically, a converter station is connected to AC bus via converter transformer ( 1: t, T: 1 ), filters and reactors (equivalent 𝑋𝐶𝐼𝑅 , 𝑅𝐼𝑅 ). Thus, the hybrid system could be analyzed as three parts: pure AC grid, pure DC grid, AC/DC coupled lines. For simplified, we take R for instance. (1) AC grid equations As for the pure AC grid, the basic PF equations are the same as in normal AC system, the only difference is bus injected power contains total bus generators, total bus loads, and the injected DC power. (1) Pi = Pi ,inj − Vi V j (Gij cos ij + Bij sin ij ) − PDCR = 0 jii

Qi = Qi ,inj − Vi V j (Gij sin ij − Bij cos ij ) − QDCR = 0

(2)

jii

Where 𝑃𝐷𝐶𝑅 , 𝑄𝐷𝐶𝑅 stand for the injected power of R if ith bus is connected to DC grid. Since (1) and (2) are the conventional PF mismatch equations and LCC is used for ultra-high voltage system, fdpf could be utilized to solve the AC PF. (2) DC grid equations Since there is no phase and reactive power in DC grid, equations are simpler compared with AC grid: R I VDC = VDC + I DC RDC (3)

3 2



R E AC cos  −

cos R = cos  −

3



(6)

X CR I DC )

X CR I DC

(7)

R 2 E AC

R E AC = Vi / TR

(8) Where Nr is the number of bridges, α for firing angle, TR for transformer ratio. (4) Control equations Every converter stations of both R and I are designed to operate in two of the following constant status: constant DC voltage control, constant DC current control, constant DC power control, constant transformer ratio control, and constant angle control. Although the five control strategies are free to combine, in the real engineering project, designers prefer two more stable and easier ways to control HVDC. The others could be converted to the two methods, constant power of R/constant voltage of I, and constant current of R/constant voltage of I. 𝑅 𝐼 Both strategies could provide 𝑃𝐷𝐶𝑅 , 𝑃𝐷𝐶𝐼 , 𝑉𝐷𝐶 , 𝑉𝐷𝐶 , 𝐼𝐷𝐶 , proved in the appendix. Thus, all related parameters of the hybrid system are expressed. B. Graph Computation based Sequential Iteration Method Sequential iteration method, which solves PF of AC and DC alternately, was introduced by Reeve, et al. in [7]. The advantage of the sequential iteration is that DC network model can be incorporated into existing AC power flow software and all methods to solve AC system are maintained, especially for large system with multi AC grids, fdpf method still works. Since AC grid and DC grid are decoupled, the sequential method is flexible to modify DC equations for different DC control strategies. In the sequential iteration algorithm, active power and reactive power solved by the DC network equation will be injected to the AC network. The interface parameters and mismatch comparisons are solved in AC/DC coupled lines. To get the best time performance, fdpf is utilized to solve AC PF. Fig.4 shows the flow chart of graph computing based sequential algorithm and details are discussed below:

𝑅,𝐼 Where 𝑉𝐷𝐶 for DC voltage of R/I, 𝐼𝐷𝐶 stand for DC current and 𝑅𝐷𝐶 is for DC line resistance.

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FDPF, AC power flow LU factorize + Solve (HPC)

Raw Data AC Interface: Vi

Graph Database DC initialized (NPC): R I PDCR , PDCI , VDC , VDC , I DC QDCR , QDCI

DC line PF1

DC line PFj

DC line PFn

Injected

AC initialized (NPC): Mismatch vectors: P, Q,  , V FDPF matrices: B ', B "

AC/DC coupled (NPC): cos  , cos  , tan R , tan I QDCR , QDCI

No

AC rebuild (NPC): Mismatch vectors: P, Q

FDPF, AC power flow

LU factorize + Solve (HPC) Compare (NPC)

Output

Yes

Fig. 4 Flow chart of sequential iteration method

For analysis, take an n-bus hybrid system for instance. To begin with, raw data from PSS/E or other format is stored in graph database, divided into vertices and edges. 𝑅 𝐼 As proved in appendix, 𝑃𝐷𝐶𝑅 , 𝑃𝐷𝐶𝐼 , 𝑉𝐷𝐶 , 𝑉𝐷𝐶 , 𝐼𝐷𝐶 could be pre-solved and firing/extinction controlling angle ranges [𝛼𝑚𝑖𝑛 , 𝛼𝑚𝑎𝑥 ], [𝛾𝑚𝑖𝑛 , 𝛾𝑚𝑎𝑥 ] are given. Thus, the initial injection power from DC grids to AC grids could be calculated with NPC, shown in Fig.4 ‘DC initialized’.  ,  min +  ,  max (9)  ,  int = 2 V R, I 3 R , I (0) EAC = ( DC + X CR , I I DC ) / (1.35cos( ,  int )) (10) N r ,i 

X CR, I I DC R , i (0) 2 EAC

)

0 0 QDCR , I = PDCR , I tan R , I

(11) (12)

0 𝑃𝐷𝐶𝑅,𝐼 , 𝑄𝐷𝐶𝑅,𝐼

Based on above equations, are initialized for AC grid to build mismatch vectors and FDPF matrices as shown in Fig 4 ‘AC initialized’ with NPC. Considering LCC is used in high-voltage system, thus FDPF is available for solving AC PF. n −1 Pi = − Bik  k = B '  (13) Vi k =1 m Qi = − Bik Vk = B '' V Vi k =1

Pi ,inj = − Pi ,load +  Pi ,G

Qi ,inj = − Qi ,load +  Qi ,G

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R, I VDC 3 R , I (1) + X CR , I I DC ) / (1.35EAC ) N r ,i 

R1 , I = cos−1 (cos  ,  1 −

Converged?

R0, I = cos −1 (cos( ,  int ) −

Where 𝑃𝑖,𝑖𝑛𝑗 , 𝑄𝑖,𝑖𝑛𝑗 are power injection on AC bus, 𝐵 ′ , 𝐵 ′′ are the admittance matrices, constant if the system topology stays the same. Particularly, B is highly sparse with around 5% nonzero elements, given by: 1  1  X +  X ,i = j  ii ik (17) Bij =  1 − ,i  j   X ij Where X is the reactance and Xik exists only if there is a connection (branch) between node i,k. Then combined with equations (1) and (2), AC PF could be solved with HPC to get first iteration results of AC bus voltage, 𝑉𝑖1 . Then the coupled AC/DC parameters could update to get a new injected DC power as below: R , I (1) EAC = Vi1 / TR, I (18)

cos  ,  1 = (

AC Interface: Vi

(14) (15) (16)

Guangzhou, 6-8 Nov. 2018

X CR, I I DC R , I (1) 2 EAC

(19)

)

(20)

1 1 QDCR , I = PDCR , I tan R , I

(21)

From equations (18)-(21), a new injected power should be added on equations (1), (2) to do AC PF again and gain 𝑉𝑖2 . Till now, there are two outer loop iteration results are got, if |𝑉𝑖2 − 𝑉𝑖1 | < 𝜀 the sequential ends, or more iterations are needed. To compare voltages of each iterations, NPC is available. From the previous analysis, graph computation could be implemented with NPC and HPC to improve performance in dealing with DC initialization, AC initialization, FDPF, AC/DC coupled calculation, and mismatch comparison. IV. CASE STUDY A. Test cases In this section, three test systems are provided to indicate the accuracy and performance of the proposed method. First, to verify the accuracy, a standard well-organized system which could be run in PSS/E to give reference value. In IEEE test systems, IEEE 300-Bus system developed under the direction of Mike Adibi in 1993 is a hybrid system containing an LCC line from bus 119 to bus 120. The parameters are given in Table I. TABLE I. PARAMETERS OF LCC LINE IN IEEE 300-BUS SYSTEM DC To DC Bridges Control Voltage Bus Power (MW) (kV) 119 120 4 P-V 100 460 X(Ω) R(Ω) T ratio α(degree) γ(degree) 6.8 6.2 0.7478 [15,20] [18 20]

From Bus

However, the IEEE 300-Bus system is too small to take advantages of the proposed method, thus larger systems are

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needed. In this way, this paper gives the other two systems with more than ten thousand buses. The second test case is a modified South Carolina 500-Bus system [14], a pure AC system provided by Texas A&M University. To extend the basic grid to a larger hybrid system, a 12,000-Bus system is constructed of 24 500-Bus grids and 24 LCC lines. The topology is shown in Table II. TABLE II. TOPOLOGY OF 500*24-BUS MODIFIED HYBRID SYSTEM LCC lines From To Bus Bus 1 300 860 2 800 1360 ith 500𝑖 − 200 500𝑖 + 360 23 11300 11860 24 11800 360

Thus, this modified grid is a typical loop hybrid system with 12,000 buses (500*24), 14328 branches (597*24) and 24 DC lines. The third test case is a real system in China with 9 LCC lines. Compared with the previous system, the LCC parameters of the real one are different, and initial start ranges are larger to ensure operation. Detailed parameters are shown in Table III. From Bus 88 2957 3003 3520 3528 7453 7455 7456

TABLE III. PARAMETERS OF LCC IN CHINESE SYSTEM To DC DC Α Bus Power(MW) Voltage(kV) (degree) 1003 750 250 [16 20] 4901 1500 500 [15 20] 3717 1500 500 [15 20] 4903 600 500 [15 20] 4900 1500 500 [16 20] 3746 360 225 [18 20] 9491 750 250 [12 20] 7772 1500 500 [12 20]

Γ (degree) [18 20] [18 20] [18 20] [16 20] [16 20] [18 20] [12 20] [15 20]

The other parameters of LCC are same, following control method P-V, reactance 7.936Ω, resistance 6.2Ω and transformer ratio 0.748. For AC grid, there are 11,119 buses and 15,479 branches. The test environment is shown in Table IV. TABLE IV. GRAPH COMPUTATION ENVIRONMENT Software Environment Operating system Red Hat 4.8.5 Graph database TigerGraph 2.1 Hardware Environment CPU 4×E7-8867 v3/2.50GHz (64 cores/128 threads) Memory 64GB

B. Verification and computing time The accuracy verification is tested on IEEE 300-Bus system and compared with standard results of PSS/E. TABLE V. ACCURACY VERIFICATION OF IEEE 300-BUS SYSTEM Test Bus Magnitude Phase α/γ Platform (p.u.) (degree) (degree) TigerGraph 119 1.0435 40.98738 16.240 V2.1 120 0.99818 37.72657 18.375 PSS/E 119 1.0435 40.9874 16.240 V34.0 120 0.99819 37.7266 18.379

The performance of computing time is executed in the second and third systems with multi-threads and compared with computing time in PSS/E and Matpower (Also with sequential iteration method, not default method). Typically, the computing time only refers to the pure solving time, the process POWERCON2018

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of data input and output should not be considered. To eliminate random errors, an average of 6 results are given. For PSS/E and Matpower, the auto use of CPU is applied. TABLE VI. COMPUTING TIME OF 500*24-B US AND REAL SYSTEMS 1 4 8 16 24 32 (ms) (ms) (ms) (ms) (ms) (ms) 500*24 446.16 257.92 208.75 186.00 180.2 181.39 -Bus

Threads

Real system

984.82

558.48

479.44

418.34

395.779

64 (ms)

96 (ms)

128 (ms)

PSS/E

Mat power

500*24 -Bus

194.46

204.135

192.92

846.2

1482.3

Real system

412.3

424.03

426.15

1837.5

4263.2

387.56

C. Results analysis The accuracy results are shown in Table V, the mismatch of magnitude and phase angle is smaller than 1e-5 and controlling angle is 2e-4, which shows the proposed method is accurate. The reason that extinction angle γ is different is that in the proposed method, the transformer step (0.00625) is taken into consideration making the transformer ratio is not continuous. Thus, the accuracy is verified. The results of computing time are shown in Table VI. The best performance of the proposed method is in use of 24/32 threads. The time is 21.5% of PSS/E, 12.3% of Matpower for the 500*24-Bus system, and 20.7% of PSS/E, 8.94% of Matpower for real system, which proves the time-saving performance. To analyze the inside time consumption in graph-computation and the utilization of threads, the detailed time using for 1 thread and 24 threads of the second system in each step is shown in Table VII. TABLE VII. TIME CONSUMPTION OF 500*24-BUS SYSTEM WITH 24 THREADS Solver DC init AC init FDPF-1 AC/DC init(ms) (ms) (ms) (ms) (ms) 1 thread 10.859 7.71 76.049 106.201 3.753 24 threads AC Rebuild(ms) 39.227

11.369 ε-1 (ms) 0.789

5.7519 FDPF-2 (ms) 41.26

16.325 AC/DC (ms) 3.706

75.885 AC Rebuild(ms) 34.419

3.865

6.514

0.858

16.782

3.922

6.365

0.736

ε-2 0.754

Shown in Table VII, the time used in initializing AC mismatch vectors and matrices, solving FDPF and rebuilding AC mismatch vectors occupies over 80% of the entire time. Compared with 1 thread and 24 threads, time of FDPF with HPC reduces 37.16% (the second FDPF utilized the LU matrices from the first FPDF, saving the factorizing time) and time of initializing/rebuilding AC mismatch vectors/matrices with NPC reduces 80.5%. The results demonstrate the use of threads realize both NPC and HPC in graph computation. However, Table VI indicates the time stops reducing, even increasing with more threads in use. The comparison of detailed time consumption is shown in Fig.5.

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R I VDC = VDC + I DC RDC

=V

I DC

+

(V )

2 I DC

I −VDC +

2 𝑅 From equations (23)-(24), 𝐼𝐷𝐶 , 𝑃𝐷𝐶𝐼 , 𝑉𝐷𝐶 are solved. 𝐼 For the second strategy, 𝐼𝐷𝐶 and 𝑉𝐷𝐶 are given, then: 2 I PDCR = I DC RDC + VDC I DC

(25)

I PDCI = I DCVDC

(26)

R DC

V

= I DC RDC + V

I DC

(27)

From equations (25)-(27), the statement is proved. Fig. 5 Comparison of time consumption in different threads [1]

V. CONCLUSION

[6]

Graph computation based sequential iteration method is discussed in the context of solving large-scale hybrid power flow with NPC and HPC. Test cases of standard IEEE 300-Bus system and modified extra large systems are executed to show the accuracy and the performance of time-saving. The details of results indicate the proposed method for a system with over 10,000 buses compared with PSS/E and Matpower could save about 80% and 90% computing time separately with the same sequential iteration method, and the test of multi-threads demonstrates that 24-32 threads have the best performance which saves 81.12% for NPC and 37.16% for HPC. APPENDIX

[2]

[3]

[4]

[5]

[7]

[8]

[9]

[10]

[11]

[12]

𝑅 𝐼 𝑃𝐷𝐶𝑅 , 𝑃𝐷𝐶𝐼 , 𝑉𝐷𝐶 , 𝑉𝐷𝐶 , 𝐼𝐷𝐶

The proof that could be got from P-V control and I-V control is shown in this section. 𝐼 For the first strategy, 𝑃𝐷𝐶𝑅 and 𝑉𝐷𝐶 are given, then we have:

I DC =

(V )

2 I CD

+ 4 PDCR RDC

(22)

2 RDC

PDCI = V I

I DC DC

=V

I DC

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I −VDC +

(V )

2 I CD

+ 4PDCR RDC

2 RDC

𝑅 𝑃𝐷𝐶𝑅 , 𝑃𝐷𝐶𝐼 , 𝑉𝐷𝐶

are solved. Thus,

REFERENCES

Shown in Fig.5, both NPC and HPC are promoted by the increase of threads from 1-32 because all the info of independent node and edge could be calculated parallel which saves 81.12% time, and right-looking method is executed which saves 37.16% time. However, the results stop improving from 32-128 threads, even deteriorates a little. The reason is that the overhead time in calling CPU threads keeps raising because of excesses or indirect computation time, like memory, bandwidth or other resources required to perform specific tasks. When multi-threads are being used, the rise of overhead time is more significant than the time saved. In our method, for a large power system over 10,000 buses, the ideal threads in use is between 24-32.

I −VDC +

(24)

+ 4 PDCR RDC

[13]

[14]

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