Lu et al. from Texas Tech University present an accurate rela- .... obtained the B.Tech degree in electronics and communication engineering from ... Dr. Pavan is the recipient of the IEEE Circuits and Systems Society Darlington Best Paper.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 60, NO. 5, MAY 2013
1101
Guest Editorial Special Section on the 2012 IEEE International Symposium on Circuits and Systems (ISCAS 2012) This special section of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—PART I: REGULAR PAPERS consists of expanded
versions of 15 papers presented at the International Symposium on Circuits and Systems, held in Seoul, Korea, in May 2012. The papers are briefly described below. The guest editors thank the authors for their contribution and the reviewers for their prompt feedback. I. ANALOG, MIXED-SIGNAL, AND CAD PAPERS Lu et al. from Texas Tech University present an accurate relative temperature sensor front-end based on subthreshold-MOSFETs. Accuracy is achieved using dynamic element matching and offset cancellation, which minimize errors induced by device mismatch. Matsuno et al. from Toshiba Corporation propose a new all-digital background calibration technique for time interleaved analog-to-digital converters. Reduced system complexity is achieved using pseudo-aliasing signals. Vasan et al. from Iowa State University show how low distortion sinusoids can be generated using weighted summation of waveforms from phase shifted oscillators. Their techniques were demonstrated through the generation of sine waves with 100 dB THD using low cost components. Trakimas et al. from Tufts University presents the design and implementation of an analog-to-information converter (AIC) capable of Nyquist and compressed sensing modes of operation Measurement results of the AIC demonstrate an effective bandwidth of 25 MHz, which is 5 greater than Nyquist-sampling rate with an improved effective FOM of 12.2 fJ/conversion-step for signals with sparse frequency support. Jafari et al. from the University of Toronto demonstrate lownoise bidirectional current acquisition circuits for interfacing with electrochemical amperometric biosensor arrays. The circuits employ chopper stabilization to reduce flicker noise. Lu et al. from the University of Tennessee propose a time-domain bulk-tuned offset cancellation technique and apply it to a low-power high-precision dynamic comparator to reduce its input referred offset with minimal additional power consumption and delay. In the last paper in this section, Seth et al. from Stanford University present an approach to optimize a nested-Miller compensated, three-stage operational transconductance amplifier (OTA) for use in switched-capacitor (SC) circuits. II. RF & POWER MANAGEMENT Kim et al. from Samsung study resonant inductive coupling and the use of a Resonator Isolation (RI) system. They derive Digital Object Identifier 10.1109/TCSI.2013.2258101
models for a communication channel based on these principles and discuss a chip level implementation. Zhao et al. from Tsinghua University present a fast-settling phase-locked loop (PLL) frequency synthesizer for a wireless sensor network. They describe several techniques for lowering the power consumption, and give experimental results from a test chip fabricated in 0.18 um CMOS. Cho et al. from KAIST describe an ultra-low power wake-up receiver for a body channel communication (BCC) implemented in a 130 nm CMOS process. Injection-locking is exploited to lower power consumption. As a result, the proposed wake-up receiver achieves a sensitivity of 62.7 dBm at a data rate of 200 kbps while consuming only 37.5 uW from a 0.7 V supply. Li et al. from Fudan University demonstrate a low-noise triple band transmitter for GSM quad-band and WCDMA. A three-step calibration algorithm is proposed to suppress carrier leakage to 65 dBm. Novel linearization methods are used in the low-pass filter and the driver power amplifier to meet the demand of 3G systems. Grave et al. from IEMN-ISEN, France present the theoretical analysis and simulation results of an IF to DC subsampler for 60 GHz heterodyne receivers. Down-conversion, channel filtering and IQ demodulation are merged into a unique operation at no extra cost in terms of area and power consumption. The proposed architecture is validated by simulations and complies with the requirements of the standards for 60 GHz wireless communications. In the last paper in this section, Chan and Mok describe the principles behind a digital sensor to measure inductor current in a DC-DC converter, where the current sensing and quantization are combined into one functional block. Experimental results from an 8-bit digital inductor current sensor designed and fabCMOS process, are given. ricated in UMC’s 0.13 III. MEMRISTIVE COMPUTING AND MARKOVIAN JUMP SYSTEMS Shin et al. from the University of California at Santa Cruz propose memristor based resistive logic computation units. Bipolar signal multiplication of an input and a stored reference bit is performed by unipolar memristor devices and control switches, demonstrating a fast and highly sensitive pattern recognition for complex inputs. Last but not the least, Zhang et al. from the Nanjing University of Science and Technology and the University of Western Sydney study the design of mode-dependent and mode-independent filters for continuous-time linear Markovian jump systems (MJSs) with time-varying delays. Delay-dependent conditions for the analysis of stochastic stability and extended dis-
1549-8328/$31.00 © 2013 IEEE
1102
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 60, NO. 5, MAY 2013
sipativity for MJSs with time-varying delays are obtained by using a mode-dependent Lyapunov-Krasovskii functional together with a novel integral inequality. The efficacy of the proposed methods is substantiated with three examples.
HENRY CHUNG, Guest Editor City University of Hong Kong Hong Kong, China
SHANTHI PAVAN, Guest Editor Indian Institute of Technology Madras, India
MING DER SHIEH, Guest Editor National Cheng Kung University Tainan, Taiwan
WOUTER SERDIJN, Guest Editor Delft University of Technology Delft, The Netherlands
YOUNG HWAN KIM, Guest Editor Pohang University of Science and Technology Pohang, Korea
Shanthi Pavan obtained the B.Tech degree in electronics and communication engineering from the Indian Institute of Technology, Madras, in 1995 and the M.S and Sc.D degrees from Columbia University, New York, in 1997 and 1999 respectively. From 1997 to 2000, he was with Texas Instruments in Warren, NJ, USA, where he worked on high speed analog filters and data converters. From 2000 to June 2002, he worked on microwave ICs for data communication at Bigbear Networks in Sunnyvale, CA, USA. Since July 2002, he has been with the Indian Institute of Technology-Madras, where he is now a Professor of Electrical Engineering. His research interests are in the areas of high speed analog circuit design and signal processing. Dr. Pavan is the recipient of the IEEE Circuits and Systems Society Darlington Best Paper Award (2009), the 2012 Shanti Swarup Bhatnagar Award in Engineering Sciences (from the Government of India), the Swarnajayanthi Fellowship (from the Government of India), the Young Faculty Recognition Award from IIT Madras (for excellence in teaching), the Technomentor Award from the India Semiconductor Association and the Young Engineer Award from the Indian National Academy of Engineering (2006). Dr. Pavan has served on the editorial board of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS: PART II—EXPRESS BRIEFS, and is currently the Deputy Editor-in-Chief of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS: PART I—REGULAR PAPERS. He serves on the technical program committee of the International Solid State Circuits Conference (ISSCC), and is a fellow of the Indian National Academy of Engineering (INAE).
Wouter A. Serdijn (M’98–SM’08–F’11) was born in Zoetermeer (“Sweet Lake City”), The Netherlands, in 1966. He received the M.Sc. (cum laude) and Ph.D. degrees from Delft University of Technology, Delft, The Netherlands, in 1989 and 1994, respectively. His research interests include low-voltage, ultra-low-power and ultra wideband integrated circuits and systems for biosignal conditioning and detection, neuroprosthetics, transcutaneous wireless communication, power management, and energy harvesting as applied in, e.g., hearing instruments, cardiac pacemakers, cochlear implants, portable, wearable, implantable, and injectable ExG recorders and neurostimulators. He is co-editor and co-author of the books Ultra Low-Power Biomedical Signal Processing: An Analog Wavelet Filter Approach for Pacemakers (Springer, 2009), Circuits and Systems for Future Generations of Wireless Communications (Springer, 2009), Power Aware Architecting for Data Dominated Applications (Springer, 2007), Adaptive Low-Power Circuits for Wireless Communications (Springer, 2006), Research Perspectives on Dynamic Translinear and Log-Domain Circuits (Kluwer, 2000), Dynamic Translinear and Log-Domain Circuits (Kluwer, 1998) and Low-Voltage Low-Power Analog Integrated Circuits (Kluwer, 1995). He authored and co-authored 6 book chapters and more than 250 scientific publications and presentations. He teaches Circuit Theory, Analog Signal Processing, Micropower Analog IC Design, and Bioelectricity. He received the Electrical Engineering Best Teacher Award in 2001 and 2004. He has served, a.o., as Technical Program Chair for IEEE BioCAS 2010 and as Technical Program Chair for IEEE ISCAS 2010 and 2012, as a member of the Board of Governors (BoG) of the IEEE Circuits and Systems Society (2006–2011), as chair of the Analog Signal Processing Technical Committee of the IEEE Circuits and Systems society, as a member of the Steering Committee of the IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS (T-BIOCAS) and as Editor-in-Chief for IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS (2010–2011). He will be General Co-Chair for IEEE BioCAS 2013, TPC Co-Chair for IEEE ISCAS 2014, and General Co-Chair for IEEE ISCAS 2015. Wouter A. Serdijn is an IEEE Fellow, an IEEE Distinguished Lecturer, and a mentor of the IEEE.
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 60, NO. 5, MAY 2013
1103
Henry Shu-hung Chung (M’95–SM’03) received his B.Eng. degree in 1991 and Ph.D. degree in 1994 in electrical engineering, both from The Hong Kong Polytechnic University. Since 1995 he has been with the City University of Hong Kong (CityU). He is currently professor of the Department of Electronic Engineering and Director of the Centre for Smart Energy Conversion and Utilization Research. His research interests include time- and frequency-domain analysis of power electronic circuits, switched-capacitor-based converters, random-switching techniques, control methods, digital audio amplifiers, soft-switching converters, and electronic ballast design. He has authored six research book chapters, and over 300 technical papers including 140 refereed journal papers in his research areas, and holds 25 patents. Dr. Chung is currently Chairman of Technical Committee on High-Performance Emerging Technologies of the IEEE Power Electronics Society, and Associate Editor of the IEEE TRANSACTIONS ON POWER ELECTRONICS and IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—PART I: FUNDAMENTAL THEORY AND APPLICATIONS.
Ming-Der Shieh received the B.S. degree in electrical engineering from National Cheng Kung University, Taiwan, in 1984, the M.S. degree in electronic engineering from National Chiao Tung University, Taiwan, in 1986, and the Ph.D. degree in electrical engineering from Michigan State University, East Lansing, MI, USA, in 1993. From 1988 to 1989, he was an engineer at United Microelectronic Corporation, Taiwan. After receiving the Ph.D. degree, he joined the Department of Electronic Engineering, National Yunlin University of Science & Technology as Associate Professor. He has received teaching awards from NYUST in 1998 and was the department chairman from 1999 to 2002. Since 2002, he has been with the Department of Electrical Engineering, National Cheng Kung University, where he is currently a professor. His research interests include VLSI design and testing, VLSI for signal processing, digital communication, and computer-aided design. Dr. Shieh was the program co-chair and general co-chair of Asian Test Symposium in 2004 and 2009, respectively. He was also the chairman of Tainan Chapter (2009–2010), IEEE Circuits and Systems Society and the associated editor of IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—PART I: REGULAR PAPERS (2010–2012). He serves as the technical committee member in several international conferences. Dr. Shieh joined Information and Communications Research Laboratories (ICL) of Industrial Technology Research Institute (ITRI) in February 2010, and is now the deputy general director of ICL.
Young Hwan Kim received the B.E. degree in electronics in 1977 from the Kyungpook National University, Korea, and M.S. and Ph.D. degrees in electrical engineering in 1985 and 1988 from the University of California, Berkeley, CA, USA. From 1977 to 1982, he was with the Agency for Defense Development, Korea, where he was involved in various military research projects, including the development of auto-pilot guidance and control systems. From 1983 to 1988, he worked as a Post Graduate Researcher, developing VLSI CAD programs at the Electronic Research Laboratory of the University of California, Berkeley. Since his graduation in 1988, he has worked at the Division of Electronic and Computer Engineering at POSTECH, Korea, where he is currently a Professor. His research interests include the design of plasma and liquid crystal display systems, MPSoC and GPGPU system design for display and computer vision applications, statistical analysis and design technology for deep-submicrometer semiconductor devices, and power noise analysis. He has served as an editor of the Journal of the Institute of Electronics Engineers of Korea, and as a General Chair and a committee member of various international and Korean domestic technical conferences, including International SoC Design Conference and IEEE ISCAS 2012.
