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Abstract—Distribution of precise time reference in an Ethernet network allows the implementation of distributed measurement systems, overcoming the ...



IEEE 1588-Based Synchronization System for a Displacement Sensor Network Paolo Ferrari, Member, IEEE, Alessandra Flammini, Member, IEEE, Daniele Marioli, Member, IEEE, and Andrea Taroni, Member, IEEE

Abstract—Distribution of precise time reference in an Ethernet network allows the implementation of distributed measurement systems, overcoming the limitations of a complex architecture. This paper deals with a displacement sensor network that is built over Ethernet and synchronized according to IEEE 1588. Measurement devices share the same time reference, enabling accurate calculation of cross-derived quantities (multidimensional speed and acceleration). In this paper, a description of the sensor architecture is given, and attention is focused on the IEEE 1588 implementation. In particular, the proposed low-cost system does not use any dedicated synchronization hardware, but it can reduce the deviation from time reference down to 20 µs. Index Terms—Differential variable reluctance transducer (DVRT), displacement sensor, Ethernet, IEEE 1588, sensor network, smart sensor.



ODAY, industrial manufacturing makes use of in-process measuring devices to finely adjust production parameters and, consequently, to improve overall quality. A modern tool machine is equipped with dozens of sensors connected by means of an industrial network (i.e., a fieldbus network) [1]. Generally, the sampling rate of sensor outputs (i.e., the sampling rate of the primary quantities) is kept high to allow better estimation of derived quantities. For instance, displacement sensors are also used to estimate speed and acceleration. Currently, among the displacement sensors available on the market, the linear variable differential transformer (LVDT) and differential variable reluctance transducer (DVRT) are characterized by high accuracy, high speed, and low cost. Many commercial measuring devices simultaneously manage several LVDTs and DVRTs, and some solutions have been proposed to enhance both the accuracy and sampling rate of such systems [2]–[4]. Unfortunately, the time relations between the measures of different sensors are valid only within a single measuring device. This means that measurements from different measuring devices cannot be combined (with an acceptable error) to obtain derived quantities, such as speed or momentum. As a result, coordination between different machines is difficult and requires extra time to be spent to assure safety during the handover of workpieces. Manuscript received July 15, 2006; revised September 20, 2007. The authors are with the Department of Electronics for Automation, University of Brescia, 25123 Brescia, Italy (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at Digital Object Identifier 10.1109/TIM.2007.909471

Fig. 1. Sample application of a displacement sensor network. Online measurement of a long workpiece.

The introduction of a synchronization method to distribute a unique time reference in a measuring network is a very interesting topic [5]. If a synchronization method among different measuring devices is provided, new interesting objectives can be pursued, e.g., the measure of vibrations, dumping of vibrations, multidimensional speed, and acceleration estimation for advanced positioning strategies. Standard industrial communication systems based on traditional fieldbuses generally do not offer strong support to hard synchronization. Some technology providers offer a synchronized version of their communication protocols by means of a proprietary method, as in [6]. Recently, new real-time industrial communication systems based on Ethernet, known as the so-called real-time Ethernet, are going to be standardized by IEC SC65C (document IEC61784-2). Fortunately, such new standards use IEEE 1588 (now IEC 61588) to distribute time. IEEE 1588 defines the Precision Time Protocol (PTP) [7] to synchronize “clocks” over the network. Any device that deals with time is considered as a “clock,” and the standard introduces algorithms to elect the “master clock.” IEEE 1588 is limited to a few subnetworks with a target synchronization accuracy of less than 1 µs. It should be remarked that the wellknown Network Time Protocol [8] can operate over a large network (also Internet), but it can only reach accuracy on the order of some milliseconds. The objective of this paper is to apply IEEE 1588 over an Ethernet in a network of measuring devices equipped with displacement sensors, as shown in Fig. 1. Each measuring

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Fig. 2. Block diagram of the proposed measuring device. Each codec can manage up to two displacement sensors. The DSP is connected to a fast Ethernet network and has an auxiliary 1-PPS output. Fig. 3. Schematic of a DVRT with its usual excitation.

station can share its displacement measurements and their respective precise time reference over the network. In Fig. 1, a possible application is presented: Collection of data over a long workpiece (e.g., a turbine shaft) can enable online estimation of dimensional errors and measurement of vibrations generated by working tools. The performance of the proposed system will be investigated in terms of synchronization accuracy, which can have a direct impact on the calculation of derived quantities.

II. S ENSOR A RCHITECTURE The basic block of the proposed system is a multisensor displacement-measuring device whose internal architecture is illustrated in Fig. 2. The core of the system is a floatingpoint digital signal processor (DSP) TMS320C6711 from Texas Instruments. It operates at 150 MHz with a peak execution rate of 900 MFLOPS since it can elaborate up to eight 32-bit instructions per cycle. This high computational power is enough to implement both measuring algorithms and communication tasks. The electronics hardware architecture is completed by a PCM3003 codec by Burr–Brown (Σ∆ stereo codec with up to 20 bits and a maximum sampling rate of 48 ksample/s) interfaced via the Inter IC Sound (I2 S) bus: a Fast Ethernet interface (100 Mb/s) by Macronix. Up to 11 codecs can be chained to expand the system. The system has been assembled using a DSP demo board (TMS320C6711 DSK) and two expansion daughterboards (ETH6000 and PCM3003 Audio Daugthercard).

to the displacement m(t), i.e., Vo (t) = m(t) · A · cos(2πfc t + ϕ)


where ϕ is a roughly constant term due to the position (ideally, ϕ = 0 or ϕ = π according to the core position with respect to the null point) and sensor characteristics, such as coil losses and nonlinearity. Usually, fC is on the order of 10 kHz to prevent sensor overheating and to ensure good performances. Two basic methods are available to estimate m(t): 1) the ratio-based method [3] and 2) the synchronous demodulation method [2]. The former evaluates the amplitude quotient |VO (t)|/|E(t)|, but it is greatly influenced by noise, whereas the latter method treats an output signal as in double-sideband suppressed-carrier amplitude modulation. This paper uses a DSP-based coherent sampling and spectral analysis method derived from the synchronous demodulation. This method, which takes less than 500 µs to estimate the position, has been applied to a multiple DVRT configuration (with 11 measuring probes) with a resolution of 0.02% fs in the range of ±500 µm [4]. In the proposed implementation, each displacement sensor is driven by a channel of the codec digital-to-analog converter and sampled by a channel of the codec analog-to-digital converter. Thus, each codec placed in the system can handle up to two displacement sensors. The codec resolution has been set to 16 bits. B. IEEE 1588 Stack Overview

A. Displacement Sensors and the Measuring Algorithm DVRTs, which are used in this paper, and LVDTs are quite similar displacement sensors. LVDTs are widely used due to their high resolution and good characteristics in terms of linearity, robustness, and repeatability. On the other hand, when a special multisensor arrangement is needed because of dimensional constrains or a hostile environment, DVRTs are preferred since they have smaller dimensions (less than 70% those of the LVDT). DVRT exploits the differential autoinductance variation between its two coils to measure cursor (core) displacement. Usually, DVRTs are connected as shown in Fig. 3, where E(t) = A · cos(2π · fC · t) is a sinusoidal excitation signal. The voltage Vo (t) at the center tap is proportional

IEEE 1588 over Ethernet is implemented using the User Datagram Protocol/Internet Protocol (UDP/IP); the UDP/IP stack has been developed, starting from the Network Developer’s Kit libraries and the DSP/BIOS, by Texas Instruments. Several improvements have been done to enable real-time performance and to directly control hardware timers. The IEEE 1588 PTP has four types of protocol message. 1) SYNC: Message from the master clock to the slave clocks, broadcasted at fixed intervals of time called “Sync intervals.” Each SYNC message carries the SYNC transmission time stamp TSYNC,Mk in the master clock time reference for the kth Sync interval. It is received at time TSYNC,Sk in the slave clock time reference.



2) FOLLOW-UP: Message from the master clock to the slave clocks, optionally broadcasted after each SYNC message: It carries the accurate SYNC transmission time stamp TSYNC,Mk . This kind of message is used by systems that can obtain the transmission time stamp after the packet has been sent. 3) DELAY_REQ: Message from a slave clock to the master clock, sporadically sent at time TDREQ,Sn in the slave time reference for the nth request. It is a part of the process of estimating the delay of the network path between the master and the slave. 4) DELAY_RES: Message from the master clock to a slave clock, sent as a response to a specific DELAY_REQ. It contains the accurate reception time stamp TDREQ,Mn , in the master clock time reference, of the last received DELAY_REQ. Considering these time stamps, each slave can calculate the time offset OSk between its time reference and the master clock time reference, starting from the following relations: TSYNC,Sk = TSYNC,Mk + OSk + DM→Sk




where DM→Sk is the propagation delay of the kth SYNC message from master to slave, and DS→Mn is the propagation delay of the nth DELAY_REQ message from slave to master. Supposing that delay is identical in the two directions (DS→Mn = DM→Sk = D), it yields D = ((TSYNC,Sk − TSYNC,Mk ) +(TDREQ,Mn − TDREQ,Sn )) /2 OSk = TSYNC,Sk − TSYNC,Mk − D.

(4) (5)

Offset calculation takes place every Sync interval; suitable techniques should be applied to avoid jumps (step variations) in the slave clock value. In an Ethernet/Internet connection, the delay depends on network topology, traffic, router/switch queues delay, etc.; thus, it is not constant, and generally, DS→Mn = DM→Sk . Conversely, delay D in many industrial systems is mainly due to the network topology, and therefore, it could be considered as a constant; it is sporadically estimated when the DELAY_REQ is sent. The behavior of IEEE 1588 in switched networks under a high network load is unpredictable [9], [10], but the considered network has a very low small-packet traffic. C. IEEE 1588 Stack Implementation To keep the time shift between the master and the slave as low as possible, a drift compensation for the local oscillator must be introduced. The slave time deviation between two consecutive SYNC messages is due to the local oscillator deviation from the nominal value (i.e., ideal unitary slope); knowing the Sync interval duration from two consecutive SYNCs (Sync_interval = TSYNC,Mk − TSYNC,Mk−1 ), a simple estimation of average

drift ρ can be calculated by each slave with the following equation: 1  (TSYNC,Sk − TSYNC,Sk−1 ) −1 r (TSYNC,Mk − TSYNC,Mk−1 ) r



(OSk − OSk−1 ) 1 r (TSYNC,Mk − TSYNC,Mk−1 ) r




where r is the number of the Sync intervals considered for the average. When IEEE 1588 over Ethernet is used, time stamps should be related to the last bit of the start-of-frame delimiter of the Ethernet packet. This specification requires hardware support to time stamp functions, as described in [11] and [12]. Sometimes, the local clock is realized with an adder, instead of a counter; this enables fine drift compensation to change the increment step [11]–[13]. Generally, if a full software approach is applied, the accuracy could be affected by interrupt latency, stack delays, operating system calls, and, last but not least, the medium-access control (MAC) interface chip. In this paper, due to development board limitation, no hardware support for time stamping is available, so the IEEE 1588 stack has been provided with time stamping inside the MAC interrupt service routines. The local clock for the IEEE 1588 operations is based on the DSP internal free-running timer for the calculation of time intervals; hence, it is affected by the local oscillator drift. A fully software algorithm has been developed to compensate such deviations, without interfering with the timer operation (i.e., the timer is always running). However, a general degradation of the synchronization accuracy is expected. The DSP timer, hereinafter called TMR, is used to capture time stamps; consequently, time stamps are expressed in the TMR time unit. A simple transformation procedure is applied to obtain time stamps TTMRk in nanoseconds, i.e., TTMRk = RAW_VALUETMRk · RTMR


where RTMR = (4/150) µs = 26.67 ns is the TMR resolution for a DSP running at 150 MHz. It should be remarked that all the equations in this section are evaluated by a DSP using 64-bit arithmetics. TMR is read at the beginning of the very low level receiving interrupt routine for incoming SYNC messages (time stamp value TSYNC,TMRk ) and at the end of the transmitting routine for DELAY_REQ messages (time stamp value TDREQ,TMRn ). Equation (6) has been used to continuously estimate the TMR drift (ideal value ρTMR = 0); the new formulation is 1  (TSYNC,TMRk − TSYNC,TMRk−1 ) −1 r (TSYNC,Mk − TSYNC,Mk−1 ) r

ρTMR  =



where, usually, r is in the range of 4 ÷ 64. Practically, a moving average filter with a window size of r has been implemented to supply up-to-date drift estimation. The larger the r, the less sensible to instant variations the estimation will be. The value of



Fig. 4. Slave clock time reference and its phases. During the amortization phase, offset OSk is linearly compensated (bold line). During the normal phase, the slave clock follows the estimated slope (1 + ρTMR ). A step variation can occur (bold dotted line) if no linear amortization is done.

r is chosen by considering both the Sync interval duration and the local oscillator characteristics (e.g., Allan deviation). For a low-cost crystal oscillator, the window size should be in the range of 1–100 s, but considerations about the thermal behavior of the whole system may suggest the reduction of the higher limit to quickly react to transients. The adjustment of the slave clock time reference is obtained, starting from the following algorithm: Step 1) The SYNC arrival time stamp in the IEEE 1588 slave clock time reference is obtained by means of the following equation: ∗ + TSYNC,Sk = TSYNC,Sk−1

(TSYNC,TMRk −TSYNC,TMRk−1 ) . 1 + ρTMR  (9)

This means that time stamp TSYNC,Sk is calculated by adding the delta time measured by TMR (opportunely drift compensated) to the corrected ∗ of the previous SYNC. The time stamp TSYNC,Sk−1 corrected time stamp value is available after step 3. Step 2) The residual offset from the master is evaluated by also considering the transmission delay as in (5), i.e., OSk = TSYNC,Sk − TSYNC,Mk − D.


The offset is verified against the average value of the last 16 offsets; a simple nonlinear filter suppresses any out-of-range value. Note that any advanced smoothing algorithm can be introduced at this point, for instance [11]. Delay D is periodically computed (see the next section) by an independent task that manages DELAY REQ and DELAY_RES messages. Step 3) Now, the corrected time stamp can be calculated as ∗ = TSYNC,Sk − OSk . TSYNC,Sk


After the execution of the previous algorithm, the slave clock time reference must be updated. This

means changing the slave clock time reference to reflect the master clock time reference. The simplest ∗ , introducmethod is to force TSYNC,Sk = TSYNC,Sk ing a step variation to the slave clock, as illustrated (bold dotted line) in Fig. 4. In this case, delay D and drift ρTMR must be correctly estimated; otherwise, the step amplitude is high. Generally, a jump in the time reference can affect the combination of displacement measurements from different devices, increasing the uncertainty. For this reason, a more efficient way of compensating offset has been introduced: A linear amortization process has been applied to smooth offset compensation, as described in [11]–[14]. Referring to Fig. 4, a Sync interval is divided into two phases: 1) the amortization phase and 2) the normal phase. The amortization phase begins just after a SYNC is received and ends after Tamort ; the rest of the Sync interval is the normal phase. In this paper, the duration of the amortization phase is set to Tamort = (Sync_interval)/8, but a shorter Tamort can be used if small offset values are expected. Offset OSk is compensated by varying the slave clock slope during the amortization phase. To prevent time reversal (negative slope) or time freeze (zero slope), the linear compensation of an offset OSk that is greater than (or equal to) Tamort is not admitted. If an offset that is greater than Tamort is found (e.g., during system startup), a step variation in time reference is acceptable since it means that the system is not correctly operating. D. Use of the Time Reference The previous algorithm is executed when a SYNC message arrives. Referring again to Fig. 4, the time stamp (in the slave clock time reference) of a generic event Tgen,S that happens between SYNCs can be calculated with Tgen,S = TSYNC,Sk + ·

(Tgen,TMR − TSYNC,TMRk ) 1 + ρTMR 

Tamort − OSk Tamort





Fig. 5. Test setup of the proposed system. Synchronization accuracy can be measured by means of 1-PPS ports. The displacement measure can be downloaded using Ethernet or the Debug link. TABLE II SYNCHRONIZATION ACCURACY (OFFSET OSk ) BETWEEN TWO MEASURING DEVICES

when in the amortization phase or with ∗ + Tgen,S = TSYNC,Sk

(Tgen,TMR − TSYNC,TMRk ) 1 + ρTMR 


∗ when in the normal phase, where TSYNC,Sk , TSYNC,Sk , and TSYNC,TMRk are referred to the last SYNC, and Tgen,TMR is the value of TMR at the considered event. To decide which phase is the current phase, the DSP evaluates Tgen,TMR , as described in Table I, where Tamort,TMR = Tamort · (1 + ρTMR ), i.e., the drift-compensated value of Tamort . It should be remarked that (12) and (13) can also be applied to extrapolate TDREQ,Sn for delay D estimation. A one-pulse-per-second (1-PPS) output has been provided to externally measure synchronization accuracy. The low-to-high transition of the 1-PPS output occurs when the internal time reference increments the second’s digits. The 1-PPS output is created using the hardware DSP pulse generator loaded with the appropriated period P1s,TMR , i.e.,

P1s,TMR = 1s · (1 + ρTMR ) .


Note that this value is quantized at the TMR resolution RTMR (which is 26.67 ns in this paper) when loaded in the timer period register.

An example of the test system is illustrated in Fig. 5. Four displacement sensors have been mounted on a fixed reference plane. Their probe heads are placed in contact with a moving obstacle that can translate in the x-direction; the distance from the reference is d. Two measuring devices control the sensors. Each device has an Ethernet port connected to the switch and a 1-PPS output connected to the high-accuracy counter (Agilent 53132A with a resolution of 150 ps). System performances can be measured by a monitoring station interfaced with the Ethernet network and with the counter via the General-Purpose Interface Bus. Each measuring device has been programmed to send to the monitoring station the statistics on calculations related to IEEE 1588 (including, for instance, TSYNC,Sk , TSYNC,TMRk , and ρTMR ). The displacement algorithm takes about 400 µs to calculate the position of the two sensors (333 µs for sampling) and less than 100 µs to manage network-related tasks (to build and send a packet). The synchronization accuracy test is executed by measuring the time gap between the 1-PPS outputs of the two measuring devices. The counter has been programmed with a start–stop function, and the devices, in turn, have been forced to be the


Fig. 6. Offset of slave clock B with respect to reference master clock A, as estimated by B. Clock B drifts between SYNCs; then, linear amortization occurs when a new SYNC is received.


as speed, acceleration, and jerk. Complex pattern evaluations and multidimensional estimations can be carried out due to network connectivity that is intrinsically scalable. Ethernet connection and IEEE 1588 support facilitate the integration of the proposed system with the most recent technologies in the field of industrial automation (e.g., real-time Ethernet). The high-performance DSP core can locally manage multiple probes, and at the same time, it can evaluate remote measures to extract derived quantities. A typical measure cycle can be set down to 500 µs in a ten-node network. The synchronization accuracy has been experimentally evaluated: The maximum deviation between any two nodes is less than 20 µs if the IEEE 1588 Sync interval is set to 1 s and the standard deviation (jitter) is less than 5 µs. R EFERENCES

Fig. 7. Drift of slave clock B with respect to reference master clock A, as estimated by B.

IEEE 1588 master clock. The Sync interval has been set to 1 s, parameter r (drift estimation window) is equal to 4, and Tamort is fixed to 125 ms. Considering an Ethernet segment without traffic, the results are shown in Table II. The more important value, from the target-application point of view, is the standard deviation (jitter), which is under 5 µs. Fig. 6 shows the time offset OSk of slave device B with respect to device A. Between SYNCs, the time of device B deviates from the time reference of A, and the offset is partially recovered in the linear amortization phase. It should be remarked that a full offset compensation is not achievable since the line delay is not constant, and the time stamp has poor accuracy with the current implementation. Moreover, the drift value of the local oscillator of measuring device B, when measuring device A is set as the master clock, is reported in Fig. 7. Drift average value ρTMR  = +239 ppm shows that the local oscillator of device B is faster than the oscillator of device A. IV. C ONCLUSION In conclusion, the IEEE 1588 Protocol over Ethernet has been used to synchronize a network of displacement sensors. The precise time reference of the proposed network allows the estimation of mechanical quantities derived from position, such

[1] G. Cena, L. Durante, and A. Valenzano, “Standard field bus networks for industrial applications,” Comput. Stand. Interfaces, vol. 17, no. 2, pp. 155–167, Jan. 1995. [2] R. M. Ford, R. S. Weissbach, and D. R. Loker, “A novel DSP-based LVDT signal conditioner,” IEEE Trans. Instrum. Meas., vol. 50, no. 3, pp. 768– 773, Jun. 2001. [3] R. Pallas-Areny and J. G. Webster, Sensors and Signal Conditioning. New York: Wiley, 1991. [4] A. Flammini, D. Marioli, E. Sisinni, and A. Taroni, “A multichannel DSPbased instrument for displacement measurement using differential variable reluctance transducer,” IEEE Trans. Instrum. Meas., vol. 54, no. 1, pp. 178–183, Feb. 2005. [5] J. C. Eidson and K. Lee, “Sharing a common sense of time,” IEEE Instrum. Meas. Mag., vol. 6, no. 1, pp. 26–32, Mar. 2003. [6] PROFIBUS International, PROFIdrive Profile V4.0, Aug. 2005. [Online]. [7] Standard for a Precision Clock Synchronization Protocol for Networked Measurement and Control Systems, 2002. IEEE Std. 1588. [8] D. L. Mills, Network Time Protocol, 1992. (Version 3), RFC1305. [9] T. Muller and K. Webber, “Impact of switch cascading on time accuracy,” in Proc. Workshop IEEE 1588, Sep. 2003, pp. 91–94. [10] J. Jasperneite, K. Shehab, and K. Weber, “Enhancements to the time synchronization standard IEEE-1588 for a system of cascaded bridges,” in Proc. IEEE Int. Workshop Factory Commun. Syst., Sep. 2004, pp. 239–244. [11] R. Holler, T. Sauter, and N. Kero, “Embedded SynUTC and IEEE 1588 clock synchronization for industrial Ethernet,” in Proc. IEEE Conf. Emerging Technol. Factory Autom., Sep. 16–19, 2003, vol. 1, pp. 422–426. [12] H. Weibel and A. Dreher, “High precision clock synchronization with IEEE 1588,” Industrial Automation Asia, pp. 32–37, Oct./Nov. 2004. [13] S. Balasubramanian, K. Harris, and A. Moldovansky, “A frequency compensated clock for precision synchronization using IEEE 1588 protocol and its application to Ethernet,” in Proc. Workshop IEEE 1588, Sep. 2003, pp. 91–94. [14] K. Schossmaier, U. Schmid, M. Horauer, and D. Loy, “Specification and implementation of the universal time coordinated synchronization unit (UTCSU),” J. Real-Time Syst., vol. 12, no. 3, pp. 295–327, May 1997.

Paolo Ferrari (S’02–A’03–M’04) was born in Brescia, Italy, in 1974. He received the M.Sc. degree (with honors) in electronic engineering and the Ph.D. degree in electronic instrumentation from the University of Brescia in 1999 and 2003, respectively. He is currently a Researcher with the Department of Electronics for Automation, University of Brescia. His research interests are signal conditioning and processing for embedded measurement instrumentation, smart sensors, sensor networking, real-time Ethernet, and fieldbus applications.



Alessandra Flammini (M’99) was born in Brescia, Italy, in 1960. She received the M.Sc. degree (with honors) in physics from the University of Rome, Rome, Italy, in 1985. From 1985 to 1995, she worked on industrial research and development of digital drive control. She is currently with the Department of Electronics for Automation, University of Brescia, where she was a researcher from 1995 to 2003 and has been an Associate Professor since 2002. She teaches several courses about measurements in industrial environments, digital electronics, and microprocessor-based systems. Her research interests are the design of methods and digital electronic circuits for numeric measurement instrumentation, sensor signal processing, smart sensor networking, and fieldbus applications, with particular attention to real-time Ethernet protocols.

Daniele Marioli (M’04) was born in Brescia, Italy, in 1946. He received the M.Sc. degree in electrical engineering from the University of Pavia, Pavia, Italy, in 1969. He is currently with the Department of Electronics for Automation, University of Brescia, where he was an Associate Professor of applied electronics from 1984 to 1989 and the Director from 1993 to 2004 and has been a Full Professor of applied electronics since 1989. His research interests are the design and experimentation of analog electronic circuits for the processing of electrical signals from transducers, with particular regard to S/N ratio optimization.

Andrea Taroni (M’04) was born in Cotignola, Ravenna, Italy, in 1942. He received the M.Sc. degree in physics from the University of Bologna, Bologna, Italy, in 1966. From 1971 to 1986, he was an Associate Professor with the University of Modena and Reggio Emilia, Reggio Emilia, Italy. He is currently with the University of Brescia, Brescia, Italy, where was the Dean of the Faculty of Engineering from 1993 to 2003 and has been a Full Professor of electrical measurements since 1986 and the Director of the Department of Electronics for Automation since 2004. He has done extensive research in the field of physical quantities sensors and electronic instrumentation, developing both original devices and practical applications.

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