Metal gate work function adjustment for future CMOS technology ...

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Metal Gate Work Function Adjustment for Future CMOS Technology. Qiang Lu, Ronald Lin, Pushkar Ranade, Tsu-Jae Ring, Chenming Hu. Dept. of Electrical ...
5A- 1 Metal Gate Work Function Adjustment for Future CMOS Technology Qiang Lu, Ronald Lin, Pushkar Ranade, Tsu-Jae Ring, Chenming Hu Dept. of Electrical Engineering and Computer Sciences,University of California,Berkeley, CA 94720, USA Phone: (510) 643-2638, Fax: (510) 643-2636, E-mail: [email protected]

ABSTRACT

DEVICE CHARACTERIZATION

CMOS transistors were fabricated using a single metal, (1 10)MO, as the gate material. (1 10)-MOshows high work function value that is suitable for PMOSFETs, and, with nitrogen implantation, its work function can be reduced to meet the requirements of NMOSFETs. The change in MO work function can be controlled by the nitrogen implant parameters, which is potentially useful for multiple-VTtechnology. TEM and EDS analysis show that MO gate electrodes are stable after undergoing a conventional CMOS process.

INTRODUCTION Poly-Si has been used as the MOSFET gate material for decades. However, as CMOS devices are scaled into the sub-100 nm regime, poly-Si gate technology issues such as gate depletion and boron penetration become more problematic. Furthermore, poly-Si has been reported to be incompatible with a number of high-k gate-dielectric candidates. Therefore, metal gate technology has been proposed for sub-100nm CMOS devices. In order to maintain the appropriate threshold voltages for shortchannel CMOS devices, it is necessary to achieve two gate work functions similar to those of n+ and p+ poly-Si. For novel structures such as the double-gate MOSFET, an intermediate work function corresponding to midgap in Si is required. A dual-metal-gate conventional CMOS process has previously been demonstrated [ 11. The conventional process is simpler than a gate-last process, but both face the significant challenge of selectively removing gate material without damaging the underlying gate dielectric. Clearly, an ideal metal-gate .technology should achieve separately optimized work functions for NMOSFETs and PMOSFETs using only a single deposited metal film, in a manner similar to that used for poly-Si gate technology. This will require a means to adjust the work function of

the metal. Recently, MO has been demonstrated as a gate metal for PMOSFETs, compatible with several post-Si02 gate dielectrics [2]. It has also been shown that the work functim of MO can be modulated by nitrogen implantation [3]. Therefore, MO is an attractive candidate material for achieving adjustable work function. In this work, we present the first demonstration of this concept.

DEVICE FABRICATION CMOS devices were fabricated on p-type (100) Si wafers. After n-well formation and LOCOS isolation, gate dielectrics were deposited and then 650 8, MO gate was sputter-deposited. An extra lithography step was performed to cover the PMOS gate, and a nitrogen implant of 5x10’’ cm-’ dose was applied to the NMOS gate area. In this experiment, two implant energy splits corresponding to RP values of 1/2 and 1/3 the MO gate thickness were evaluated. After stripping the photoresist, 1000 8, in-situ n+ doped poly-Si was deposited on top of the MO gate. Device cross sections after key steps are illustrated in Fig. 1. Gate patterning was done by I-line lithography, followed by a two-step gate etch, in which the poly-Si cap layer was etched by C12 reactive ion etch (RIE), and the MO layer was etched by C12-02based RIE. The source and drain regions were formed by 3’P and I’B implantation for NMOSFET and PMOSFETs, respectively. An 800°C furnace anneal was used for dopant activation. The back-end processes consisted of low-temperature oxide deposition, A1 metallization and forming-gas anneal.

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The repoited vacuum work function of MO varies with microstructure. In order to obtain the high work function required for PMOS, colunuiar growth of MO at the MO - gate dielectric interface with a (1 10) oiientation is necessary [3]. Figure 2 (a) shows an SEM cross section of a control MO MOS stack, and figure 2 (b) shows a high-resolution TEM of the actual MOSFET gate stack after full CMOS processing. In both cases, the columnar morphology of MO can clearly be seen, and the top and bottom interfaces of the gate dielectric are clean and uniform. X-ray diffraction (XRD) analysis of the MO gate is shown in Figure 3, confirming the (1 10) orientation is achieved. Annealing affects the stress state of the film, causing the peak to shift slightly. Energy dispersion spectroscopy (EDS) analysis was performed to check the elemental composition of the gate and stack. Quantitative results by the Cliff-Lorimer technique show that only MO and Si are detected in the gate and substrate, respectively. The C-V characteristics of CMOS devices from two different wafers with different nitrogen implant energy are shown in Figures 4 and 5. Gate depletion effects are clearly eliminated in all cases. A quantum-mechanical simulator was used to fit the C-V data and to extract the gate work function, assuming negligible VFB shift due to fixed charge [4]. The nitrogen implantation range RP in MO was simulated by TRIM (IBM Theoretical Ranges oflons in Mutter) and relevant results are summarized in Table 1. The unimplanted MO gate work functions (@,) for PMOSFETs were identical for both CMOS wafers, as expected. A significant shift in work function, SQm, between PMOSFET and nitrogen-implanted NMOSFET on the same wafer is obtained. This shift is attributed to the nitrogen implantation, since both devices are on the same wafer and other factors that may affect @ ,,, should cancel. The magnitude of the shift is dependent on the implantation energy, and it should be possible to increase ScPmby optimizing the nitrogen implant parameters. Figure 6 shows the IDS - VDs curves for transistors on the wafer which received a 29 keV nitrogen implant. Normal transistor characteristics are observed. The NMOS threshold voltage is high, but this can be remedied by changing the VTadjust channel implant. The IDS - VGscharacteristics shown in Figure 7 for transistors on the wafer which received a 15 keV nitrogen implant show good turn-off behavior for both NMOS and PMOS devices. Although the device performance is not yet optimized, it is clear that a single-metal dualwork function gate technology is achieved for CMOS transistors by nitrogen implantation.

CONCLUSION Dual-gate-work-function CMOS devices were successfully fabricated with a single gate metal with a process similar to the dualpoly-Si process. (110) MO provided the desired high gate work function for PMOSFETs. With nitrogen implantation, the work function of Mo is lowered so as to be suitable for NMOSFETs. This single-metal dual-work-function gate technology provides a potential solution not only for future CMOS technology but also for multipleVT technologies for low-power devices or system-on-chip.

ACKNOWLEDGMENT Device fabrication was performed in the Microfabrication Laboratory at U. C. Berkeley and HR-TEM was conducted by AMER, Inc.

2001 Symposium on VLSl Technology Digest of Technical Papers

REFERENCES

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[l]. Q. Lu et al., “Dud-metal gate technology for deepsubmicron CMOS transistors,” Symp. on VLSI Tech., pp, 72-73,2000, [2]. Q. Lu et al., “Molybdenummetal gate MOS Technology for post-Si02 gate dielectrics.” IEDM Tech. Dig., pp. 641-644.2000. [3]. P. Ranade et al. “Molybdenum as a gate electrode for deep-submicron CMOS technology”, MRS Symp., v. 611, Spring 2000, San Francisco. [4]. K. Yang et al, “Quantum effect in oxide thicbess determinationfrom capacitance measurement”, Symp. on VLSI Tech., pp. 77-8 , 1999.

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2001 Symposium on VLSI Technology Digest of Technical Papers

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