Microprocessor Laboratory CS/EE 551 M68HC11 Instruction Set ...

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Lecture 5: M68HC11 Microcontroller (cont). Lecture 5 (CJM), Page 2. M68HC11 Instruction Set. • M68HC11 can execute all MC6800/1 instructions. • Unlike the ...
Microprocessor Laboratory CS/EE 551

M68HC11 Instruction Set • M68HC11 can execute all MC6800/1 instructions. • Unlike the MC6800/1, the M68HC11 contains a second 16-bit index register (Y) and some additional 90 instructions. • Total number of instruction is greater than 256.

Lecture 5: M68HC11 Microcontroller (cont)

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The Prebyte

Instruction Types

• While most opcodes are a single byte, some opcodes are two bytes. • A few hex numbers were reserved to indicate that the following byte is also part of the opcode. • These reserved numbers are called prebytes.

• Data movement • Arithmetic, multiply, divide, and logic • Data test and bit manipulation • Shift and rotate • Condition code register (CCR) • Branch, jump, and subroutine calls. • Stack pointer and index register • Interrupt handling • Miscellaneous

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Load and Store •Load and store instructions are used to move data to (from) registers from (to) memory.

Clear

•Load instructions are: LDAA, LDAB, LDD

•Clear instructions are used to initialize memory (CLR) or accumulators A and B (CLRA, CLRB).

•Load addressing modes are: IMM, DIR, EXT, IND

•CLR addressing modes are: EXT and IND.

•Store instructions are: STAA, STAB, STD

•CLRA and CLRB are INH.

•Store addressing modes are: DIR, EXT, IND

•Example:

•Example:

LDAA #$FF STAA $25 LDAB $0025 STD $05, X LDD $C025

; IMM ; DIR ; EXT ; IND X = $C020 ; EXT

CLRA STAA $25 ; Above is equivalent to below CLR $0025

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Push and Pull

Transfer and Exchange

•Push and pull instructions are used to put data onto and take data off of the stack.

•The transfer instructions are used to copy data between accumulators A and B and the CCR.

•Push instructions are: PSHA, PSHB (all INH).

•Transfer instructions are: TAB, TAP, TBA, TPA (all INH).

•Pull instructions are: PULA, PULB (all INH).

•Exchange instructions are used to exchange data between accumulator D and index registers X & Y. •Exchange instructions are: XGDX, XGDY (all INH).

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Example: Saving State to Stack PSHB ; save B to stack PSHA ; save A to stack TPA ; transfer CCR to A PSHA ; body of the subroutine PULA ; restore CCR to A TAP ; restore CCR PULA ; restore A from stack PULB ; restore B from stack RTS ; return from subroutine

Add Operations •Add registers: ABA, ABX, ABY (all INH). •Add with carry to memory: ADCA, ADCB. •Add w/o carry to memory: ADDA, ADDB, ADDD. •Add addressing modes: IMM, DIR, EXT, IND. •Example: 16-bit addition using only A LDAA $D101 ADDA $D121 STAA $D801 LDAA $D100 ADCA $D120 STAA $D800

; load least significant byte ; add data at $D121 to A ; store least significant byte ; load most significant byte ; add data at $D120 to A ; store most significant byte

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Subtract Operations

Compare Operations

•Subtract registers: SBA (INH). •Subtract with carry to memory: SBCA, SBCB. •Add w/o carry to memory: ADDA, ADDB, ADDD. •Add addressing modes: IMM, DIR, EXT, IND. •Example: 16-bit subtraction using only A LDAA $D101 SUBA $D121 STAA $D801 LDAA $D100 SBCA $D120 STAA $D800

; load least significant byte ; subtract data at $D121 to A ; store least significant byte ; load most significant byte ; subtract data at $D120 to A ; store most significant byte

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•Compare instructions perform a subtraction to update the CCR but does not alter any data. •Typically used just before a branch instruction. •Compare registers: CBA (INH). •Compare to memory: CMPA, CMPB, CPD. •Compare addressing modes: IMM, DIR, EXT, IND. •Example: comparing with a known set point LDAA #$50 CMPA $1031

; load set point into A ; compare A to memory

•If Z flag is 1 then the contents of the memory location $1031 equals $50. Lecture 5 (CJM), Page 12

Miscellaneous Arithmetic •DAA - decimal adjust A for BCD (see pgs. 38-39). •DEC, DECA, DECB - decrement. •INC, INCA, INCB - increment. •NEG, NEGA, NEGB - two’s complement. •TST, TSTA, TSTB - test for zero or minus and set Z and N flags in the CCR.

Multiply •The MUL instruction multiplies two unsigned 8-bit values in A and B to produce a 16-bit unsigned product stored in D (A × B → D). •Example: LDAA #$FF LDAB #$14 MUL •At the end, accumulater D contains $13EC

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Divide

Divide Examples

•The divide instructions use the D register for the dividend and the X register for the divisor. •The resultant is placed in the X register and the remainder is placed in the D register. •The IDIV instruction does integer division. •The FDIV instruction does fractional division resulting in binary weighted fraction between 0 and 0.999998.

LDD #$FFFF LDX #$2710 IDIV

; After IDIV executes ; D will contain $159F and ; X will contain $0006.

LDD #$03 LDX #$06 FDIV

; After FDIV executes ; D will contain $0000 and ; X will contain $8000.

2-1

-15 -13 2-3 2-5 2-7 2-9 2-11 2 -142 2-16 -12 -10 -4 -6 -8 2 2 2 2 2 2

2-2

1000000000000000 2-1 = 1/2 = 0.5 Lecture 5 (CJM), Page 15

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Logical Operations •The logical operations are:

•The BITA and BITB instructions perform an AND operation and update the N and Z flags of the CCR without altering the operand.

- AND (ANDA, ANDB) - Inclusive OR (ORAA, ORAB) - Exclusive OR (EORA, EORB) - 1’s complement (COM, COMA, and COMB).

•Example: masking unwanted bits LDAA #$34 ANDA #$0F

Data Test and Bit Manipulation

; equivalent to %00110100 ; equivalent to %00001111 ; result in A will be %00000100

•The BCLR and BSET instructions are used to clear or set bit(s) in a given memory location. •The format is: BCLR dd, mm BSET dd, mm where dd is a memory location on page zero ($00dd) and mm is the mask byte.

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Arithmetic Shift •Arithmetic shift right (ASR, ASRA, ASRB) retains the original value of the most significant bit. •Arithmetic shift left (ASL, ASLA, ASLB, ASLD) is the same as a logical shift left. •Example: 6543210 C

Logical Shift •Logical shift right (LSR, LSRA, LSRB, LSRD) shifts in 0’s into the MSB. •Although the assember recognizes a logical shift left (LSL, LSLA, LSLB, LSLD) to be equivalent to an arithmetic shift left these instructions are included to make some programs clearer. •Example: 0

Arithmetic Shift Right C

76543210

0

Arithmetic Shift Left Lecture 5 (CJM), Page 19

76543210

C

Logical Shift Right C

76543210 Logical Shift Left Lecture 5 (CJM), Page 20

0

Rotate

Condition Code Register

•Rotate left instructions (ROL, ROLA, ROLB) put the carry bit into the LSB. •Rotate right instructions (ROR, RORA, RORB) put the carry bit into the MSB. •Example: 76543210

•Instructions are included to clear or set the carry (C), interrupt (I), and overflow (V) bits (i.e., CLC, CLI, CLV, SEC, SEI, SEV). •The TPA and TAP instructions copy the contents of the CCR to and from the accumulator A.

C

Rotate Right C

76543210 Rotate Left Lecture 5 (CJM), Page 21

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Single Condition Branches

Unsigned Number Branches

•BCC - branch if carry clear (i.e., C=0). •BCS - branch if carry set (i.e., C=1). •BNE - branch if not equal to zero (i.e., Z=0). •BEQ - branch if equal to zero (i.e., Z=1). •BPL - branch if positive or zero (i.e., N=0). •BMI - branch if negative (i.e., N=1).

•These branches usually follow CBA, CMP (A, B, or D), CP (X or Y), SBA, SUB (A, B, or D) instructions. •BHI - branch if higher ‘>’ (i.e., C + Z = 0). •BHS - branch if higher or same ‘≥’ (i.e., C=0). •BLO - branch if lower ‘’ (i.e., Z · (N ⊕ V = 0)). •BGE - branch if greater or equal ‘≥’ (i.e., N ⊕ V=0). •BLT - branch if less ‘