Mixed-Signal Assertions versus Machine-Learning as Fault Detection

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as Fault Detection Method in post-silicon verification. Thomas Nirmaier, Manuel ... Abstract—Automotive semiconductor devices, like sensors, smart switches or ...
Mixed-Signal Assertions versus Machine-Learning as Fault Detection Method in post-silicon verification Thomas Nirmaier, Manuel Harrant, Benedikt Grünewald, Jürgen Zimmer, Bjoern Eversmann, Georg Pelz Infineon Technologies AG, Germany [email protected]

Abstract—Automotive semiconductor devices, like sensors, smart switches or other mixed-signal devices, have to operate reliable in harsh environments or may even have to fulfill functional safety requirements (ISO26262) and therefore have to undergo extensive tests to explore the limits of reliable operation. The verification task therefore implies the assessment of large data sets (“big data”) and to detect and classify faulty behavior. Up to now such post-Si verification tasks have been addressed by custom processing of available data tailored to the very specific expected response of a certain device. Recent advances in the rather distinct fields of information processing open the path for a faster and coverage increased processing and assessment of such data, one being the broader application of analog assertions to post-Si, the second being applying machine-learning paradigms, also by now rarely used for post-Si verification.

I. INTRODUCTION Big trends in the automotive industry like autonomous driving, safety, security and energy efficiency imply ever increasing semiconductor content in modern cars under a diversity of Mission Profiles [1, 2]. Also safety and reliability requirements increase and pose a higher effort to the verification process. Classical, more human directed approaches, like directed test and data analysis by human inspection become more and more inefficient or even impossible. On the other side, more machine-assisted or machine-learning approaches emerge or become mature. In this article we assess individual strengths and weaknesses of two approaches, one being Analog Assertions and a second one, by applying machine-learning paradigms to evaluate data from post-Si verification. Basis for this analysis are two application cases, fault detection in a Giant-Magneto-Resistive sensor [3] and in a smart power motor driver IC. II. COMPARISON BETWEEN ASSERTION-BASED AND ML-BASED TECHNIQUES A. Machine-Learning in post-Si verification Though Machine-Learning has evolved to a couple of mainstream application, e.g. image/video processing application to post-Si verification is scarce, which we will elaborate on as follows.

First of all, machine learning refers to any technique, that does not explicitly require for upfront definition of an underlying functional model or behavior of a system, in our case the system is our DUT and the functional behavior could be the relationship between operating conditions and performance parameters or failure rate, etc. Machine Learning methods can achieve this, because they are data driven, which implies their performance heavily depends on the quality and availability of data. Furthermore ML methods can be roughly sub-divided into unsupervised techniques, which try to extract information from the data without prior knowledge and supervised techniques, which require training. In each of these branches there may be a variety of algorithms to choose from, e.g. for Neural Networks the best architecture, so the final efficiency of any heavily becomes a matter of good choice of algorithm, architecture and hyper-parameters, which tune the algorithms. So far ML techniques have been known to be used to a limited extend in post-Si for e.g. supervised learning for bug diagnosis [10], verification and characterization by means of Genetic Algorithms [11. 12], but did not get wide application. We will discuss their specific strengths, but also difficulties to deploy in the next section, when comparing them to modern directed techniques, like assertionbased techniques. B. Machine-Learning vs. Mixed-Signal Assertions Post-Si verification shall answer the question “does the device under test fulfill the requirements as specified” in the first place, and includes sub-tasks like characterization, performance evaluation, functional verification, fault (bug) detection and analysis. Well written requirements are formulated in a positive way, negative requirements shall be avoided in general due to lack of verifiability. If formulated already in a property-specification language like PSL, the path for machine-interpretation, even (semi)automated test generation is open and may imply a huge efficiency gain in the verification process [Mukherjee,2011].

Fachtagung „Test und Zuverlässigkeit von Schaltungen und Systemen“, 2019

The major limitation of assertion-based testing may be exactly the limitation to the quality and completeness of requirements (if no formal verification is put on top). That is the point where the strengths of ML methods comes into play. ML algorithms, both supervised and unsupervised, may help in detecting exactly anomalous device behavior without exactly specifying an exact signature. In the given unsupervised learning example of the sensor the signature of a good sensor results in two clusters, a third cluster reveals an anomaly without explicitly having stated how an anomaly would look alike. In supervised learning, e.g. a Neural Network (NN) can be trained both with labeled good, known labeled bad data. The question arises how a NN can be trained for unknown faults, because usually the number of known faults is relatively low and good training relies on a reasonably large size of training data. In this case the space of unknown faults is the space orthogonal to the space of known faults and the NN could be trained also on this orthogonal space. As mentioned ML techniques require data for training, depend on quality and completeness of this data. They also rely on the skills of choosing the right algorithm and architecture. Because both methods have their own strengths and weaknesses we conclude to apply both strategies during verification, assertion-based in verifying already formulated requirements and ML techniques to find hidden effects and so far unconsidered fault modes. III. CASE STUDY In the following paragraphs, we will briefly present the application cases where we applied both, analog assertions as well as machine learning paradigms, to evaluate the results from post-Si verification and demonstrate advantages and limitations of both methods. A. GMR magnetic sensor The sensor under consideration is a 64 channel device, where rotation angles can be sensed using the information from observable domain wall flips. In normal operation the 64 channels behave as shown in Fig. 1 and Fig. 2, showing a pattern of up and down flips in the sensor response with a certain rotation of the magnetic field.

Fig. 2: Short-time transient response of sensor without faulty behavior

There are various types of faulty signatures that need to be detected. Fault signatures include, but are not limited to: missed or domain wall flips too late or double, count between channels not in a linear sequence, channel response missing, etc., see Fig. 3.

Fig. 3: Example of a trace containing faulty signatures

1) Analog Assertions for Fault Detection Assertions have been used as a work-horse in digital pre-Si verification on clocked designs for quite some years. Basis is a property specification language, e.g. PSL [4] and assertions, which are checkers on simulation traces for dedicated expressions. Analog assertions for mixed-signal designs or even on post-Si level are still a matter of research [5]. Nevertheless we can easily formulate a fault detection problem in terms of an analog property expression and apply it to post-Si data. Fig. 4 shows an assertion applied to a non-faulty trace and Fig. 5 how an assertion successfully captures a fault case.

Fig. 4: Assertion-based evaluation without faults (red). PSL expressions evolve over time and hold at each point (blue).

Fig. 5: Fault detected. Assertion does not hold after 0.2 s (switch from green to red). Fig. 1: Full data set 64 channels over time without faults with about a million switching events.

Fachtagung „Test und Zuverlässigkeit von Schaltungen und Systemen“, 2019

2) Machine-Learning Techniques Advances in computer-power and ease of application motivate the surge in application of Machine Learning (ML) techniques in data analysis and image processing. ML is split into many paradigms, we chose the flow of feature extraction – clustering – labeling – classification [6] for the given fault detection problem. As features to extract, we chose delay times from the sensor channel waveforms. For visualization we show only the clustering of two out of many features.

We applied both, analog and mixed signal assertions as well as Machine Learning techniques combined with clustering to a test scenario focusing on supply line robustness. Therefore, we used the LV124, an OEM-based set of supply line transients from automotive applications. During the specified supply line transient, the device shall operate using a 20 kHz PWM signal to spin the motor. From the post-Si verification point of view, it must be ensured that the device is functional during the applied transient (driving the motor according to the PWM signal) as well as all diagnostic functions are available.

Fig. 6: Signatures of 2 possible faults. A third data cluster appears (orange, left), A data point away from cluster appeared (red, right). Fault free behavior is 2 clusters.

Fig. 7: Sensor trace related to cluster faults from Fig. 6 reveal that faults have been correctly detected.

A typical signature without fault contains two clusters, while faulty signatures contain 3 or more, see Fig. 6. Additional clusters can be successfully related to real faults, see Fig. 7. B. Smart-Power Motor Driver The second application case is an integrated motor driver used in automotive fan and pump applications. The device under investigation, see Fig. 8, contains power MOSFETs in a half-bridge configuration and a controller to switch-on the respective transistors.

Fig. 9: Analog waveforms of a motor control IC under LV124-E03 test conditions

Due to the long-term running tests having several seconds of test time in combination with the requested PWM frequency, one test of those test scenarios contains a multitude of PWM-based switching cycles. Consequently, manual inspection of those resulting waveforms is not feasible anymore leading to considerations of more advanced methods, such as analog and mixed-signal assertions or Machine Learning techniques. 1) Analog Assertions for Fault Detection In a first glace we were using assertions to detect the correct behavior of the system in terms of functionality and diagnosis, see Fig. 10.

Fig. 8: Test bench for integrated motor driver

The device is controlled with separated digital input pins to either switch-on the high-side MOSFET or the low-side MOSFET to accelerate or to brake the motor according to the PWM-based motor control scheme.

Fig. 10: Assertion-based validation of measurement data for integrated motor control IC under LV124-E03 test conditions

Fachtagung „Test und Zuverlässigkeit von Schaltungen und Systemen“, 2019

Based on the outcome when using analog and mixedsignal assertions to check the correct switching and diagnosis behavior of the integrated half-bridge driver, it can be stated that all switching cycles were determined as pass without any malfunction being present. 2) Machine-Learning Techniques Secondly, we applied the flow of feature extraction (on-timings as well as analog on-time diagnosis behavior), clustering, labeling and classification to determine whether all PWM switching cycles occurred in the correct manner at the output of the smart-power motor driver IC.

Fig. 11: Output clusters from functional switching events shows three clusters referencing the different duty cycles while applying a PWM to the logical input control

V.

ACKNOWLEDGEMENTS

This research project is supported by the German Government, Federal Ministry of Education and Research under the grant number 16ES03.

VI. REFERENCES [1]

U. Abelein, H. Lochner, D. Hahn, S. Straube, „Complexity, quality and robustness - the challenges of tomorrow's automotive electronics”, Design, Automation and Test in Europe & Exhibition (DATE), 2012 [2] T. Nirmaier, et. al. “Mission profile aware robustness assessment of automotive power devices”, Design, Automation and Test in Europe & Exhibition (DATE), 2014 [3] Granit et al., “Integrated Gigant Magnetic Resistance based Angle Sensor”, SENSORS, 2006 IEEE [4] 1850-2010 - IEEE Standard for Property Specification Language (PSL)Dogan et. al., Analog layer extensions for analog/mixed-signal assertion languagesCitation for , 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC) [5] VW80000, “LV 124” section, Vol. 2013-06, Feb. 2013 [6] Pouya Taatizadeh, “On Using Hardware Assertion Checkers For Bit-Flip Detection In Post-Silicon Validation”, Ph.D. thesis, 2017 [7] Isabelle Guyon, Andre Elisseeff, “An Introduction to Feature Extraction”, Springer, 2006 [8] H. Foster, “Assertion-Based Verification: Industry Myths to Realities”, 20th Int. Converence on Computer-Aided Verification (CAV), 2008 [9] S. Mukherjee, P. Dasgupta, S. Mukhopadhyay, “Auxiliary Specifications for Context-Sensitive Monitoring of AMS Assertions”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2011 [10] A. DeOrio, Q. Li, M. Burgess, V. Bertacco, “Machine Learning-based Anomaly Detection for Post-Silicon Bug Diagnosis”, Design, Automation and Test in Europe & Exhibition (DATE), 2013

IV. SUMMARY We address recent post-Si verification challenges in automotive devices by means of two upcoming paradigms, Analog Assertions and Machine-Learning techniques. Both techniques were applied to two different automotive case studies, a sensor-based system as well as a motor driving application. The outcome of these case studies showed that both techniques can generally be used to handle big data in the context of post-Si verification with individual strengths and weaknesses. Though there is still much room for future research, we initially find, that Analog Assertions are very efficient in asserting a specified pre-defined behavior (sample based), Machine Learning paradigms may be more efficient in detecting faults with unknown signature (feature based), i.e. Analog Assertions are prone to how accurate the asserted property is formulated. Nevertheless the statistic nature of many ML techniques has a certain risk of false positives. We propose to use both techniques for a given problem at start before deciding, which one to use.

Fachtagung „Test und Zuverlässigkeit von Schaltungen und Systemen“, 2019