Multiplier SEPIC Converter J. C. Rosas-Caro; J. C. Mayo-Maldonado; J. E. Valdez-Resendiz; R. Salas-Cabrera; A. Gonzalez-Rodriguez; E. N. Salas-Cabrera; H. Cisneros-Villegas; J. G. Gonzalez-Hernandez. Madero City Technological Institute, Tamaulipas State México. E-mail: [email protected]

Abstract This work introduces a set of PWM SEPIC dc-dc converters specially designed for high voltage-gain conversion, the voltage gain in the proposed converters can be adjusted by PWM and by adding diodes and capacitors in a diodecapacitor multiplier structure. They main features are: (i) high-voltage gain, without extreme duty cycles and transformer-less which allow high switching frequency and without cascaded connection, (ii) low voltage stress in switching devices, along with modular structures, and more output levels can be added without modifying the main circuit, which is highly desirable in some applications such as renewable energy generation systems (iii) it posses only one switch and two inductors, the voltage gain can increases by adding only diodes and capacitors. In addition, an average dynamic model is proposed for this converter. A detailed theoretical analysis is given. Both simulation and experimental results are provided to verify the principle of operation.

1. Introduction High voltage-gain is difficult to achieve with traditional topologies of dc-dc converters because the extreme duty cycles and transformer requirements limits the switching frequency and systems size [1-5]. For green energy generation, the low voltage from a renewable energy source need to be boosted for feeding a grid connected inverter. A transformer with a large voltage gain is undesirable because it enhances the transformer non-idealities [4]. To reduce the dc-dc converters’ size, the use of high switching frequency results in small inductors and capacitors with equivalent current and voltage ripples [1-5]. This is the motivation to use several hundred of kilohertz [1]. The natural switching delays in actual switches limits the switching frequency when the duty ratio is too small or too big; a solution to this is the employment of transformers to reduce the voltage without using small duty ratios. However, the transformer's losses limit the This work was supported by PROMEP in Mexico under the project “Desarrollo de convertidores con estructuras multiplicadoras de voltaje para fuentes de generación alterna”, Number: ITCMAD-PTC-007.

switching frequency also; along with the development of high speed MOSFETs the switching frequency limitation becomes a transformer's issue [1-4]. The use of multilevel converters for renewable energy micro generation brings the promise to build compact converters made with small power MOSFETS, with a minimum ESR and transformer-less connected to the utility grid. There exists the challenge to couple the low dc voltage from the renewable energy source to the high dclink voltage of the multilevel converter. The Single-ended primary-inductor converter also called SEPIC converter s one of the traditional topologies and has many industrial applications [6-8], see Fig. 1(a). Some important characteristics are: (i) it provides a positive output voltage, (ii) when the converter is off, C1 prevents any current to flow from the input to the output. The output voltage is provided in C2 and its related to the input voltage and the switch duty cycle D as:

VC 2 D = Vin 1 − D

(1)

Although D can theoretically takes values from 0 to 1, providing a theoretically infinity boost factor, parasitic elements limit the upper limit usually to 0.9, also for increasing the switching frequency it is better the duty cycle to be around 0.5. Some traditional ways of increasing the voltage gain without using extreme duty cycles are: (i) using transformers which limit the switching frequency as mentioned and (ii) cascaded connection of converters which increase the complexity of the system [7]. Recently, some topologies have been proposed for overcoming those challenges such as hybridizing traditional topologies with diode-capacitor multipliers [4-5] and the Voltage Lift Technique [7,9-10]. Hybridizing traditional topologies with diode-capacitors multipliers brings the advantage of using few inductors reaching high efficiency, high power density and simple structures with few switches and inductors [4-5]. This work proposes a family of dc-dc multiplier converters as an extension of the traditional SEPIC

topology hybridized with diode-capacitor multipliers. The proposed structures achieve high voltage gain without extreme duty cycles and transformer-less, which allow high switching frequency, they have low voltage stress in switching devices, modular structures, and more output levels can be added without modifying the main circuit.

2. Applications Fig. 1(a) shows the traditional SEPIC converter which can be also called 1x multiplier SEPIC converter, the 2x multiplier SEPIC converter is shown in Fig. 1(b). The designation of nx multiplier converter is according with the number of output capacitors n in the converter.

and C1 charges L2 with a positive current. 4- When the switch opens again the current in L2 closes d1 charging C2 with a positive voltage. This basic principle explained for the circuit in Fig. 1(a) applies for the converter in Fig. 1(b) and also: 5- When the switch open and the current in L2 closes d1, see Fig. 2(a), the negative side of C3 and C4 are connecter together, and then C3 can close d3 to charge C4 with a positive voltage. 6- When the switch closes, C1 gets in series connection with C2, see Fig. 2(b) and the can charge C3 by closing d2. The operation explained above make the SEPIC converter to drive a diode-capacitor multiplier, in this case is a 2x multiplier, but it can be extended by adding diodes and capacitors.

Fig. 1. SEPIC converter (a) traditional 1x (b) 2x converter.

As in other dc-dc converters the switch keeps open and keeps open a time ton and then closes keeping in this way a time toff. T is the total switching period which is constant and equal to ton+toff, a duty cycle D is given by the next definitions:

D=

t on ; T

1− D =

t off

(2)

T Fig. 2. Equivalent circuits when (a) the switch is off (b) the switch is on.

Lets assume than initial conditions of the converter are zero (current in inductors and voltage in capacitors are zero). The basic operation principle of the SEPIC converter, see Fig. 1(a), can be explained as:

The average voltage in L1 during one switching cycle can be expressed as:

L1 1- When the switch closes, it connects L1 to the input voltage and the current in L1 increases with a constant slope and positive sign (according with the sign definition in Fig. 2). 2- When the switch opens, the current in L1 charges C1 with a positive voltage (according with the sign definition). 3- When the switch closes connects L2 in parallel with C1

d iL1 dt

=

1 (tonvL1ton + toff vL1toff ) T

(3)

Where vL1ton is the voltage across L1 when the switch is on and vL1toff is the voltage across L1 when the switch is off, this expression can be writhen in terms of the duty cycle defined in (2) as:

L1

d iL1 dt

= Dv L1ton + (1 − D)v L1toff

(3)

The voltage across L1 during the switching states can be derived from the equivalent circuits shown in Fig. 2.

v L1ton = Vin

(4)

vL1toff = Vin − VC1 − VC 2

(5)

In steady state the current across inductors is constant because the average voltage across the inductor is zero, from (3) and substituting (4) and (5) this can be expressed as:

DVin + (1 − D )(Vin − VC1 − VC 2 ) = 0

d iL 2 dt

= Dv L 2ton + (1 − D )v L 2toff

D 1 = Vin 1− D 1− D

(13)

And from Fig. 2(a) it can be seen that the voltage in C4 is the same as the voltage in C3:

VC 4 = VC 3 = Vin

1 1− D

(14)

The output voltage is given by VC2+VC4 which can be expressed as:

1 1 + D (15) D Vout = VC 2 + VC 4 = Vin + = Vin 1− D 1− D 1− D

(6)

In the other hand, using the duty cycle definition, the average voltage in L2 can be expressed as:

L2

VC 3 = VC1 + VC 2 = Vin + Vin

The achieved voltage gain is very high Fig. 3 shows the voltage gain again the duty cycle.

(7)

In the same way as L1, the voltage across L2 during the switching states can be derived from the equivalent circuits shown in Fig. 2.

v L 2 ton = −VC1

(8)

vL 2toff = VC12

(9)

In steady state the average voltage across L2 is zero, it can be expressed from (7) and substituting (8) and (9) as:

D (−VC1 ) + (1 − D )VC 2 = 0

(10)

From (10), the voltage in C2 can be expressed as:

VC 2 = VC1

D 1− D

(11)

Substituting (11) in (6) it can be gotten that:

VC1 = Vin

(12)

From Fig. 2(b) it can be seen that C3 is charged by C1 and C2 in series and then:

Fig. 3. Voltage boost factor again duty cycle.

From Fig. 2(a) it can be send that the voltage the switch has to block is low compared with the output voltage, this is highly desirable because a high voltage converter can be build with low voltage devices, in other topologies such as the cascaded boost converter, a switch need to block the output voltage which limits the maximum output voltage to the voltage handled by the transistor. As it can be seen from Fig. 1, the SEPIC converter is used to drive a diode-capacitor voltage multiplier also called the Dickson charge pump, in this way an 3x multiplier SEPIC converter and nx multiplier SEPIC converter can be developed, see Fig. 4.

proposed converter. This representation may be used for control purposes. A wide series of control techniques that may be employed for controlling this converter are shown in [11], where the state space representation of the traditional Sepic converter is included as well. Let us define the position of the switch as = ݑ1 and = ݑ0 when it is closed and opened respectively. According to the definition above, and considering = ݑ1, the behavior of the equivalent circuit of the converter (see Fig. 2b) can be represented by the following dynamic equations,

Fig. 4. 3x multiplier SEPIC converter and possible extension of nx.

All capacitors over C3 in the Dickson charge pump get the same voltage of C3, and then the output voltage of the 3x multiplier SEPIC converter is:

Vout 3 x = VC 2 + VC 4 + VC 6 = Vin

2+ D 1− D

(16)

And for the nx multiplier SEPIC converter the voltage gain is given by:

݀ ݅ = ܸ ݀ ݐଵ ݀ ܮଶ ݅ଶ = ݒଵ ݀ݐ ݀ ܥଵ ݒଵ = −݅ଶ − ߣଵ ݀ݐ : ݀ ݒଵ + ݒସ ଵ ۔ ۖܥଶ ݀ݒ ݐଶ = − ൬ ܴ ൰ − ߣଵ ۖ ݀ ۖ ܥଷ ݒଷ = ߣଵ ۖ ݀ݐ ۖ ݀ ݒଵ + ݒସ ۖ ܥସ ݒସ = − ൬ ൰ ە ݀ݐ ܴ ۓ ۖ ۖ ۖ ۖ ۖ ۖ

ܮଵ

(18)

Voutnx

n −1 + D = Vin 1− D

(17)

The number of inductors, switches, diodes and capacitors for developing the proposed topology is shown in the next table.

1x 2x 3x nx

Inductors 2 2 2 2

Switches 1 1 1 1

Capacitors Diodes 2 1 4 3 6 5 2n 2n-1

Another advantage of the proposed topology is that the voltage gain can be increased without increasing the number of inductors which are difficult to encapsulate and without increasing the number of switches which require more circuitry.

3. Dynamics of the Multiplier Sepic Converter In this section, a brief analysis of the dynamics of the Multiplier Sepic Converter is presented. The purpose of this section is to provide a state space representation of the

The set of dynamic equations Σଵ that is shown in (18) corresponds to the variables of the elements that store energy in the converter; ݅ଵ and ݅ଶ correspond to the currents of the inductors ܮଵ and ܮଶ ; ݒଵ , ݒଶ , ݒଷ and ݒସ correspond to the voltages across capacitors ܥଵ , ܥଶ , ܥଷ and ܥସ respectively. The element ߣଵ represents an electrical current that feeds capacitor ܥଷ . This element produces a very fast dynamics in the converter. In the equivalent circuit of the converter, when = ݑ1 (see Fig. 2b), it is clear that capacitors ܥଵ and ܥଶ are in parallel with ܥଷ . When they are in parallel connection, ܥଷ takes charge from ܥଵ and ܥଶ . Therefore, the element ߣଵ may be defined as ߣଵ =

ሺݒଵ + ݒଶ ሻ − ݒଷ ܴீଵ

Where the parameter ܴீଵ is a very small resistance in capacitors and the switch. It is clear that the current represented by element ߣଵ tends to be zero as voltage ݒଷ tends to be equal to ݒଵ + ݒଶ . Let us consider the equivalent circuit of the converter when the switch is closed, this is = ݑ0. The behavior of the equivalent circuit (see Fig. 2a) can be represented by the following dynamic equations,

:

ۓ ۖ ۖ ۖ ۖ ۖ ۖ

݀ ܮଵ ݅ଵ = −ሺݒଵ + ݒଶ ሻ + ܸ ݀ݐ ݀ ܮଶ ݅ଶ = −ݒଶ ݀ݐ ݀ ܥଵ ݒଵ = ݅ଵ ݀ݐ

ݒଵ + ݒସ ݀ ۔ ۖܥଶ ݀ݒ ݐଶ = ሺ݅ଵ + ݅ଶ ሻ − ൬ ܴ ൰ ۖ ݀ ۖ ܥଷ ݒଷ = −ߣଶ ۖ ݀ݐ ۖ ݒଵ + ݒସ ݀ ۖ ܥସ ݒସ = ߣଶ − ൬ ൰ ە ݀ݐ ܴ (19)

The set of dynamic equations Σ that is shown in (19) has an element ߣଶ , this element represents a current that appears when = ݑ0. In other words, when the switch is opened, capacitor ܥଷ and ܥସ are in parallel connection. Therefore, it is possible to define the current ߣଶ as follows ݒଷ − ݒସ ߣଶ = ܴீଶ

Where the parameter ܴீଶ is a very small resistance that is present in capacitors and the switch. It is clear that the current represented by element ߣଶ tends to be zero as voltage ݒସ tends to be equal to ݒଷ . Once obtained the sets of dynamic equations for each equivalent circuit, let us define { = ݑ0,1} as the input of the system. In order to obtain a state space representation that is valid for both equivalent circuits, this input is included. ሺ1 − ݑሻሺݒଵ + ݒଶ ሻ ܸ ݀ ݅ଵ = − + ݀ݐ ܮଵ ܮଵ ݀ ݒݑଵ ሺ1 − ݑሻݒଶ ݅ = − ݀ ݐଶ ܮଶ ܮଶ ሺ1 − ݑሻ݅ଵ ݑሺ݅ଶ + ߣଵ ሻ ݀ = ݒ − ݀ ݐଵ ܥଵ ܥଵ : ሺ1 − ݑሻሺ݅ଵ + ݅ଶ ሻ ߣݑଵ ݒଵ + ݒସ ୗୗ ݀ ۔ − −൬ ൰ ۖ݀ݒ ݐଶ = ܥଶ ܥଶ ܴܥଶ ۖ ݀ ߣݑଵ ሺ1 − ݑሻߣଶ ۖ = ݒ − ۖ ݀ ݐଷ ܥଷ ܥଷ ۖ ሺ1 − ݑሻߣଶ ݀ ݒଵ + ݒସ ۖ = ݒ −൬ ൰ ە ݀ ݐସ ܥସ ܴܥସ ۓ ۖ ۖ ۖ ۖ ۖ ۖ

(20) The state space representation Σௌௌ shown in (20) is

clearly nonlinear. It is important to note that when more capacitors are added as illustrated in Fig. 4, the number of equations will be increased as well. However, the structure of the state space representation will not be strongly modified. In addition, a reduced order state space representation may be derived with a similar method as it was performed for another multiplier topology [12]. Average models are frequently used for analysis, and control of the power electronics converters [11]. In these models, the input ݑis replaced by the average input ݑ௩ which is also known as the duty cycle of the converter that takes values between 0 and 1. In this case, average models represent the average currents and voltages for each equation in (20). Let us consider ݑ௩ = [0,1] as the input of the system. In addition, we will consider both the input current ݅ଵ and the output voltage ݒ = ݒଶ + ݒସ as ݕ, the output of the system, because they are the most important variables in which we could be interested. Therefore the following set of equations will be defined as the average dynamic model of 2x Multiplier Sepic Converter, ሺ1 − ݑ௩ ሻሺݒଵ + ݒଶ ሻ ܸ ݀ ݅ =− + ܮଵ ܮଵ ݀ ݐଵ ݀ ݑ௩ ݒଵ ሺ1 − ݑ௩ ሻݒଶ ݅ଶ = − ܮଶ ܮଶ ݀ݐ ሺ1 − ݑ௩ ሻ݅ଵ ݑ௩ ሺ݅ଶ + ߣଵ ሻ ݀ = ݒ − ܥଵ ܥଵ ݀ ݐଵ ሺ1 ሻሺ݅ ሻ ݀ − ݑ + ݅ ݑ ߣ ݒଵ + ݒସ ௩ ଵ ଶ ௩ ଵ : = ݒ − −൬ ൰ ݐ݀۔ଶ ܥଶ ܥଶ ܴܥଶ ۖ ݑ௩ ߣଵ ሺ1 − ݑ௩ ሻߣଶ ݀ ۖ ݒଷ = − ܥଷ ܥଷ ݀ݐ ۖ ۖ ሺ1 − ݑ௩ ሻߣଶ ݀ ݒଵ + ݒସ ۖ = ݒ −൬ ൰ ݀ ݐସ ܥସ ܴܥସ ۖ ۖ ە = ݕሾ݅ଵ ݒଵ + ݒସ ሿ் = ሾ݅ଵ ݒ ሿ் ۓ ۖ ۖ ۖ ۖ ۖ ۖ ۖ

(21)

4. Simulation and Experimental Results The 2x multiplier SEPIC converter was simulated and prototyped for proving the principle of the proposition. The schematic is shown in Fig. 1(b) with all capacitors equal to 220µF and both inductors equal to 200µH, the input voltage is 25V and the switching frequency is 20kHz. The load was changed with a resistors bank. Fig. 5 shows the experimental prototype.

Fig. 5. Experimental prototype.

circuit with the parameters shown in Fig. 5 was simulated in the software Synopsys Saber. On the other hand, a model-based simulation was performed in MATLAB by employing the proposed average dynamic model Σ in the set of equations (21). The purpose of these simulations is to validate the proposed model with a well-known circuit simulator. In Fig. 8 and Fig. 9, the proposed outputs for the dynamic model are shown, these are the current ݅ଵ and the output voltage ݒ = ݒଶ + ݒସ .

Fig. 6 shows both simulation and experimental waveforms for a duty cycle of 0.6 and a load of 72Ω, the average input current is 5.52A, a small delay around 2.5µs is observed in the current due the delay in the current probe, the output voltage is smaller than the one in the simulation due losses in the real prototype. Fig. 7 shows waveforms for the simulation and experimental prototype with a duty cycle of 0.6 and a load of 63Ω, the average input current is 6.08A. Fig. 8. Comparison between the circuit-based simulation and the average model-based simulation of current ݅ଵ .

Fig. 6. Experimental waveforms with D=0.6 and Rout=72Ω.

A detailed theoretical analysis is given along with experimental results to verify the main characteristics.

Fig. 9. Comparison between the circuit-based simulation and the average model-based simulation of the output voltage ݒ = ݒଶ + ݒସ .

The rest of the state variables of the average dynamic model Σ are shown in Figures 10, 11, 12, 13 and 14, that correspond to ݅ଶ, ݒଵ , ݒଶ , ݒଷ and ݒସ respectively.

5. Conclusions

Fig. 7. Experimental waveforms with D=0.6 and Rout=63Ω.

Fig. 7 shows waveforms for the simulation and experimental prototype with a duty cycle of 0.6 and a load of 63Ω, the average input current is 6.08A. In the following figures, simulations of the dynamic behavior of the Multiplier Sepic Converter are shown. The

This work proposes a family of dc-dc multiplier converters as an extension of the traditional SEPIC topology hybridized with diode-capacitor multipliers. The proposed structures achieve high voltage gain without extreme duty cycles and transformer-less, which allow high switching frequency, they have low voltage stress in switching devices, modular structures, and more output levels can be added without modifying the main circuit. The voltage gain can be increased without increasing the number of inductors which are difficult to encapsulate and without increasing the number of switches which require

more circuitry, by using few inductors converters get reach high efficiency, high power density and simple structures. An average dynamic model is proposed. Several control techniques may be employed based in this model for the open-loop operation of the 2x Multiplier Sepic Converter.

Fig. 14. Comparison between the circuit-based simulation and the average model-based simulation of voltage ݒସ .

5. References Fig. 10. Comparison between the circuit-based simulation and the average model-based simulation of current ݅ଶ .

Fig. 11. Comparison between the circuit-based simulation and the average model-based simulation of voltage ݒଵ .

Fig. 12. Comparison between the circuit-based simulation and the average model-based simulation of voltage ݒଶ .

Fig. 13. Comparison between the circuit-based simulation and the average model-based simulation of voltage ݒଷ .

[1] Middlebrook R.D.: “Transformerless DC-to-DC converters with large conversion ratios”, IEEE Transactions on Power Electronics. vol. 3, no 4, pp. 484–488, 1998. [2] Maksimovic D., CUK S.: “Switching converters with wide DC conversion range”, IEEE Transactions on Power Electronics. vol. 6, no 1, pp. 151–157, 1991. [3] Axelrod B., Berkovich Y., Ionovici A.: “Switched-capacitor/ switched-inductor structures for getting transformerless hybrid DC– DC PWM converters”, IEEE Transactions on Circuits and Systems I. vol. 55, no. 2, pp. 687–696. 2008. [4] Dongyan Z., Pietkiewicz A., Cuk S.: “A three-switch high voltage converter”, IEEE Transactions on Power Electronics. vol. 14, no. 1, pp. 177–183, 1999. [5] Rosas-Caro, J.C.; Ramirez, J.M.; Peng, F.Z.; Valderrabano, A.; , "A DC-DC multilevel boost converter," IET Power Electronics. vol.3, no.1, pp.129-137, 2010. [6] Erickson R., Maksimovic D., Fundamentals of Power Electronics. Second Edition, USA: Kluwer Academic Publishers, 2001, pp. 42-45. [7] Zhu, M.; Luo, F.L.; , "Series SEPIC implementing voltage-lift technique for DC-DC power conversion," Power Electronics, IET , vol.1, no.1, pp.109-121, March 2008. [8] Jingying Hu; Sagneri, A.D.; Rivas, J.M.; Yehui Han; Davis, S.M.; Perreault, D.J.; , "High frequency resonant SEPIC converter with wide input and output voltage ranges," Power Electronics Specialists Conference, 2008. PESC 2008. IEEE , vol., no., pp.1397-1406, 15-19 June 2008. [9] Miao Zhu; Fang Lin Luo; , "Implementing of Developed Voltage Lift Technique on SEPIC, Cúk and Double-Output DC-DC Converters," Industrial Electronics and Applications, 2007. ICIEA 2007. 2nd IEEE Conference on , vol., no., pp.674-681, 23-25 May 2007. [10] Fang Lin Luo; Hong Ye; , "Positive output super-lift converters," Power Electronics, IEEE Transactions on , vol.18, no.1, pp. 105- 113, Jan 2003. [11] Hebertt Sira-Ramírez and Ramón Silva-Ortigoza. “Control Design Techniques in Power Electronics Devices.” Springer. 2006. [12] Mayo-Maldonado J. C., Salas-Cabrera R., Cisneros-Villegas H., Gomez-Garcia M., Salas-Cabrera E. N.,Castillo-Gutierrez R. and Ruiz-Martinez O. Modeling and Control of a DC-DC Multilevel Boost Converter. World Congress on Engineering and Computer Science, San Francisco, USA. 2010.

Abstract This work introduces a set of PWM SEPIC dc-dc converters specially designed for high voltage-gain conversion, the voltage gain in the proposed converters can be adjusted by PWM and by adding diodes and capacitors in a diodecapacitor multiplier structure. They main features are: (i) high-voltage gain, without extreme duty cycles and transformer-less which allow high switching frequency and without cascaded connection, (ii) low voltage stress in switching devices, along with modular structures, and more output levels can be added without modifying the main circuit, which is highly desirable in some applications such as renewable energy generation systems (iii) it posses only one switch and two inductors, the voltage gain can increases by adding only diodes and capacitors. In addition, an average dynamic model is proposed for this converter. A detailed theoretical analysis is given. Both simulation and experimental results are provided to verify the principle of operation.

1. Introduction High voltage-gain is difficult to achieve with traditional topologies of dc-dc converters because the extreme duty cycles and transformer requirements limits the switching frequency and systems size [1-5]. For green energy generation, the low voltage from a renewable energy source need to be boosted for feeding a grid connected inverter. A transformer with a large voltage gain is undesirable because it enhances the transformer non-idealities [4]. To reduce the dc-dc converters’ size, the use of high switching frequency results in small inductors and capacitors with equivalent current and voltage ripples [1-5]. This is the motivation to use several hundred of kilohertz [1]. The natural switching delays in actual switches limits the switching frequency when the duty ratio is too small or too big; a solution to this is the employment of transformers to reduce the voltage without using small duty ratios. However, the transformer's losses limit the This work was supported by PROMEP in Mexico under the project “Desarrollo de convertidores con estructuras multiplicadoras de voltaje para fuentes de generación alterna”, Number: ITCMAD-PTC-007.

switching frequency also; along with the development of high speed MOSFETs the switching frequency limitation becomes a transformer's issue [1-4]. The use of multilevel converters for renewable energy micro generation brings the promise to build compact converters made with small power MOSFETS, with a minimum ESR and transformer-less connected to the utility grid. There exists the challenge to couple the low dc voltage from the renewable energy source to the high dclink voltage of the multilevel converter. The Single-ended primary-inductor converter also called SEPIC converter s one of the traditional topologies and has many industrial applications [6-8], see Fig. 1(a). Some important characteristics are: (i) it provides a positive output voltage, (ii) when the converter is off, C1 prevents any current to flow from the input to the output. The output voltage is provided in C2 and its related to the input voltage and the switch duty cycle D as:

VC 2 D = Vin 1 − D

(1)

Although D can theoretically takes values from 0 to 1, providing a theoretically infinity boost factor, parasitic elements limit the upper limit usually to 0.9, also for increasing the switching frequency it is better the duty cycle to be around 0.5. Some traditional ways of increasing the voltage gain without using extreme duty cycles are: (i) using transformers which limit the switching frequency as mentioned and (ii) cascaded connection of converters which increase the complexity of the system [7]. Recently, some topologies have been proposed for overcoming those challenges such as hybridizing traditional topologies with diode-capacitor multipliers [4-5] and the Voltage Lift Technique [7,9-10]. Hybridizing traditional topologies with diode-capacitors multipliers brings the advantage of using few inductors reaching high efficiency, high power density and simple structures with few switches and inductors [4-5]. This work proposes a family of dc-dc multiplier converters as an extension of the traditional SEPIC

topology hybridized with diode-capacitor multipliers. The proposed structures achieve high voltage gain without extreme duty cycles and transformer-less, which allow high switching frequency, they have low voltage stress in switching devices, modular structures, and more output levels can be added without modifying the main circuit.

2. Applications Fig. 1(a) shows the traditional SEPIC converter which can be also called 1x multiplier SEPIC converter, the 2x multiplier SEPIC converter is shown in Fig. 1(b). The designation of nx multiplier converter is according with the number of output capacitors n in the converter.

and C1 charges L2 with a positive current. 4- When the switch opens again the current in L2 closes d1 charging C2 with a positive voltage. This basic principle explained for the circuit in Fig. 1(a) applies for the converter in Fig. 1(b) and also: 5- When the switch open and the current in L2 closes d1, see Fig. 2(a), the negative side of C3 and C4 are connecter together, and then C3 can close d3 to charge C4 with a positive voltage. 6- When the switch closes, C1 gets in series connection with C2, see Fig. 2(b) and the can charge C3 by closing d2. The operation explained above make the SEPIC converter to drive a diode-capacitor multiplier, in this case is a 2x multiplier, but it can be extended by adding diodes and capacitors.

Fig. 1. SEPIC converter (a) traditional 1x (b) 2x converter.

As in other dc-dc converters the switch keeps open and keeps open a time ton and then closes keeping in this way a time toff. T is the total switching period which is constant and equal to ton+toff, a duty cycle D is given by the next definitions:

D=

t on ; T

1− D =

t off

(2)

T Fig. 2. Equivalent circuits when (a) the switch is off (b) the switch is on.

Lets assume than initial conditions of the converter are zero (current in inductors and voltage in capacitors are zero). The basic operation principle of the SEPIC converter, see Fig. 1(a), can be explained as:

The average voltage in L1 during one switching cycle can be expressed as:

L1 1- When the switch closes, it connects L1 to the input voltage and the current in L1 increases with a constant slope and positive sign (according with the sign definition in Fig. 2). 2- When the switch opens, the current in L1 charges C1 with a positive voltage (according with the sign definition). 3- When the switch closes connects L2 in parallel with C1

d iL1 dt

=

1 (tonvL1ton + toff vL1toff ) T

(3)

Where vL1ton is the voltage across L1 when the switch is on and vL1toff is the voltage across L1 when the switch is off, this expression can be writhen in terms of the duty cycle defined in (2) as:

L1

d iL1 dt

= Dv L1ton + (1 − D)v L1toff

(3)

The voltage across L1 during the switching states can be derived from the equivalent circuits shown in Fig. 2.

v L1ton = Vin

(4)

vL1toff = Vin − VC1 − VC 2

(5)

In steady state the current across inductors is constant because the average voltage across the inductor is zero, from (3) and substituting (4) and (5) this can be expressed as:

DVin + (1 − D )(Vin − VC1 − VC 2 ) = 0

d iL 2 dt

= Dv L 2ton + (1 − D )v L 2toff

D 1 = Vin 1− D 1− D

(13)

And from Fig. 2(a) it can be seen that the voltage in C4 is the same as the voltage in C3:

VC 4 = VC 3 = Vin

1 1− D

(14)

The output voltage is given by VC2+VC4 which can be expressed as:

1 1 + D (15) D Vout = VC 2 + VC 4 = Vin + = Vin 1− D 1− D 1− D

(6)

In the other hand, using the duty cycle definition, the average voltage in L2 can be expressed as:

L2

VC 3 = VC1 + VC 2 = Vin + Vin

The achieved voltage gain is very high Fig. 3 shows the voltage gain again the duty cycle.

(7)

In the same way as L1, the voltage across L2 during the switching states can be derived from the equivalent circuits shown in Fig. 2.

v L 2 ton = −VC1

(8)

vL 2toff = VC12

(9)

In steady state the average voltage across L2 is zero, it can be expressed from (7) and substituting (8) and (9) as:

D (−VC1 ) + (1 − D )VC 2 = 0

(10)

From (10), the voltage in C2 can be expressed as:

VC 2 = VC1

D 1− D

(11)

Substituting (11) in (6) it can be gotten that:

VC1 = Vin

(12)

From Fig. 2(b) it can be seen that C3 is charged by C1 and C2 in series and then:

Fig. 3. Voltage boost factor again duty cycle.

From Fig. 2(a) it can be send that the voltage the switch has to block is low compared with the output voltage, this is highly desirable because a high voltage converter can be build with low voltage devices, in other topologies such as the cascaded boost converter, a switch need to block the output voltage which limits the maximum output voltage to the voltage handled by the transistor. As it can be seen from Fig. 1, the SEPIC converter is used to drive a diode-capacitor voltage multiplier also called the Dickson charge pump, in this way an 3x multiplier SEPIC converter and nx multiplier SEPIC converter can be developed, see Fig. 4.

proposed converter. This representation may be used for control purposes. A wide series of control techniques that may be employed for controlling this converter are shown in [11], where the state space representation of the traditional Sepic converter is included as well. Let us define the position of the switch as = ݑ1 and = ݑ0 when it is closed and opened respectively. According to the definition above, and considering = ݑ1, the behavior of the equivalent circuit of the converter (see Fig. 2b) can be represented by the following dynamic equations,

Fig. 4. 3x multiplier SEPIC converter and possible extension of nx.

All capacitors over C3 in the Dickson charge pump get the same voltage of C3, and then the output voltage of the 3x multiplier SEPIC converter is:

Vout 3 x = VC 2 + VC 4 + VC 6 = Vin

2+ D 1− D

(16)

And for the nx multiplier SEPIC converter the voltage gain is given by:

݀ ݅ = ܸ ݀ ݐଵ ݀ ܮଶ ݅ଶ = ݒଵ ݀ݐ ݀ ܥଵ ݒଵ = −݅ଶ − ߣଵ ݀ݐ : ݀ ݒଵ + ݒସ ଵ ۔ ۖܥଶ ݀ݒ ݐଶ = − ൬ ܴ ൰ − ߣଵ ۖ ݀ ۖ ܥଷ ݒଷ = ߣଵ ۖ ݀ݐ ۖ ݀ ݒଵ + ݒସ ۖ ܥସ ݒସ = − ൬ ൰ ە ݀ݐ ܴ ۓ ۖ ۖ ۖ ۖ ۖ ۖ

ܮଵ

(18)

Voutnx

n −1 + D = Vin 1− D

(17)

The number of inductors, switches, diodes and capacitors for developing the proposed topology is shown in the next table.

1x 2x 3x nx

Inductors 2 2 2 2

Switches 1 1 1 1

Capacitors Diodes 2 1 4 3 6 5 2n 2n-1

Another advantage of the proposed topology is that the voltage gain can be increased without increasing the number of inductors which are difficult to encapsulate and without increasing the number of switches which require more circuitry.

3. Dynamics of the Multiplier Sepic Converter In this section, a brief analysis of the dynamics of the Multiplier Sepic Converter is presented. The purpose of this section is to provide a state space representation of the

The set of dynamic equations Σଵ that is shown in (18) corresponds to the variables of the elements that store energy in the converter; ݅ଵ and ݅ଶ correspond to the currents of the inductors ܮଵ and ܮଶ ; ݒଵ , ݒଶ , ݒଷ and ݒସ correspond to the voltages across capacitors ܥଵ , ܥଶ , ܥଷ and ܥସ respectively. The element ߣଵ represents an electrical current that feeds capacitor ܥଷ . This element produces a very fast dynamics in the converter. In the equivalent circuit of the converter, when = ݑ1 (see Fig. 2b), it is clear that capacitors ܥଵ and ܥଶ are in parallel with ܥଷ . When they are in parallel connection, ܥଷ takes charge from ܥଵ and ܥଶ . Therefore, the element ߣଵ may be defined as ߣଵ =

ሺݒଵ + ݒଶ ሻ − ݒଷ ܴீଵ

Where the parameter ܴீଵ is a very small resistance in capacitors and the switch. It is clear that the current represented by element ߣଵ tends to be zero as voltage ݒଷ tends to be equal to ݒଵ + ݒଶ . Let us consider the equivalent circuit of the converter when the switch is closed, this is = ݑ0. The behavior of the equivalent circuit (see Fig. 2a) can be represented by the following dynamic equations,

:

ۓ ۖ ۖ ۖ ۖ ۖ ۖ

݀ ܮଵ ݅ଵ = −ሺݒଵ + ݒଶ ሻ + ܸ ݀ݐ ݀ ܮଶ ݅ଶ = −ݒଶ ݀ݐ ݀ ܥଵ ݒଵ = ݅ଵ ݀ݐ

ݒଵ + ݒସ ݀ ۔ ۖܥଶ ݀ݒ ݐଶ = ሺ݅ଵ + ݅ଶ ሻ − ൬ ܴ ൰ ۖ ݀ ۖ ܥଷ ݒଷ = −ߣଶ ۖ ݀ݐ ۖ ݒଵ + ݒସ ݀ ۖ ܥସ ݒସ = ߣଶ − ൬ ൰ ە ݀ݐ ܴ (19)

The set of dynamic equations Σ that is shown in (19) has an element ߣଶ , this element represents a current that appears when = ݑ0. In other words, when the switch is opened, capacitor ܥଷ and ܥସ are in parallel connection. Therefore, it is possible to define the current ߣଶ as follows ݒଷ − ݒସ ߣଶ = ܴீଶ

Where the parameter ܴீଶ is a very small resistance that is present in capacitors and the switch. It is clear that the current represented by element ߣଶ tends to be zero as voltage ݒସ tends to be equal to ݒଷ . Once obtained the sets of dynamic equations for each equivalent circuit, let us define { = ݑ0,1} as the input of the system. In order to obtain a state space representation that is valid for both equivalent circuits, this input is included. ሺ1 − ݑሻሺݒଵ + ݒଶ ሻ ܸ ݀ ݅ଵ = − + ݀ݐ ܮଵ ܮଵ ݀ ݒݑଵ ሺ1 − ݑሻݒଶ ݅ = − ݀ ݐଶ ܮଶ ܮଶ ሺ1 − ݑሻ݅ଵ ݑሺ݅ଶ + ߣଵ ሻ ݀ = ݒ − ݀ ݐଵ ܥଵ ܥଵ : ሺ1 − ݑሻሺ݅ଵ + ݅ଶ ሻ ߣݑଵ ݒଵ + ݒସ ୗୗ ݀ ۔ − −൬ ൰ ۖ݀ݒ ݐଶ = ܥଶ ܥଶ ܴܥଶ ۖ ݀ ߣݑଵ ሺ1 − ݑሻߣଶ ۖ = ݒ − ۖ ݀ ݐଷ ܥଷ ܥଷ ۖ ሺ1 − ݑሻߣଶ ݀ ݒଵ + ݒସ ۖ = ݒ −൬ ൰ ە ݀ ݐସ ܥସ ܴܥସ ۓ ۖ ۖ ۖ ۖ ۖ ۖ

(20) The state space representation Σௌௌ shown in (20) is

clearly nonlinear. It is important to note that when more capacitors are added as illustrated in Fig. 4, the number of equations will be increased as well. However, the structure of the state space representation will not be strongly modified. In addition, a reduced order state space representation may be derived with a similar method as it was performed for another multiplier topology [12]. Average models are frequently used for analysis, and control of the power electronics converters [11]. In these models, the input ݑis replaced by the average input ݑ௩ which is also known as the duty cycle of the converter that takes values between 0 and 1. In this case, average models represent the average currents and voltages for each equation in (20). Let us consider ݑ௩ = [0,1] as the input of the system. In addition, we will consider both the input current ݅ଵ and the output voltage ݒ = ݒଶ + ݒସ as ݕ, the output of the system, because they are the most important variables in which we could be interested. Therefore the following set of equations will be defined as the average dynamic model of 2x Multiplier Sepic Converter, ሺ1 − ݑ௩ ሻሺݒଵ + ݒଶ ሻ ܸ ݀ ݅ =− + ܮଵ ܮଵ ݀ ݐଵ ݀ ݑ௩ ݒଵ ሺ1 − ݑ௩ ሻݒଶ ݅ଶ = − ܮଶ ܮଶ ݀ݐ ሺ1 − ݑ௩ ሻ݅ଵ ݑ௩ ሺ݅ଶ + ߣଵ ሻ ݀ = ݒ − ܥଵ ܥଵ ݀ ݐଵ ሺ1 ሻሺ݅ ሻ ݀ − ݑ + ݅ ݑ ߣ ݒଵ + ݒସ ௩ ଵ ଶ ௩ ଵ : = ݒ − −൬ ൰ ݐ݀۔ଶ ܥଶ ܥଶ ܴܥଶ ۖ ݑ௩ ߣଵ ሺ1 − ݑ௩ ሻߣଶ ݀ ۖ ݒଷ = − ܥଷ ܥଷ ݀ݐ ۖ ۖ ሺ1 − ݑ௩ ሻߣଶ ݀ ݒଵ + ݒସ ۖ = ݒ −൬ ൰ ݀ ݐସ ܥସ ܴܥସ ۖ ۖ ە = ݕሾ݅ଵ ݒଵ + ݒସ ሿ் = ሾ݅ଵ ݒ ሿ் ۓ ۖ ۖ ۖ ۖ ۖ ۖ ۖ

(21)

4. Simulation and Experimental Results The 2x multiplier SEPIC converter was simulated and prototyped for proving the principle of the proposition. The schematic is shown in Fig. 1(b) with all capacitors equal to 220µF and both inductors equal to 200µH, the input voltage is 25V and the switching frequency is 20kHz. The load was changed with a resistors bank. Fig. 5 shows the experimental prototype.

Fig. 5. Experimental prototype.

circuit with the parameters shown in Fig. 5 was simulated in the software Synopsys Saber. On the other hand, a model-based simulation was performed in MATLAB by employing the proposed average dynamic model Σ in the set of equations (21). The purpose of these simulations is to validate the proposed model with a well-known circuit simulator. In Fig. 8 and Fig. 9, the proposed outputs for the dynamic model are shown, these are the current ݅ଵ and the output voltage ݒ = ݒଶ + ݒସ .

Fig. 6 shows both simulation and experimental waveforms for a duty cycle of 0.6 and a load of 72Ω, the average input current is 5.52A, a small delay around 2.5µs is observed in the current due the delay in the current probe, the output voltage is smaller than the one in the simulation due losses in the real prototype. Fig. 7 shows waveforms for the simulation and experimental prototype with a duty cycle of 0.6 and a load of 63Ω, the average input current is 6.08A. Fig. 8. Comparison between the circuit-based simulation and the average model-based simulation of current ݅ଵ .

Fig. 6. Experimental waveforms with D=0.6 and Rout=72Ω.

A detailed theoretical analysis is given along with experimental results to verify the main characteristics.

Fig. 9. Comparison between the circuit-based simulation and the average model-based simulation of the output voltage ݒ = ݒଶ + ݒସ .

The rest of the state variables of the average dynamic model Σ are shown in Figures 10, 11, 12, 13 and 14, that correspond to ݅ଶ, ݒଵ , ݒଶ , ݒଷ and ݒସ respectively.

5. Conclusions

Fig. 7. Experimental waveforms with D=0.6 and Rout=63Ω.

Fig. 7 shows waveforms for the simulation and experimental prototype with a duty cycle of 0.6 and a load of 63Ω, the average input current is 6.08A. In the following figures, simulations of the dynamic behavior of the Multiplier Sepic Converter are shown. The

This work proposes a family of dc-dc multiplier converters as an extension of the traditional SEPIC topology hybridized with diode-capacitor multipliers. The proposed structures achieve high voltage gain without extreme duty cycles and transformer-less, which allow high switching frequency, they have low voltage stress in switching devices, modular structures, and more output levels can be added without modifying the main circuit. The voltage gain can be increased without increasing the number of inductors which are difficult to encapsulate and without increasing the number of switches which require

more circuitry, by using few inductors converters get reach high efficiency, high power density and simple structures. An average dynamic model is proposed. Several control techniques may be employed based in this model for the open-loop operation of the 2x Multiplier Sepic Converter.

Fig. 14. Comparison between the circuit-based simulation and the average model-based simulation of voltage ݒସ .

5. References Fig. 10. Comparison between the circuit-based simulation and the average model-based simulation of current ݅ଶ .

Fig. 11. Comparison between the circuit-based simulation and the average model-based simulation of voltage ݒଵ .

Fig. 12. Comparison between the circuit-based simulation and the average model-based simulation of voltage ݒଶ .

Fig. 13. Comparison between the circuit-based simulation and the average model-based simulation of voltage ݒଷ .

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