Onboard Condition Monitoring of Solder Fatigue in IGBT Power Modules B. Ji, V. Pickert, W. P. Cao, and L. Xing
Abstract—This paper proposes a novel on-board condition
[4], aircraft [5], wind turbines [6], smart grid [7] and industrial
monitoring of the aging of solder layers in IGBTs for electric
drives [8]. IGBT modules are switching elements designed for
vehicle applications. The diagnostic technique makes use of the
high-power levels and constitute the central component of
chip itself as a temperature sensor while current sensors are
modern power electronic converters. Their reliability and
already in place for control purposes. An auxiliary power supply
operational lifetime are of great concern, especially for safe
unit which can be created from the 12V battery and an in situ
critical applications where a sudden failure may result in a
data-logger circuit is developed for condition monitoring. The
catastrophic accident and high penalty costs.
novel aspect of the proposed technique relates to monitoring
The failure rate has traditionally been employed as a
IGBTs in situ when the electric vehicle is operating during
reliability index to electrical apparatus and devices, which
stop-and-go traffic conditions or at routine services. The
generally follow the so-called bathtub curve. As shown in Fig. 1,
accelerated aging tests are performed on the test vehicles and the
it can be divided into three stages including early failure period,
condition monitoring system is validated using simulation and
random failure period and wear-out failure period. A product
thermo-electrical experimentation. The thermal performance of
manufacture defect and improper design can always lead to
the thermal resistance/impedance and junction temperature of the
early failures while random failures are mainly due to the
IGBTs demonstrates the effectiveness of the proposed technique
intermittent excessive stress (electrical, thermal, mechanical,
for IGBT health monitoring.
etc) over the maximum rating of the devices. With continuous improvements within quality control, semiconductor chip and
Index Terms—Monitoring, insulated gate bipolar transistors, power
electronics,
prognostics
and
health
packaging technologies, system protection and optimum control
management,
algorithms, such failures can be largely reduced. On the other
semiconductor device reliability, thermal management
hand, the wear-out failure occurring towards the end of lifetime I. INTRODUCTION
is generally caused by the chronic environmental and
Due to the superior performance and rapid development
operational loadings. Solder fatigue is a commonly observed
towards high power density, high efficiency, and low cost,
wear-out failure mode, which is susceptible to IGBT failures if
insulated gate bipolar transistor (IGBT) power modules have
left untreated, and is therefore the focus of this paper.
been widely used in the consumer and industrial power electronic systems such electric vehicles (EVs) [1]-[3], ships
B. Ji, V. Pickert and L. Xing are with the School of Electrical and Electronic Engineering, Newcastle University, Newcastle upon Tyne, NE1 7RU, United Kingdom, England. (
[email protected]) L. Xing is with the School of Chemical Engineering &Advanced Materials, Newcastle University, Newcastle upon Tyne, NE1 7RU, United Kingdom,
Fig. 1. Change in failure rate over time (bathtub curve)
England.
978-1-4799-0025-1/13/$31.00 ©2013 IEEE 9
In this paper, an in situ condition monitoring (CM) circuit
capability is diminished resulting in increased thermal impedance
was proposed for a traction motor drive in EV applications. The
and junction temperature. This may not generate a sudden failure
on-board diagnostic and prognostic test was conducted to
but can deteriorate the device performance and eventually lead
demonstrate the solder layer condition monitoring capability.
to ultimate failures (i.e. hot spot, latch up, burn-out, etc.). In
The CM circuitry can be embedded in an advanced gate driver
addition, device power losses are always increased as a result of
unit (GDU) and each IGBT in the inverter can be monitored
the increased junction temperature, which becomes a positive
sequentially within a short period of time when the EV is
feedback mechanism and will accelerate deteriorations.
operating during stop-and-go traffic conditions or at routine services. In this case, many of the catastrophic failures as a result of solder fatigue could be avoided. This paper is organized with an introduction of the contemporary IGBT packaging and review of solder fatigue detection methods in Section II. Section III then presents the on-board condition monitoring system with considerations for real applications. Section IV shows the simulation and
Fig. 2.Schematic diagram of a standard IGBT module
experimental results. Section V gives the conclusion.
B. Condition Monitoring of Solder Fatigue II. IGBT MODULES AND SOLDER FATIGUE
Recently, extensive research activities in achieving high
Power electronic converters EV applications are required to
IGBT reliability with CM methods are going on world-wide,
adapt to harsh environments and diverse mission profiles. This
which can be generally divided into model-driven and
will burden the IGBT power modules which undergo
data-driven methods. Model-driven estimation deduces the
substantial power cycles and thermal cycles [9-12].
temperature cycle in real-time from case temperature, device
A. Solder Fatigue of IGBT Modules
losses, and thermal network [17-20]. Apart from the difficulty
The schematic diagram of the cross-section view of a
of loss estimation, assumptions for simplicity are always made
standard IGBT module is shown in Fig. 2. It is assembled with
to neglect the coupling effects from other forms of fatigue
different materials in a multilayered structure. Typically, the
mechanisms. Indeed, an increase of thermal resistance always
IGBT chip is soldered onto a direct copper-bonded (DCB)
comes with the solder aging. An alternative is to use
substrate, which is composed of ceramic and metallized copper
data-driven method where diagnosis and condition monitoring
films. The DCB is then soldered onto a copper baseplate. In
are performed entirely depending on the measured signals.
common, chip surface is connected to copper tracks by wire
Various non-destructive testing (NDT) techniques were studied
bonding methods. The assembly is housed by a plastic case and
to correlate featuring parameters with solder layer fatigue in the
encapsulated with silicon gel and epoxy. Thermal interface
literature. Scanning acoustic tomography or microscopy
material (TIM) is always inserted between the baseplate and
(SAT/SAM) techniques have been widely used and a real-time
heat sinks for cooling purpose.
based failure detector was claimed [21]. Active thermography
Due to the coefficient of thermal expansion (CTE)
based strategies are also investigated and the detection of the
mismatch between base plate and DCB substrate, as well as
degraded solder joints after a 2mm thick Cu layer was
temperature gradients, repetitive expansion and contraction
demonstrated [22]. A time-domain reflectometry technique by
stresses are built up in the solder layer, resulting in failure
monitoring RF impedance stimulated by high-frequency signal
mechanisms such as creep [13], voids [14], cracks [15,16] and
(GHz) was also introduced which shows superior effectiveness
delamination [15,16]. Consequently, the heat conduction
over traditional dc resistance based monitoring method [23]. All
10
B. Hardware Setup
above methods rely on sophisticated measurement systems which are normally costly and space consuming. In addition,
Generally, fault diagnostic functions implemented in
necessary physical charges of the conventional power converter
conventional gate drive units (GDUs) are used for overstress
assembly are required to accommodate these systems, which
detections
are not feasible to be implemented in practice. These methods
over-current, over temperature, etc). Up to now it was almost
are yet immature and have only been used for laboratory test
impossible to diagnose the solder layer health and predict its
purpose. A simplified CM method was proposed to estimate the
lifetime. One of the clear technical challenges in current solder
thermal resistance increase as a result of case-above-ambient
CM method is measurement accuracy. It requires the extraction
temperature rise, but the effect of degradation upon thermal
of small temperature (a few °C) and electrical signals (a few
interface material and heat sink cannot be separated [24].
millivolts) from larger ones (hundreds of volts) meaning that
and
post-fault
protections
(over-voltage,
conventional methods can not apply to in situ measurements.
III. IMPLEMENTATION OF IN SITU CONDITION MONITORING
That is, the variations in prognostic parameters resulting from ageing are relatively small and it can be overwhelmed by noise
A. Condition Monitoring with Thermal Characterization The junction-to-case thermal impedance is characterized
or disturbances in the EV power network which are associated
and monitored here to enable IGBT solder failure detection.
with changes in operating conditions (temperature, loading or
The transient thermal impedance (TTI) is generally defined as
control). As a result, a dedicated data-acquisition method is
the time dependent temperature difference between silicon chip
developed to improve the measurement accuracy. Fig. 3 shows photographs and schematic diagrams of the
and reference point divided by the constant power loss (P). (1)
complete experimental setup. In Fig. 3(a), the DUTs (IGBTs)
Heating and cooling curves are complementary for linear
are placed in the thermal chamber to maintain a required testing
thermal system and can both be used for TTI measurement.
environment and tested using the proposed on-board CM circuit.
Generally, cooling curve is recorded when heating power is
In Fig. 3(b), T1-T6 are six identical IGBTs, D1-D6 are six
removed after reaching a thermal steady state. It normally
FWDs and M is an electric motor. The measurement circuitry
requires a long period of time (i.e. tens or hundreds of seconds)
consists of: 1) an auxiliary power supply unit (PSU); 2) a gate
which is depending on the packaging and cooling properties.
drive and protection circuit; 3) a measurement circuit with
Heating curve, on the other hand, can be implemented with
digital isolation; and 4) selector relays.
/
defined heating power prior to thermal steady state and allows fast in situ monitoring. In order to meet EVs’ requirement, the heating method is used and the length of the heating pulse is
DUT
controlled to focus on the DCB solder layers. Since several factors have been reported in the literature that can affect the Thermal chamber
TTI measurement result including power dissipation magnitude, type of temperature response, environmental conditions (mounting techniques, heat sink temperature, etc) and selection of temperature sensors (for both junction and reference temperature measurement), careful considerations are required in order to assure accurate and meaningful results under actual applications.
(a) Photographs of the experimental setup
11
where k, Cp, ρ, qs and Q are the thermal conductivity, heat capacity, density, absorption/production coefficient and heat, respectively. The dimension of each layer and material properties of the corresponding layer within the IGBT module are given in Table II and III. The applied power corresponds to the power loss based on practical measurements when it conducts current of 60A with on-state voltage measured in real time. The switching losses are neglected due to the low switching frequency and high duty ratio. The same loading is applied when solder fatigue are introduced. The effect of progressive solder fatigue was modeled by introducing a perfect 3 um thick ‘crack’ layer (infinite thermal resistance) located within the DCB to baseplate solder joint and their results are compared in Fig. 4. It is clear that the heat in the ‘crack’ pocket is difficult to remove and thus give rise to its temperature. (b) The condition monitoring circuit within the EV power inverter
TABLE I
Fig. 3. The proposed in situ measurement circuitry
TEMPERATURE DEPENDENT THERMAL CONDUCTIVITY OF SILICON
IV. SIMULATION AND EXPERIMENTAL RESULTS
Temperature, T (K) 250 300 350 400 500
A. FEM Simulation Result Finite element method (FEM) is performed using COMSOL
Thermal Conductivity, k (W/mK) 191 148 119 98.9 76.2
Multiphysics software to evaluate the thermal characteristics of the device under different solder conditions and their results are later compared with practical measurement results. It is assumed that conduction is the only heat transfer mechanism and all heat generated from IGBT chip flows through the DCB and base plate and out of the heat sink. Side walls are assumed to be adiabatic, i.e. the flow of heat is totally constricted across the edges. The contact thermal resistance between two adjacent layers is also excluded. The temperature dependence of other material properties is neglected except for the silicon thermal conductivity, which is sufficiently large. This is approximated based on Table I [25,26]. A dissipative power step is applied to the active chip volume, i.e. 100um from the chip top surface. The ambient temperature is set to be 21°C and a defined heat transfer coefficient is applied to the bottom of the heat sink to simulate the forced air cooling. The heat flow in each layer is calculated with the partial differential equation .
(2)
Fig.4 FEM analysis using COMSOL for (a) healthy (100%) and (b) faulty (36%) solder layers between DCB and base plate
12
TABLE II MATERIAL PROPERTIES FOR IGBT POWER MODULE CONSTRUCTION
Material silicon Solder copper alumina copper Dow corning 340 aluminium
Thermal conductivity, λ (W/(m*K)) 163 70 400 27 400 0.54 160
Mass density ,ρ (kg/m3) 2330 8000 8700 3900 8700 2140 2700
Specific heat,c (J/(kg*K)) 703 250 385 900 385 250 900
(a)
TABLE III DIMENSIONS OF THE IGBT POWER MODULE IGBT
L(mm) W(mm] H(mm)
6.5 6.5 0.22
Die attach 6.5 6.5 0.08
DCB copper 28.44 26.12 0.3
ceramic 30.60 28.44 0.38
Base plate solder 28.44 26.12 0.08
Base plate 91.48 31.40 3
B. Power Loss Measurement Power dissipation from the device junction is developed by injecting constant heating current during IGBT forward conduction state. Ambient temperature is controlled with the thermal chamber and heat sink with forced air cooling is used. A controlled heating current pulse train is shown in Fig. 5(a). The
(b)
heating current and on-state voltage are measured with their
Fig.5 heating pulse for TTI measurement (a) and (b) under different
multiplication representing the instantaneous power loss. Only
ambient temperature
conduction losses are considered and the switching losses are neglected due to low switching frequency of the heating pulses.
Since the thermal resistance of DCB solder contributes only a
Since the on-state voltage VCE(on) gradually increases with the
small portion to the total junction-to-case thermal resistance,
elevated junction temperature, an increased power dissipation is
high dissipation power is required which enables larger
observed as illustrated in Fig.5(b). In addition, the on-state
temperature gradient at given thermal resistance. Consequently,
voltage, as well as the power dissipation, is also influenced by ambient temperature. Although fixed heating power can be
more accurate junction-to-case thermal impedance can be
achieved by adjusting the gate voltage or collector current via
determined by increasing the signal-to-noise ratio (SNR).
feedback control, this may add system cost and complexity
The heating power can be assumed to follow a conductive
[27]. As
heat flow path from the heat dissipating junction of the IGBT to a
consequence,
fluctuated
power
dissipation
is
the environment. A finite amount of time is required for the heat
segmentally averaged for quasi-TTI measurement. The power
generated from device to propagate outward. This offers a
dissipation waveform is represented approximately by m sequential pulses with averaged amplitudes of P1, P2, ···, Pm.
spatial inspection of the thermal performance of the
The amplitude of each pulse can be calculated based on the
multilayered power module. By controlling the length of the
equation below with N being the total samples within the pulse.
applied heating pulse, the depth of the heat diffusion can be
Pav =
1 N
N
∑
VCE ( on ) (u ) ⋅ I C (u )
regulated. This allows the solder layer condition to be focused (3)
within the power assembly. However, a compromise has to be
u =1
13
made between maximising the variation due to the thermal property change in the layer of interest and minimising the interference due to changes from subsequent layers in the measurement of the thermal impedance.The length of the heating pulse is defined based on the transient dual interface (TDI) measurement [28] and 2s is selected as the end of TTI measurement. C. Junction temperature measurement
Fig.6 Heating curve TTI measurement at 1s and 2s for different solder
The IGBT junction temperature is required for thermal
conditions
performance test and it is normally determined by temperature sensitive electrical parameters (TSEPs) [29,30]. The on-state voltage drop is used here for its simple implementation and a linear
temperature
dependency.
Prior
to
the
thermal
characterization, the TSEP of each DUT shall be calibrated individually. Since TSEP measurement can not be achieved at the same time as the heat generation, an approach referred to as the switched method is used during heating response. The IGBT is switched from a heating condition when heating current is applied to the TSEP measurement condition when only
(a)
calibration current is applied (as shown in Fig. 5a) [30]. The thermal impedance calculation error resulting from the cooling effect due to measurement delay is corrected by extrapolation. D. Results Accelerated passive thermal aging test is performed on devices with the air-to-air thermal shock chamber. The temperature varies from -50°C to 160°C. The dwell time is 10 min with a 2 min transition time. The thermal cycling is interrupted at 800 and 1300 cycles. TTI measurement are performed and the thermal resistance at t =1s, 2s are compared as shown in Fig. 6. This is also compared with simulation result.
(b)
The IGBT chip surface temperature under healthy and faulty solder conditions is demonstrated by the thermal images shown
Fig. 7 Thermal images of an IGBT surface temperature with healthy
in Fig. 7(a). An increase in the maximum chip temperature goes
and faulty solders (a) and its 1-dimentional temperature plot (b)
from 117°C in initial state to 129°C in aged state according to
V. CONCLUSION
the DCB solder changes from healthy state to degraded state after 1300 thermal cycles. The temperature gradient over the
This paper has demonstrated importance of the diagnostic
IGBT chip surface did not exceed 50°C in the initial state but
and prognostic capability for IGBT solder layers. Research has
reached more than 55°C in the aged state and this is illustrated
shown that with the solder layer degradation, junction-to-case
in Fig. 7(b).
thermal impedance and chip surface temperature variation also increase. The principle of the proposed method for in situ
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condition monitoring was explained. A novel on-board D/P technique with protection and sensor circuitry for IGBTs has been proposed in this paper, which can be embedded in an advanced gate drive circuit to improve system reliability. The condition monitoring system was verified using computer simulation and thermo-electrical experimentation on an in situ diagnostic and prognostics prototype. ACKNOWLEDGMENT The authors gratefully acknowledge the financial support of EPSRC project EP/K008552/1 on novel calorimeters for developing high-efficiency power converters and electrical machines. REFERENCES [1]
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