PASSIVE COMPONENTS AND PASSIVE

Proc. 8 th Int. Conf. Mixed Design of Integrated Circuits and Systems MIXDES 2001, Zakopane, June 2001, p.395 -400

PASSIVE COMPONENTS AND PASSIVE INTEGRATED CIRCUITS – STATE OF THE ART A. DZIEDZIC, L.J. GOLONKA WROCŁAW UNIVERSITY OF TECHNOLOGY, POLAND KEYWORDS: Passive component, MCM, LTCC

ABSTRACT: This paper present current situation in the area of discrete and integrated passive components. More than one billion resistors and capacitors are used by electronics industry every year. Most of them are surface mount components where 0603 (1.6x0.8 mm) package size is the most popular. However, next packaging genera tion introduced into electronics needs passives 10 times smaller, cheaper and dense packaged. This creates the necessity of complete changes in the market of passives. Therefore arrays and networks of passives are discussed, too. However, only the integral components should fulfil the demand for the next 10 years. Therefore, realisation and properties of integral passives for MCM-D, MCM-L and especially MCM-C modules are treated in detail. The activity and achievements of the Institute of Microsystem Technology, TU Wrocław in the area of LTCC passives and polymer thick-film resistors are presented and compared with current world tendencies. Integral – passive either embedded in or incorporated on the surface of an interconnecting substrate, On-chip – passive on active ICs, SOC – System on Chip, SOP - System on a Package

INTRODUCTION The world wide market in passive components is estimated to be 25$ milliard today [1]. About 1 billion resistors and capacitors were built in 1997 [2]. 55 milliard of them were integrated into 11 milliard arrays and networks. There was a prediction that 160 milliard discrete components would be replaced by 32 milliard integrated passives in 2000, 345 milliard by 69 milliard in 2003 and 900 milliard by 150 milliard in 2009, respectively [2]. National Electronics Manufacturing Initiative (NEMI) in USA defined a following terms describing passive components [2-4]: Discretes – traditional single purpose surface mount or through-hole passives, Arrays – multiple passive elements of like function in a single SMT case, Networks – multiple passive elements of more than one function in a single SMT case, usually 4 to 12 elements, Integrated – a package containing more than one passive, multiple passive elements of more than one function and possibly a few active elements in a single SMT or Chip Scale Package (CSP)

TABLE 2. Typical passive components requirements for various electronic circuits (based on [6]) Analog and mixed-signal circuits Application Value range Tolerance [%] Resistors 10 Ω – 100 MΩ 1 – 10 Signal capacitors 10 pF – 10 nF 5 – 10 Decoupling capacitors 0.01 – 0.1 μF 10 – 20 EMI filter capacitors 1 – 10 nF 10 – 20 Choke inductors 1 – 10 μH 10 – 20 Digital circuits Application Value range Tolerance [%] Filter resistors 1 – 10 MΩ 20 Pull-up/down 1 – 30 kΩ 10 – 20 Resistors Terminating resistors 20 – 100 Ω 1 – 10 Decoupling capacitors 0.01 – 0.1 μF 10 – 20 Timing capacitors 10 – 100 pF 10 – 20 RF and microwave circuits Application Value range Tolerance [%] Terminating resistors 20 – 100 Ω 1 – 10 Signal resistors 10 – 100 Ω 1 – 10 Signal capacitors 1 – 20 pF 5 – 10 Decoupling capacitors 0.01 – 0.1 μF 10 – 20 Choke inductors 1 – 10 μH 10 – 20 Signal inductors 1 – 20 nH 1 – 10 Tummala et al [4] have proposed recently a new solution for a future called System on a Package (SOP). One of

TABLE 1. Passive to active ratio for recent products [5] Product Notebook computer Desktop computer PCS phone

Total components 900 1285 380

Passive to active ratio 6:1 15 : 1 21 : 1

395

Proc. 8 th Int. Conf. Mixed Design of Integrated Circuits and Systems MIXDES 2001, Zakopane, June 2001, p.395 -400 the most important parts of SOP packaging is the integration of passive elements. The number of passive components in hand held devices and computers is greater than 80% (Table 1) of the total part counts and the passive to active ratio continues to grow [4]. The passive components requirements are presented in Table 2. Integral passives is the best technology for very high component density with increased electrical performance, improved reliability, reduced size, weight and lower cost. The integral passives and elimination of SMT will lead to the reduction of overall part count, elimination of solder joints, improvement of wireability and frequency due to elimination of parasitic inductance.

transformers. The mean linear dimensions of passives were decreased twice during recent twenty years (Table 3). But this is incomparably less than characteristic dimension of integrated circuits. This is one of basic reasons why the ratio between passive and active devices is increased all the time. However, further diminishing of passives comes to the equipment barrier – modern pick-and-place machines are not adjusted for accurate placement of 0201 and 01005 discrete components. Therefore old ideas of planar arrays and networks were reanimated. It is worth to notice that four 0603 capacitors, together with solder pads and technological margins, need 0.027 cm2 area. But array of 4 identical capacitors placed in one 1206 ceramic structure needs only 0.012 cm2 of printed circuit board area. Moreover, considering the necessary technological margins, the contribution of area (volume) of active layer in relation to nominal device dimensions is decreased for smaller packages. For example this is 43% in 1206 multilayer ceramic capacitors and only 19% in 0402 ones. Smaller area is not the only advantage of passive arrays and networks. In comparison with discrete surface mount components they are characterised by smaller serial inductance and better frequency behaviour as well as lower assembly cost and higher circuit reliability.

MODERN PASSIVE COMPONENTS To-day electronic industry almost does not use wirewound components. Around 1980’s the technology of through-hole packaging moved toward surface mount and wirewound devices were gradually but very rapidly replaced by surface mount components. Probably about 80% of passives is adapted for SMT at this very moment. There are not only such standard devices as resistors, capacitors and inductors but also potentiometers, varistors, thermistors, fuses or

TABLE 3. Percentage contribution of package sizes of passive components (based on [7]) Year Package size 1206 0805 0603 0402 0201 01005

1975

1980

1985

1990

1995

2000

2005

2010

100

89.5 10.5

41.0 54.5 4.5

13.0 78.0 9.0

6.5 50.0 40.0 3.5

5.0 22.0 60.0 13.0

2.0 7.0 39.0 49.5 2.5

1.0 2.5 20.0 60.0 15.0 1.5

MCM-C, where multilayer structures are made by co-firing ceramic or glass/ceramic tapes, similar to thick-film process. This means that vias are punched in green tapes and then they are filled with conductive electronic paste. The individual layers are printed with thick-film inks to create metallization patterns. Several such prepared tapes are laminated at elevated temperature and pressure and then cofired at proper temperature to form a monolithic structure. Modern MCM substrates consist not only of interconnection lines but also of many integral (embedded) passives. In this manner they fulfil the demands for the next generation of packaging needs.

PASSIVES IN MULTICHIP MODULES Multichip modules (MCM) are an extension of hybrid technology, which permit a higher packaging density than can be assures by other approaches. Because the signal transmission lines in MCM are placed on many levels and the ratio of bare VLSI circuits` area (mounted on MCM surface) to MCM area is greater than 20% the multichip modules can transmit signals with frequency higher than 100 MHz [8]. There are three kinds of MCM technology: MCM-D, where interconnections are formed in a simple manner similar to those used to fabricate thin-film circuits, i.e. by depositing alternate layers of conductors and dielectrics onto an underlying substrate,

For example, surface mount resistors and capacitors have inherent parasitics, due to their geometry. Perhaps the most important is the parasitic inductance, which affects the high frequency behaviour and thus limits transmission speed. But integral passives should

MCM-L, where multilayer structures are formed by lamination of printed circuit board materials with etched patterns in copper foils and metallised vias,

396

Proc. 8 th Int. Conf. Mixed Design of Integrated Circuits and Systems MIXDES 2001, Zakopane, June 2001, p.395 -400 eliminate or reduce the parasitics connected with the current passive packages.

TABLE 4. Integral resistors in MCM-D multilayer structures

Integral passives in MCM-D and MCM-L

Resistive Deposition material technology

The integral resistors, capacitors and inductors in MCMD are in concept very simple. Planar resistive layer is deposited onto module substrate or on internal surface of polymeric materials used for planarisation. The resistor patterns varied from 0.5 to 200 s quares whereas the materials for resistive layers as well as their resistivity, thickness and sheet resistance are listed in Table 4. The capacitor dielectrics – oxides, nitrides or ceramic compositions (Table 5) – with a 150-200 nm thickness are sandwiched between two metal foils. These non-porous, thin dielectrics will allow very high capacitance density. The actual capacitance density is dependent on the dielectric constant and thickness. However components with higher capacitor density tend to have lower breakdown voltages and higher leakage current [9]. Inductors most often are patterned in conductive films as multi-turn circular or squared coils in a co-planar configuration, size from 200 m to 2000 m, inductance range from 0.5 nH up to more than 100 nH, useable frequency range up to 20 GHz and quality factors up to 50 [10]. Higher inductance (up to 600 nH) but for lower frequency range and with lower quality factor can be made using screen-printed polyimide filled NiZn and MnZn ferrites [11]. It is true that quite different substrates are used in fabrication of MCM-D (Si, 99.5% Al2O3, AlN) and MCML (various laminates, e.g. FR-4) modules. But polymeric materials are used for surface planarisation of some versions of MCM-D technology. Such solutions accept only low-temperature deposition methods of conductive, resistive and dielectric films. Therefore they were adapted for MCM-L modules creating so-called MCMD/L structures. These deposition methods are specified in Table 4 and 5. However, there are also fabrication processes specific only for MCM-L technology. For example conductive layers are made usually by proper pattern etching in copper foil. But screen-printed polymer thick-film conductive tracks are allowable, too. Resistive layers can be made using meander patterned Cr or NiCr metallic films, electroless deposited Ni-P/Ni-W-P alloy films [12] with sheet resistance between 5 and 50 /sq. and temperature coefficient of resistance reduced to almost zero, commercially available Ohmega-Ply resistor/conductor material with sheet resistances of the order of 25, 50, 100 and 250 /sq. [13], or commercially available polymer thick-film resistors with much wider range of sheet resistance [14].

TiW (N) Sputtering alloy TaN TaNx Ta2N Reactive sputtering Ta2N NiCr NiCr alloy doped with Si CrSi CrSi Ta Evaporation + selective anodisation Ta-Al Evaporation + selective anodisation MoSi2 Evaporation + plasma etching RS 3710 Evaporation alloy + plasma etching M/SiOx (M = Ti,Ta,Mo, W,Cr)

Resistivity / thickness / sheet resistance / TCR [ 10-6 m / nm / /sq. / ppm/K] - / 100 / 23 / 30 to +30

Ref.

[15]

- / - / 100 / 2-10 / 200 / 10-50 / 2.4 / 25-100 / 25-100 / -

[16] [17] [18]

2 / 100 / 20 / [19] - / - / 100 / [16] - / 20-100 / 20-100 / 10 to [10] +10 - / - / 360-500 / [16] - / 50 / 180 / [20] - / - / 50-200 / -100 to +100 [21]

- / - / 10-200 / 120 to + 180 [21]

- / - / 50-200 / 150 to –100 [21]

- / - / 50-3000 / 100 to 400 [21]

100-700 / - / - / 800 to 0

[19]

Capacitors can be fabricated using not only a part of materials listed in Table 5 but also based on standard or specially developed FR-4 type material (with dielectric constant K = 9 and 40 m dielectric thickness [22] – in this case the capacitance density is only equal to 0.05 nF/cm2). The capacitance density increase is visible for thinner dielectric with larger permittivity. Current activity of Georgia Institute of Technology is directed towards nanophase ceramic/polymer composites that take advantage of the higher dielectric constant of ceramics together with low processing temperature of polymers. One should note that lead magnesium niobiate/lead titanate, chosen as ceramic filler because of its high dielectric constant at room temperature (K = 17 800), was mixed with various epoxies. The composite with 70 vol. % of ceramic powder has dielectric constant K of about 80. Such spin-coated films with typical composite thickness of about 10 m are currently possible and this leads to 7 nF/cm2 capacitance density [23,24].

397

Proc. 8 th Int. Conf. Mixed Design of Integrated Circuits and Systems MIXDES 2001, Zakopane, June 2001, p.395 -400 TABLE 5. Integral capacitors in MCM-D multilayer structures Dielectric Deposition material technology

Al2O3 Ta2O5 Ta2O5 Ta2O5 Ta2O5 TaxOy SiO2 Si3N4 SiNx SixNy

DLC2)

Reactive sputtering

Anodisation

Reactive sputtering Plasma enhanced CVD1) RF plasma assisted CVD

Dielectric constant / thickness / capacitance density [ - / nm / nF/cm2] - / 150 / 50 - / 160 / 130 21 / 500 / -

Ref.

- / 200 / 80 - / - / 100 20 to 40 / - / - / 240 / 140 - / 400 / 167 - / 100-300 / 25-90

[19] [9] [16] [25] [25] [19]

- / 200 / 30

[15,1 6]

- / 200 / 30-40

[18]

bury precision passive components in the inner layers. The technology is presently to a point where resistors can be printed and co-fired to an accuracy of 15%-30%, capacitors to an accuracy of 10%-20% and inductors 5%-10% in a production environment [26]. Concentrated efforts by LTCC material and components manufacturers to improve material availability are very successful. The values of resistors or capacitors exceed the limits of thick film printing processes. Solderable surface mount pads, that interconnect to the inner layers, can be printed as a co-fired or post fire process and the surface mount chip components can then be added to the top or bottom surfaces during a final process [26]. Both surface and buried resistors are available in LTCC technology. Resistor sheet values from 10 /sq. to 1 M /sq. are available for surface resistors and 10 /sq. to 100 k /sq. for buried ones. These values depends upon the LTCC system used. Resistor tolerances of 1% to 2% are possible for surface resistors, 10% to 20% for lower sheet value buried resistors and 30% to 50% for higher than 10 k /sq. [26]. Surface resistor value may be adjusted to higher tolerances by laser trimming. This method may be employed also with buried resistors, but trim windows in upper foils must be made in this case. High voltage pulses is another trimming method used for buried resistors.

[25] [25] [20]

DLC PZT3)

- / - / 25 [9] Spin coating 700-1200 / 200-1000 / 1000- [25] sol-gel + 3000 calcination 1) CVD – chemical vapour deposition 2) DLC – diamond-like carbon also referred as amorphous hydrogenated carbon (a-C:H) 3) PZT – Pb(Zr1-xTix)O3

TABLE 6. Embedded resistors in LTCC structures LTCC tape / resistor type Ferro A6 / FX 87

Integral passives in MCM-C

Du Pont 951 AT / EMCAT8800 / Du Pont 951/ CF

Most of the MCM-C integral passives are made in LTCC (Low Temperature Cofired Ceramic) modules. It is very difficult to make integral elements inside TFM (Thick Film Multilayer) structure. There is not possible to have embedded HTCC (High Temperature Cofired Ceramic) passive elements due to 1600oC cofiring temperature of such module. Thick-film resistors can be printed on the top and bottom part of the LTCC module. Surface capacitors and inductors may also be printed there and then trimmed to specific values. It is desirable in many applications to

Sheet resistance / TCR / tolerance [Ω/sq. / ppm/K / %] 10-100 / ±450/ ±10 1k-10k / ±200 / ±10 35-1k / - / 10-100k / - / 10-10k / ±200 / ±20

Ref.

[27] [28] [28] [29]

Capacitors are fabricated in LTCC system by placing parallel plates on adjacent tape layers. Capacitance value up to 70 pF/cm2 may be fabricated using standard EMCA K 7 and Du Pont K 7.8 tapes or 55 pF/cm2 for Ferro K 5.9 A6 tape. Higher capacitance values up to 125 nF/in 2 may be obtained by using K500 – K700 dielectric. Buried K1000 dielectrics are in develop-

TABLE 7. Capacitors fabricated in LTCC system [28]

Dielectric Type Dielectric constant K Capacitance range [pF] * Loss tangent [%] Breakdown voltage [VDC] (min) Capacitance tolerance [%] * Ag electrodes

System Ferro X7R NPO 300 5-6 10-4000 1-100 200 >500 ±20 ±20

398

System Du Pont X7R NPO 500 7-8 10-6800 1-200 200 >500 ±20 ±10

System EMCA X7R NPO 700 6-7 10-9500 1-150 200 >500 ±20 ±10

Proc. 8 th Int. Conf. Mixed Design of Integrated Circuits and Systems MIXDES 2001, Zakopane, June 2001, p.395 -400 ment [28]. The parameters of capacitors made by LTCC technology are presented in Table 7. Prediction of LTCC future miniaturisation is presented in Table 8.

Among others it was shown that some mixed combinations guarantee very similar electrical properties as technological variants recommended by manufacturers.

TABLE 8. LTCC technology roadmap (based on [30,31]) Parameter Min. via size [μm] Min. via pitch [μm] Min. line width [μm] Min. line pitch [μm] Line density [cm/cm2] Max. module size [cm2] Max. working frequency [GHz] Max. working temperature [oC]

1998 250 500 125 250 40 130 10 125

2003 40 125 20 40 200 360 38 160

Electrodes

2009 25 75 15 30 267 645 80 200

Microplanar passive s Fired LTCC Buried component

Surface component

Fig. 1. Schematic cross-section of buried and surface microplanar LTCC resistor

PASSIVES AT THE INSTITUTE OF MICROSYSTEM TECHNOLOGY, TU WROCŁAW

The internal or through holes are commonly used as electrical and/or thermal vias in MCM substrates . Therefore for example conductive inks usually fill them in LTCC structures. We made a novel, quite original configuration of LTCC passive components (Fig. 2) where the holes were filled by resistor, thermistor or varistor inks [39]. The microvolume resistors, thermistors or varistors were placed there after lamination and firing process. All dimensions of such passives (limited by via diameter and tape thickness) are comparable. The proposed configuration can increase packaging density of passives significantly.

Our activity in the area of passive components is concentrated on miniaturisation of planar resistive components (Fig. 1), both on alumina substrate as well as on/in LTCC structures. The 60 125 m2 microresistors were fabricated using photoprintable silver Fodel inks as resistor termination [32,33] whereas 100 300 m2 were made, when the distance between electrodes was created by laser cutting of dried conductive films [34]. Up to now microresistors with Fodel terminations exhibit much stronger geometrical effect (this means significant dependence of sheet resistance, hot temperature coefficient of resistance and normalised temperature dependence of resistance on resistor length) from those with laser patterned electrodes [33,35]. Moreover the durability of polymer, cermet and LTCC thick-film resistors to series of “short” pulses (pulse duration between 20 and 1000 s) as well as behaviour of these components during single “short” pulse were investigated [36,37]. Long-term stability of as-fired/as-cured resistors or laser trimmed and exposed to high voltage pulses ones were tested. It was shown that standard ageing of modern resistors does not differentiate their behaviour. However prior exposition of tested devices to laser beam and especially to high voltage pulses makes possible much more selective analysis of resistors’ quality [36]. There is an interesting question from user’s point of view if LTCC materials from different manufacturers (in particular green tapes and resistive inks) can be applied in one process or differences in composition of various green tapes make such compatibility impossible. Therefore we investigated basic electrical and stability properties of buried and surface resistors made from three different resistor systems on/in three different LTCC tapes from the same producers [38].

Electrodes

Microvolume passive components Surface component

Fired

LTCC

Buried component

Fig. 2. Schematic cross-section of buried and planar microvolume LTCC resistor The other investigations carried on at the Institute of Microsystem Technology are related to materials science of polymer thick-film resistors because, as was proved in previous Chapter, polymer thick filmtechnology is very important in development of MCML modules. Polymer thick-film resistor systems based on polyesterimide (PEI) resin and high or medium structure carbon black were invented and their chosen physicochemical and electrical properties were examined, analysed and discussed [40]. The basic electrical properties of system with high structure carbon black are low sensitive to changes of curing conditions and this system is characterised by excellent stability (comparable with cermet thick-film resistors for general destination) under different environmental

399

Proc. 8 th Int. Conf. Mixed Design of Integrated Circuits and Systems MIXDES 2001, Zakopane, June 2001, p.395 -400 exposures [41]. It was shown that the kind of functional phase affect voltage nonlinearity and 1/f noise properties of polymer thick-film resistors very strongly [42,43]. For example the noise intensity of carbon black/polyesterimide thick-film resistors is almost always lower than that of model cermet ones with equivalent sheet resistance. But the noise intensity of (carbon black + graphite)/PEI resistors was found to be more than two order of magnitude larger than the noise intensity of carbon black/PEI resistors and us ually also larger than the noise intensity of cermet components [43].

[18] R.J. Saia, H.S. Cole, K.M . Durocher, M .C. Nielsen, Proc. 1998 Int. Conf. on M ultichip M odules and High Density Packaging, 1998, pp. 349-353 [19] N.P. Kim et al., Proc. Int. Symp. on M icroelectronics (ISHM -USA), 1997, pp. 157-163 [20] G. M orcan et al., Int. J. M icrocirciuts and Electronic Packaging, vol.21, 1998, pp. 306-314 [21] A.I. Vorob`eva, K.V. M oskvichev, Russian M icroelectronics, vol. 29, 2000, pp. 368-375 [22] S. O’Reilly et al., Proc. IM APS-Europe Prague 2000, pp. 7-12 [23] S.K. Bhattacharya, R.R. Tummala et al. , Proc. EM IT`98 Conf., 1998, pp. 308-313 [24] Y. Rao, J. Qu, T. M arinis, C.P. Wong, IEEE Trans. on Comp. and Pack. Technol., vol.23, 2000, pp. 680-683 [25] D. Liu et al., Proc. 1999 Int. Conf. on High Density Packaging and M CM s, 1999, pp. 431-437 [26] Q.C. Scrantom, G.J. Gravier, www.scrantom.com [27] Ferro product literature, 2000 [28] Scrantom product literature, www.scrantom.com [29] C.R.S. Needes, D.I. Amey, S.J. Horowitz, Proc. 2000 IEM T/IM C, 2000, pp. 376-381 [30] S.J. Horowitz, R.R. Draudt, D.I. Amey, M .A. Skurski, M .A. Smith, Adv. Packg., M arch 1999, pp. 40, 42, 44, 45 [31] R.E. Cote, S.J. Horowitz, J.W. Lawson, Electronic Packaging and Production, April 1998, pp. 42-44, 46,48 [32] M . Henke, R. Bauer, L. Golonka, L. Rebenklau, A. Dziedzic, K.-J. Wolter, Proc. 22nd ISSE, Dresden-Freital (Germany), 1999, pp. 105-110 [33] R. Bauer, A. Dziedzic, L. Golonka, K.-J. Wolter, Proc. IM APS-Europe Prague 2000, pp. 134-139 [34] J. Kita, A. Dziedzic, L.J. Golonka, Proc. 23rd ISSE, Balatonfüred (Hungary), 2000, pp. 219-224 [35] A. Dziedzic, L.J. Golonka, R. Bauer, L. Rebenklau, Proc. 22nd IM APS-Poland Conf., 1999, pp. 119-122 [36] J. Kita, A. Dziedzic, L.J. Golonka, G. Żuk, Proc. 12th Eur. M icroelectronics Conf. (IM APS-Europe), Harrogate, 1999, pp. 313-319 [37] A. Dziedzic, L.J. Golonka, J. Kita, H. Roguszczak, T. Żdanowicz, Proc. 1st IM APS-Eurpope Symp., Prague 2000, pp. 194-199 [38] A. Dziedzic, L.J. Golonka, J. Kita, H. Thust, K.-J. Drue, R. Bauer, L. Rebenklau, K.-J. Wolter, M icroelectronics Reliability, vol.41, 2001 (in printing) [39] A. Dziedzic, L.J. Golonka, W. M ielcarek, Proc. 12th Eur. M icroelectronics Conf. (IM APS-Europe), Harrogate, 1999, pp. 3-9 [40] A. Dziedzic, „Grubowarstwowe rezystywne mikrokompozyty polimerowo-węglowe“, Of. Wyd. Politechniki Wrocławskiej, Wrocław 2001 (in printing) [41] A. Dziedzic, K. Nitsch, A. Kolek, Proc. 11th Eur. M icroelectronics Conf., Venice, 1997, pp. 622-626 [42] A. Dziedzic, J. Kita, P. M ach, Vacuum, vol.50, 1998, pp. 125-130 [43] A. Dziedzic, A. Kolek, J. Phys. D: Appl. Phys., vol.31, 1998, pp. 2091-2097

THE AUTHORS Dr. Andrzej Dziedzic and Prof. Leszek Jan Golonka are with the Institute of M icrosystem Technology, Wrocław University of Technology, Wybrzeże Wyspiańskiego 27, 50-370 Wrocław, Poland. E-mail: [email protected], [email protected]

Acknowledgements This work was supported by the Polish State Committee for Scientific Research, grant No 8T11B 055 19

REFERENCES [1] S.K. Bhattacharya, R.R. Tummala, M icroelectron. J., vol.32, 2001, pp. 11-19 [2] R.E. Cote, Adv. M icroelectron., Jan./Feb. 1999, pp. 20-21 [3] L. Schaper, T. Lenihan, Adv. Packg., Feb. 1998, pp. 22-26 [4] R.R. Tummala, G.E. White, V. Sundaram, S.K. Bhattacharya, Adv. M icroelectron., Jan./Feb. 2000, pp. 13-19 [5] National Electronics M anufacturing Initiative (NEM I) “Passive component technology roadmap”, Dec. 1998 [6] R.C. Frye, Int. J. of M icrocircuits and Electronic Packaging, vol.19, 1996, pp. 483-489 [7] R. Lasky, Electronic Packaging and Production, M arch 1998, pp. 77-78 [8] P.E. Garrou, I. Turlik, “M ultichip M odule Technology Handbook”, M c Graw-Hill, New York 1998 [9] H. Kapadia, H. Cole, R. Saia, K. Durocher, Adv. M icroelectron., Jan./Feb. 1999, pp. 12-15 [10] P. Pieters, E. Beyne, Proc. 1998 Int. Conf. on M ultichip M odules and High Density Packaging, 1998, pp. 478-483 [11] S.K. Bhattacharya, J.Y. Park, R.R. Tummala, J. M ater. Sci.: M ater. in Electron., vol.11, 2000, pp. 455-460 [12] S.K. Bhattacharya, R.R. Tummala, J. M ater. Sci.: M ater. in Electron., vol.11, 2000, pp. 253-268 [13] Ohmega product literature, 1998 [14] T.A. Estes, F.M . Long, Proc. Int. Symp. on M icroelectronics (ISHM -USA), 1990, pp. 338-344 [15] M . de Samber et al., Proc. 1998 Int. Conf. on M ultichip M odules and High Density Packaging, 1998, pp. 285-290 [16] T. Lenihan et al., Int. J. M icrocirciuts and Electronic Packaging, vol.20, 1997, pp. 474-481 [17] K.L. Coates et al.., Proc. 1998 Int. Conf. on M ultichip M odules and High Density Packaging, 1998, pp. 490-500

400