Performance of Grid Interfaced Solar PV System under Variable Solar Intensity Sanjay Kumar, Arun Kumar Verma Member, IEEE, Ikhlaq Hussain, Student Member, IEEE and Bhim Singh, Fellow, IEEE Department of Electrical Engineering, Indian Institute of Technology Delhi, New Delhi-110016, India Email:
[email protected],
[email protected],
[email protected] and
[email protected] Abstract—This paper proposes an enhanced phase locked loop
for harmonics elimination, load balancing, reactive power compensation, PFC (Power Factor Correction) or ZVR (Zero Voltage Regulation). The advantage of this control algorithm over other algorithms is its speed and accuracy of its response and its performance is not affected due to noise and distortion. Further, it is adaptive in nature and adopts the changes in phase angle, frequency and amplitude of the input signal and its implementation in real time using DSP or any other embedded control is easy.
(EPLL) based control algorithm of a double stage solar photovoltaic (PV) grid interfaced power generating system, which also mitigates power quality problems in 3P4W (three phase, four wire) distribution system. The proposed solar PV grid interfaced system consists of solar PV array, boost converter, four-leg voltage source converter (VSC) and connected linear/nonlinear loads. The proposed solar PV power generating system provides load balancing, eliminates harmonics, corrects the power factor, and regulates at PCC (Point of Common Coupling) voltages under different loads. Proposed solar PV grid interfaced power generating system is modeled and simulated in the MATLAB and results are shown to validate the design and control for feeding 3P4W loads with improved power quality.
The solar PV grid interfaced generating system using EPLL is designed, modeled and its performance is simulated in Simulink tool box of MATLAB for ZVR and PFC along with compensation of harmonics current and balancing of different loads.
Keywords: EPLL, VSC, zero voltage Regulation (ZVR) and power factor correction (PFC), power quality (PQ).
I.
II. DESIGN OF PROPOSED SYSTEM The design of proposed 100 kW solar PV power generating system as shown in Fig. 1 is given in terms of solar PV array, dc-dc boost converter, interfacing inductors and dc bus capacitor as follows. The detailed design data of proposed system is in Appendices.
INTRODUCTION
During last two decades, the solar photovoltaic (PV) generation is growing and that too produces electricity without producing global warming pollution. The use of solar PV arrays is getting cost effective means of generating power. Solar energy can be used as an alternative source as it is ecofriendly renewable energy source. World’s oil reserves are estimated only for 40 to 50 years where as solar energy will last forever [1].
A. Design of Solar PV Array It is designed for the peak power capacity of 100 kW rated at 415 V ac grid. A solar PV module has short circuit module current (Isc) of 3.8 A and open circuit module voltage (Vocn) of 21 V [9]. The maximum power for SPV array is given as, Pmp = (ns*Vmp)*(np*Imp) = 100 kW (1) where ns and np represent series and parallel strings of PV module, Vmp is the voltage of a module at MPPT, Imp is the current of a module at MPPT and Pmp is the nominal power of a module at MPPT. The Pmp is generally achieved under the condition given as, Pmp = (ns*85% of Vocn * np*85 % of Isc) = 100 kW (2) Thus, Imp is 3.3 A and Vmp is 17 V of each module. Considering, PV array open circuit voltage (VOCT) = 700 V. The PV modules connected in series string are estimated as, VOCT = ns * Vocn, thus ns = 700/21 = 34 Modules (3) Maximum current of the PV array is given as, Imp = Pmp / (0.85 * VOCT) = 168.067 A The PV modules connected in parallel string are estimated as, Imp = np*Isc, thus np = 43 Modules (4)
Due to growing demand, grid interfaced solar PV generating systems are becoming popular and posed new challenges [1]. Presently single-stage, two-stage and multilevel grid interfaced systems are commonly used in solar PV generation [2-3]. In two stage solar PV generating system, the power quality problems are not considered in detail with and without availability of sun [4]. However, the power quality (PQ) problems are dominant in the grid because of various nonlinear loads in the distribution system. The specific challenges that affect the power quality are poor power factor, poor voltage regulation, and reactive power compensation at ac mains. Maximum power point tracking (MPPT) from solar PV array is also a challenging task and several methods of MPPT are used [5-6]. In two stage, the boost converter with MPPT is used to track the maximum solar PV power from the solar PV array In this paper, proposed control algorithm based on enhanced phase locked loop (EPLL) scheme [7-8] for solar PV grid interfaced power generating system is implemented
978-1-4799-6046-0/14/$31.00 ©2014 IEEE
1
Fig. 1 The proposed system schematic configuration
where ω is angular frequency and vdcrip is % ripple voltage considered as 3% of Vdc. Hence estimated value of dc link capacitor Cdc is 10832.4 µF and it is selected as 15000 µF.
Thus the array of 100 kW peak power capacity is designed with 43 modules in parallel and 34 modules in series with an PV array of 43*34 modules. B. Design of DC-DC Boost Converter The ripple current for inductor at D = 0.3 is given as [10], Lb =
VMPP D 595 * 0.3 = = 2.125 mH ΔI1 f sw (8.4 *10000)
III.
The control algorithm of the solar PV power generating system consists of two stages. First MPPT control to track peak power of solar PV array using dc-dc boost converter and second stage is used to control a grid interfaced VSC also operating as a shunt compensator. The detailed control algorithm is explained as follows.
(5)
where ΔI1 is input current ripple, and it is considered as 5 % of dc-dc boost converter inductor current I1 (PMPP/ VMPP) = 168.06 A. Thus a calculated value of ΔI1 is 8.4 A and the inductance (Lb) value is selected as 2.2 mH.
A. MPPT The drawbacks of P&O and IC algorithms are overcome by using variable step INR method [5-6]. Variable step is usually large when away from MPP and reduces to small as the system reaches MPP. The MPPT depicts as follows,
C. Design and Selection of DC Capacitor Voltage To achieve proper load compensation the dc link voltage Vdc value is given as [10],
Vdc =
(2
2VLL 3m
) = (2
2 * 415 3 *0.95
) = 713.27 ≈ 700 V
δ(n) = δ(n − 1) ± K(dp / dpv)
(6)
D. Selection of AC Inductor The ac inductor (Lf ) value is estimated as [10],
3mVdc 3 *0.95*700 = = 1.12mH 12hf s Δi 12*1.2*103 *(0.05*142.85)
dI pv Vpv
(7)
dI pv
where ∆i is current ripple = 5% of input current, fs is switching frequency = 10 kHz, h is overloading factor and is taken as 1.2. The Lf from (7) is calculated as 1.12 mH. The selected value is 1.2 mH.
( Pdc / Vdc )
( 2*ω * v ) dcrip
=
(105 / 700) = 10832.4μ F ( 2*314*0.03*700 )
= Vpv + I pv
dVpv dI pv
(10)
Thus both instantaneous Vpv/Ipv and incremental resistance dVpv/dIpv are compared and MPP is tracked. B. Control of VSC Fig. 2 shows the control algorithm for the extraction of the load current fundamental component and further this component is used to extract load current active power and reactive power components. These active and reactive components of load currents are used to generate reference grid currents. The PCC voltages (vsa, vsb, vsc), load currents (iLa, iLb, iLc), Vdc of VSC are mains parameters of the control algorithm. Amplitude of PCC voltage (Vt) is estimated as,
E. Design of DC Link Capacitor The dc link capacitor value is given as [10], Cdc =
(9)
where δ is the duty cycle at sampling instant nth and δ(n-1) is a duty cycle at sampling instant (n-1)th and is a factor to control step size. This method is based on that slope of (dVpv/dIpv) must be zero at MPP as,
where VLL is the VSC ac line voltage, m is modulation index.
Lf =
CONTROL ALGORITHM
(8)
2
∫ ∫
∫
θ
Fig. 2 Control algorithm for proposed solar PV power generation system
important role in extraction of the fundamental component from the polluted load current. The values of K1, K2, and K3 are chosen as 140, 10, and 5 respectively in order to estimate fundamental load component.
(11)
Vt = {(2 / 3)(vsa2 + vsb2 + vsc2 )}
The unit vectors in-phase of phase voltages are derived as,
uap =
vsa v v , ubp = sb , ucp = sc Vt Vt Vt
(12)
2) Estimation (11) of Reactive and Active Power Components of Load Currents The amplitude of fundamental reactive and active power components is extracted from phase ‘a’ load current fundamental component iLfa using a zero crossing detector (ZC1), quadrature template (uaq), sample and hold block (SH1) in-phase template (uap). Similarly, load fundamental active and reactive power currents (iLpb, iLpc) and (iLfb, iLfb) are also estimated in phase ‘b’ and ‘c’. The load current average active power component (ILpA) is estimated as,
The unit vectors in quadrature with grid voltages vsa, vsb and vsc are derived from vectors wap, wbp and wcp, as,
uaq = −
ubp 3
+
ucp 3
, ubq =
−ucp 3
+
uap 3
, ucq = −
uap 3
+
ubp 3
(13)
1) Extraction of Fundamental Components of Load Current The fundamental component of load current is extracted as output of EPLL. Performance of the EPLL is controlled with three controlling constants given as K1, K2 and K3. The EPLL computes the magnitude, phase and frequency of the input load current signals. The EPLL is well described in a given equation as, iLfa = ⎡⎣∫ ( e) sin θ k1 dθ ⎤⎦ sinθ
where
θ = ∫ ⎡⎣∫ e k2 cosθ dθ + w sinθ} + e k3 cosθ ⎤⎦ dθ
I LpA =
iLpa + iLpb + iLpc
(15) 3 Similarly, the load currents reactive power component (ILqA) is estimated as,
(14)
I LqA =
where (e = iLa - iLfa) is the difference between signals and ila is the fundamental load current, it is called as error. This error (e) is multiplied by the sin/cos component and further parameters K1, K2, K3 play an important role and control the steady state and transient behavior of the loop. It plays an
iLqa + iLqb + iLqc 3
(16)
3) Active Power Components of Grid Current The error voltage in reference dc link voltage v*dc and sensed vdc at nth sampling instant is given as, vdcerr ( n ) = v*dc ( n ) − vdc ( n )
3
(17)
generation are achieved for the control of the combined operation of the VSC based PV power generating system.
The PI controller output to regulate the dc link voltage of VSC at nth sampling instant is given as,
{
}
I wp ( n ) = I wp ( n −1) + K pdc vdcerr ( n ) − vdcerr ( n −1) + K idc vdcer ( n )
(18)
V. RESULTS AND DISCUSSION Simulated results of solar PV grid interfaced power generating system are discussed in this section. The system performance under constant solar intensity and variable load is demonstrated in Fig. 3, whereas under constant load and variable solar intensity is demonstrated in Fig. 4. A nonlinear load is realized by using a diode bridge rectifier load and load unbalancing is achieved by removing one phase for certain duration.
where Iwp(n) is another component of grid current, Kpdc and Kidc are proportional gain and integral gain constants. Therefore, total grid current active power component of (I*active) is estimated by adding to output iof controller and dc component (ILactive) of load currents, Iwp(n) as,
I *rp = I LpA + I wp
(19)
Therefore, in phase components or active power components of reference instantaneous grid currents in phase of PCC voltages are calculated as,
i*sadi = I *rp * uap , i*sbdi = I *rp * ubp , i*scdi = I *rp * ucp
The system performances are depicted as grid currents (iisa, iisb, iisc), load current (iLa, iLb, iLc), grid voltages (vsa, vsb, vsc), active power (P), reactive power (Q) and VSC current (ii). Here solar PV array voltage Vpv, solar PV array power and current as Ppv and Ipv are respectively.
(20)
4) Quadrature Component of Grid Current PCC voltage is controlled using a PI regulator. The terminal voltage amplitude (Vt) is estimated in (11) and the reference terminal voltage amplitude value (Vref) are fed to the voltage controller. The voltage error is estimated as, verr ( t ) = V *tref ( t ) − Vt (t )
A. Performance of Proposed System Configuration under Variable Solar Intensity and Variable Load Fig. 3 shows the dynamic performance of solar PV grid interfaced system subjected to variable solar intensity and variable loads. These are the various results during the unbalanced load operation. Load unbalancing is realized at 0.4s and continues until 0.6 s. During load unbalancing, the grid currents are sinusoidal and balanced. The magnitude of the PCC voltage is almost constant and very close to reference value, thus voltage regulation is achieved.
(21)
Output of PI voltage regulator at nth instant is given as,
{
}
I *wq ( n ) = I *wq ( n −1) + K pt verr ( n ) − ver ( n −1) + K it verr ( n )
(22)
where Kpt and Kit are the proportional gain and integral gain of voltage controller. Thus the reactive component of grid current amplitude is given as, I *rq = − I LqA + I *wq( n) (23)
B. Performance of Solar PV Grid Interfaced System under Constant Load and Variable Solar Intensity Fig. 4 shows various performance parameters during operation of the solar PV grid interfaced system under constant load and variable solar intensity. The solar intensity is reduced to zero at 0.5 s, the VSC supplies the required active power. The solar intensity is 1000 W/m2 initially and it is reduced to zero gradually at 0.5s. At 0.5 s onwards the active power of the solar PV grid interfaced system is supplied by the grid and the direction of the active power flow is reversed after 0.5 s. At 0.5 s the solar PV current is zero thus solar PV power is also zero. The dc link voltage is regulated at reference value and grid currents are sinusoidal.
The reference supply grid currents instantaneous quadrature component are calculated as,
i*saqu = I *rq * uaq , i*sbqu = I *bq * ubq , i*scqu = I *rq * ucq
(24)
5) Generation of Reference Grid Supply Currents Total reference grid currents are estimated from (20) and (24) as,
i*sa = i*sadi + i*saqu , i*sb = i*sbdi + i*sbqu , i*sc = i*scdi + i*scqu * sn
i = iLao +iLbo +iLco
(25)
The THD of grid supply voltage, grid supply current and load current at various operations are given in Table I, it shows that the voltage and current harmonics are well within the IEEE-519 standard [11].
(26)
6) PWM Current Controller Gating pulses for VSC are generated by comparing reference grid supply currents (i*sa, i*sb, i*sc, i*sn) and sensed grid currents (isa, isb, isc, isn) and the error in current is given to PWM current controller.
TABLE I. PERFORMANCE OF THE PROPOSED SYSTEM Mode of Operation
IV. MATLAB BASED MODELLING
PFC
The configuration of proposed solar PV grid interfaced system is modeled by using Simulink with SPS tool boxes as shown in Figs. 1. Fig. 2 explains the detail control modelling and the reference current generation using EPLL. Further an estimation of reference currents and PWM switching signal
ZVR
4
Parameters
Nonlinear RC load
Grid Voltage %THD
338.5V, 0.98%
Grid Current %THD
19.61, 3.60%
Load Current %THD
25.97, 71.24%
Grid Voltage %THD
342.5, 1.367%
Grid Current %THD
19.67, 3.24%
Load Current %THD
24.61, 70.02%
Fig. 3 Response of proposed system configuration under variable load and variable solar intensity
Fig. 4 Response of proposed system under constant load and varying solar intensity
5
VI.
REFERENCES
CONCLUSION
[1]
B. Verhoeven and B.V. Kema, “Utility aspects of grid connected Photovoltaic power systems,” Int. Energy Agency Photovoltaic Power Syst., IEA PVPS T5-01, 1998. [2] A. K. Verma, B. Singh, and D. T. Shahani, “Grid interfaced solar photovoltaic power generating system with power quality improvement at AC mains,” in IEEE ICSET, 24-27 Sept. 2012, pp. 177-182. [3] B. Singh, D. T. Shahani, and A. K. Verma, “Power balance theory based control of grid interfaced solar photovoltaic power generating system with improved power quality,” in IEEE Int. Conf. Power Electron. Drives Energy Systems (PEDES), 2012, pp. 1-7. [4] S. Balathandayuthapani, C. S. Edrington, S. D. Henry, and J. Cao, “Analysis and control of a photovoltaic system: application to a highpenetration case study,” IEEE Systems Journal, vol. 6, no. 2, pp. 213219, June 2012. [5] B. Subudhi and R. Pradhan, “A Comparative Study on Maximum Power Point Tracking Techniques for Photovoltaic Power Systems,” IEEE Trans. Sustainable Energy, vol. 4, no. 1, pp. 89-98, Jan. 2013. [6] Q. Mei, M. Shan, L. Liu, and J. M. Guerrero, “A Novel Improved Variable Step-Size Incremental-Resistance MPPT Method for PV Systems,” IEEE Trans. Ind. Electron. vol. 58, no. 6, pp. 2427–2434, June 2011. [7] S. Sharma and B. Singh, “An enhanced phase locked loop technique for voltage and frequency control of stand-alone wind energy conversion system,” in Proc. India Int. Conf. Power Electron.(IICPE), 28-30 Jan. 2011, pp.1-6. [8] B. Singh and S. Arya, “Implementation of Single-Phase Enhanced Phase-Locked Loop-Based Control Algorithm for Three-Phase DSTATCOM,” IEEE Trans. Power Del., vol. 28, no. 3, pp.1516 -1524, July 2013. [9] M. G. Villalva, J.R. Gazoli, and E.R. Filho, “Comprehensive approach to modelling and simulation of photovoltaic arrays,” IEEE Trans. Power Electron, vol. 24, no. 5, pp. 1198-1208, May 2009. [10] N. Mohan, T. M. Undeland, and W. P. Robbins, Power electronics: converters, applications and design, 3rd ed. New Delhi, India: John Wiley & sons Inc., 2009. [11] IEEE Recommended Practices and Requirements for Harmonic Control in Electrical Power Systems,” IEEE Std. 519-1992, 1993.
The proposed solar PV grid interfaced power generating system with EPLL based control has been found quite acceptable for unity power factor, load balancing, harmonics elimination reactive power compensation and voltage regulation under varying consumer loads and PV power generation. The EPLL used for active filtering has been found simple. The THD of the grid voltage and grid current are observed well within the acceptable limits of an IEEE-519 standard. APPENDICES A. Parameters of Solar PV Module Data Isc = 3.8 A, Vocn = 21 V, Imp = 3.3 A, Vmp = 17 V, ns = 34, np = 43, Voltage temperature coefficient (Kv) = -80e-3 V/K, Current temperature coefficient (Ki) = 0.0029 A/K, Number of series cells (Ns) = 36, ns = 34, np = 43. B. DC-DC Boost Converter Parameters D = 0.2-0.5, Lb = 2.2 mH, fsw = 10 kHz. C. Parameters for VSC Vs = 415 V, f = 50 Hz, fs = 10 kHz, Vdc= 700 V, Cdc = 15000 μF, L = 1.2 mH, line impedance: Ls = 0.5 mH, Rs = 0.01 Ω dc voltage controller: Kpd = 0.023, Kid = 1.2 Non-linear load: three single phase rectifiers with C = 200 μF, R = 5 Ω and ripple filter: Cf = 10 μF, Rf = 5 Ω. ACKNOWLEDGEMENT This work is supported by DST (Department of Science and Technology), Govt. of India under Grant No. RP02583. Authors are thankful to DST.
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