Phase-Change Random Access Memory

Chapter 11

Phase-Change Random Access Memory Liu Bo State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of Micro-system and Information Technology, Chinese Academy of Sciences, No. 865 Changning Road, Changning District, Shanghai 200050, China [email protected]

This chapter covers my current understanding of the research and development of phase-change random access memory (PCRAM): principle, history, phase-change material, device structure, processing, characteristic, future outlook, and application. In the foreword, the major past and present status perspectives of phasechange materials are discussed. Section 11.2 presents the principles of PCRAM. Comparisons between PCRAM and synchronous RAM (SRAM), the dynamic RAM (DRAM), and FLASH are discussed in Section 11.3. Section 11.4 provides a discussion of the history of PCRAM R&D. The detailed development of phase-change materials is provided in Section 11.5. The structure of memory cell selector and resistor are provided in Sections 11.6 and 11.7. In Section 11.8, the processing of memory cell resistor is provided. The understandings of characteristics of PCRAM memory cell are the subject of Section 11.9. Section 11.10 provides a discussion of

Data Storage at the Nanoscale: Advances and Applications Edited by Gan Fuxi and Wang Yang Copyright © 2015 Pan Stanford Publishing Pte. Ltd. ISBN 978-981-4613-19-4 (Hardcover), 978-981-4613-20-0 (eBook) www.panstanford.com

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Phase-Change Random Access Memory

PCRAM future outlook device. Finally, potential applications of PCRAM are briefly introduced in Section 11.11.

11.1 Introduction

The first observation of changes in the electrical conductivity of a chalcogenide material resulting from a structural change induced by the passage of electrical current was reported in MoS2 [1]. Since 1960, Ovshinsky has been working with amorphous chalcogenides. He developed both electrically controlled threshold and memory switching devices and first reported his findings in a paper published in Physical Review Letters in 1968 [2], which remains the most cited literature in the field of phase-change memory. In this paper, Ovshinsky described a rapid and reversible transition between a highly resistive and a conductive state affected by an electric field, which he has observed in various types of disordered materials, particularly amorphous semiconductors, covering a wide range of compositions. After switching from a highly resistive state, structural changes result in the preservation of a conductive state even when the current is totally removed. The material can be reversibly switched back to the highly resistive state by application of a current pulse of either polarity exceeding a threshold value. Two years later, he observed the rapid crystallization and equally rapid revitrification of amorphous chalcogenide films exposed to short laser pulses, which is the basis of phase-change optical disk [3]. The physical basis for this technology is the phase change of a material, which is a chalcogenide alloy. In phase-change memories, programming of bits is accomplished by means of thermally induced phase changes between the amorphous and polycrystalline state in a thin film of the phase-change material. The rapid and reversible structural change in the alloy film results in a change in material reflectivity and resistivity that can be measured in the read operation. The reversible reflectivity change in the alloy film has been applied in phase-change rewritable optical disk successfully since 1990s. This technology became the mainstream in optical disc production and resulted in the commercialization of 650 MB compact disk rewritable (CD-RW), 4.7 GB digital versatile disk rewritable (DVD±RW) or digital versatile disk random access

Principle of PCRAM

memory (DVD-RAM), and 20–27 GB high-density digital versatile disk (HD-DVD) or blue-ray disk (BD) [4,5]. The reversible resistivity change in the alloy film can also be applied in a new non-volatile memory (NVM), which is PCRAM. PCRAM is also called phasechange memory (PCM), phase-change random access memory (PRAM), chalcogenide-random access memory (C-RAM), and ovonic unified memory (OUM). The concept of using the amorphous to crystalline phase transition of chalcogenides for an electronic memory technology has been pursued for many years. While the early work disclosed many of the fundamental concepts of the PCRAM, it is only in the past 10–15 years that advances in materials and device technology have made it possible to demonstrate PCRAM that rival incumbent technologies such as FLASH [6]. PCRAM has been considered to be one of the most promising candidates for next-generation nonvolatile memory.

11.2 Principle of PCRAM

Basically, the PCRAM cell consists of a phase-change material layer embedded in a dielectric structure and in contact with two electrodes. Along the conductive path of the cell a small volume in the phase-change material acts as a programmable reversible series resistor with low-field resistance that can change up to 1–2 orders of magnitude, depending on the material phase state: crystalline (low resistance) or amorphous (high resistance), corresponding to logic states 1 and 0, respectively. The information is therefore stored in the structural state of the material itself. The typical current-voltage (I–V) characteristics of PCRAM are shown in Fig. 11.1 and the I–V characteristics have been reviewed in detail in Ref. [7]. Ovshinsky discovered the switching and memory effect of the amorphous materials in 1968 [2]. It involves ovonic threshold switching (OTS) [8] and ovonic memory switching (OMS) [9]. Figure 11.1 shows the characteristics of OTS and OMS. OTS is related to the reversible switching mechanism between an electrical low conductive state and a high conductive one, without any change in the microscopic structure of the material. When the applied voltage reaches the threshold value Vth, the resistance decreases and the current increases as shown in the figure. This voltage snapback is called switching. The resistance

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switches back to a high value at a low voltage. This characteristic is symmetrical for the reverse voltage. OMS results from a thermally activated phase transition of the chalcogenide material, which has a relatively low crystallization temperature and can be switched between a high conductive polycrystalline state and a low conductive amorphous one, caused by Joule heating due to a large current pulse after switching. The material of the threshold switch is in an amorphous state and remains as such throughout the operation. On the other hand, the memory material is designed to switch back and forth between the amorphous and crystalline states. Since both the crystalline and the amorphous state are stable, the two phases could be used to store binary information in a nonvolatile memory device, the bit “1” corresponding to the conductive state and the bit “0” to the insulating one. PCRAM is just based on the memory effect of phase-change material.

Figure 11.1 Schematic of I–V characteristics of a threshold switching device and a PCRAM. In the case of threshold switching, the device switches back to the high-resistance state at a low voltage.

Typically, the operations of PCRAM cell element can be divided into three stages as follows:  RESET process: When the voltage/current pulse with a shorter width and higher amplitude is applied to the PCRAM cell element, the temperature of the programmed volume of

Comparisons between PCRAM and SRAM, DRAM and Flash

phase-change material exceeds the melting point (typically about 600°C) upon Joule heating, which eliminates the polycrystalline order in the material. When the RESET pulse is terminated, the device quenches to “freeze in” the disordered structural state, which is called the amorphous high-resistance (RESET) state. This quench time (1 ns) is determined by the thermal environment of the device and the fall time of the pulse.  SET process: The crystallizing SET pulse is of lower amplitude and of sufficient duration to maintain device temperature in the rapid crystallization range, which is between the crystallization temperature and melting temperature, for a time sufficient for crystal growth. The SET voltage must reach threshold voltage Vth. During the first stage of SET process, voltage snapback occurs and the current increases at a threshold voltage owing to the carrier multiplication caused by impact ionization, and Joule heating occurs. At least part of the film enters the polycrystalline low-resistance (SET) state (polycrystallization) as a result of the Joule heating, and the low-resistance state is maintained even after the voltage has been lowered. The reason the resistance of a crystallized state is low is that little scattering of carriers takes place within crystal grains.  Read process: The state of the memory cell is read out nondestructively by measuring the cell’s electrical resistance, the crystalline phase having a low resistivity in comparison to the amorphous one; the difference in resistivity between the two phases can be more than one order of magnitude. The Joule heating caused by read pulse with very lower amplitude is very weak and the device temperature is lower than the glass-transition temperature. The phase transition from RESET state to SET state cannot occur absolutely during this process.

11.3 Comparisons between PCRAM and SRAM, DRAM and Flash

Current mainstream semiconductor memory technologies, such as the SRAM, the DRAM, and the FLASH memory, are approaching

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very difficult issues related their continued scaling to and beyond the 20 nm generation. The large cell size of SRAM makes it difficult to build cache memory in higher densities, and there are even notions that NOR FLASH can no longer be scaled down below 40 nm. The DRAM technology beyond 20 nm feature size will face physical limitations and process complexity that lead to higher manufacturing cost. The current NAND FLASH cell, the floating gate (FG) structure, faces new technological challenges in scaling down below 20 nm technology node: (1) decrease in program speed due to an increase in cross coupling effect, (2) increase in the range of distribution due to increased interference, (3) decline in saturation Vt caused by scaling of inter-poly dielectrics thickness, insufficient control gate gap-fill margin, and (4) deterioration of reliability due to reduced number of electrons. Fortunately, research over the past 10–15 years has led to discovery of several new memory technologies, many in the category of resistive RAMs. To make true leaps in sustaining memory growth, industry and academia are searching for new and novel memory devices. However, for the “next” memory device to be considered as a candidate for the current mainstream memory it would need to possess the following attributes: (1) fast access time, (2) nonvolatility, (3) infinite read/ write cycles, (4) low power, (5) a wide operating temperature range, (6) scalability, (7) high density (including multi-bit and 3D storage capability), (8) low cost, (9) manufacturability, (10) variability (of nanodevice feature size), good data retention, and (11) integration ability with the Si platform. Numerous emerging memory devices based on nanomaterials and nanostructures, which include phasechange memory, floating body DRAM, nano floating gate memory, single electron memory, insulator resistance change memory, et al., have been well identified by the International Technology Roadmap for Semiconductors (ITRS) in 2003. Seven years later, numerous emerging memory devices mainly driven by the growing demand for electronic portable equipment with extended performance were identified again by the ITRS. These emerging research memory technologies include the ferroelectric-gate FET, nanoelectromechanical RAM, spin transfer torque MRAM, nanoionic or redox memory (including the fuse/ antifuse memory and related electrochemical metallization, programmable metal cell and the atomic switch), nanowire phase-

Comparisons between PCRAM and SRAM, DRAM and Flash

change memory, electronic effects memory (i.e., charge trapping, Mott transition, ferroelectric barrier effects), macromolecular memory, and molecular memory. Research has provided some clarification and insight to the physical storage mechanisms and the limits of several of these approaches, which can provide a basis for judging their long-term potential. Each memory type provides its unique advantages and challenges. A classification of memory technologies is given in Fig. 11.2 [10].

Figure 11.2 A classification of memory technologies.

Among alternative NVM concepts, such as FeRAM and MRAM, that have been under investigation since a few years, PCRAM has more recently received sustained interest and now is considered one of the best candidates for next generation NVM, due to improved performances compared to FLASH (access time, read throughput, direct write, bit granularity, endurance) as well as to their good scalability within current complementary metal–oxide– semiconductor (CMOS) fabrication methodology (Table 11.1) [11–13].

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Table 11.1 Features

Memory technology benchmark SRAM

DRAM

FLASH

PCRAM

Cell area

>100F2

6–8F2

4–10F2

4–20F2

Write endurance

1018

1015

105

108–1012

Non-volatile

No

Erase before write No Write time

Write throughput Destructive read Read time

Read latency

Power consumption

Standby power

Byte granularity

10 ns

100 MB/s Partially 10 ns 2 ns

Medium Leakage Yes

Comparability with Good CMOS Multiple-bit operation

No

Cost

High

Data retention Scalability

NA

Fair

Radiation tolerance 1 MRad Maturity

No No

10 ns

100 MB/s Yes

10 ns 20 ns

Medium Leakage Yes

Poor No

10 ms Fair

Low

10 years Fair

Medium

10 years Good Low

1 MRad

Volume Volume Volume Limited production production production production

11.4 History of PCRAM R&D

In the late 1960s, the concept of using the amorphous to crystalline reversible phase transition of chalcogenides for an electronic memory technology was pursued. A nonvolatile and reprogrammable, the read-mostly memory consisting of Ovonic amorphous semiconductor device and isolating diode with capacity of 256 bit was first reported by Neale et al. in 1970 [15]. The early work disclosed many of the fundamental concepts of the PCRAM. Due to the limitation of technological level, the cell size of PCRAM

History of PCRAM R&D

is very large and the program current is in the range of tens to hundreds milliampere, which is too large to be compatible with CMOS technology at that time. Therefore, the study of PCRAM was suspended. It is only in the past 10–15 years that advances in materials and device technology have made it possible to demonstrate PCRAM with high cycle, fast read and write, low voltage and moderate energy operation that rival incumbent technologies such as DRAM and FLASH. Ovonyx joint venture is formed by ECD to commercialize PCRAM technology. From then on, PCRAM has been steadily progressing toward a new era of practical use (Table 11.2). PCRAM has been or is now being studied and developed by Ovonyx (a subsidiary of ECD Ltd.), Intel, Hitachi and Renesas Technology, Elpida Memory, ST Microelectronics, Samsung Electronics, NS (a joint-venture company founded by SIMIT, SMIC, and Microchip), NXP (a subsidiary of Philips), IBM, Qimonda (a subsidiary of Infineon), DSI, Hynix, TSMC, Macronix, Micron, as well as others. In 2008, Numonyx (a joint-venture company founded by Intel and ST Microelectronics, now is a subsidiary of Micron) and Samsung shipped samples. In 2010, UBM TechInsights has confirmed the commercial availability of a 512 Mbit PCRAM die, labeled KPS1N15EZA, and packaged with a Samsung 128 Mbit UtRAM die inside a multi-chip package (MCP) inside a mobile handset. The discovery of this product in a mobile application is a clear sign that designers are now open to using this promising technology. Table 11.2 Date

Important tasks for PCRAM R&D Important tasks

September 1966 Stanford Ovshinsky files first patent on phase-change technology November 1968 Stanford Ovshinsky from ECD reports the reversible phase change of chalcogenide, which can be used as Switching/Memory September 1970 Gordon Moore publishes research in Electronics Magazine June 1999

Ovonyx joint venture is formed to commercialize PCRAM technology

November 1999 Lockheed Martin works with Ovonyx on PCRAM for space applications

(Continued)

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Table 11.2

(Continued)

Date

Important tasks

February 2000

Intel invests in Ovonyx, licenses technology

March 2001

Micronix founds New Technology Laboratory to develop PCRAM

March 2002

Macronix files a patent application for transistor-less PCRAM

July 2003

Samsung begins work on PCRAM technology

August 2004

Samsung announces successful 64 Mb PCRAM array

December 2000 ST Microelectronics licenses PCRAM technology from Ovonyx

November 2001 Intel co-works with Ovonyx and Azalea Microelectronics, announces successful 4 Mb PCRAM array

November 2002 Intel invests in Plasmon, develops high-density and lowcost PCRAM July 2004

August 2004 February 2005 April 2005 May 2005

Micronix co-works with IBM to develop PCRAM

Nanochip licenses PCRAM technology from Ovonyx for use in MEMS probe storage Elpida licenses PCRAM technology from Ovonyx

Philips publishes the research results of phase-change material nano-wire in Nature Materials IBM co-works with Infineon and Micronix to develop PCRAM

September 2005 Samsung announces successful 256 Mb PCRAM array, touts 0.4 mA programming current October 2005

Intel increases investment in Ovonyx

December 2005 Hitachi and Renesas announce 1.5 V PCRAM with 100 μA programming current December 2005 Samsung licenses PCRAM technology from Ovonyx July 2006

BAE Systems (formerly Lockheed Martin) introduces a radiation hardened C-RAM 512 K × 8 chip

September 2006 Samsung announces 512 Mb PCRAM device October 2006

Intel and ST Microelectronics show a 128 Mb PCRAM chip

December 2006 IBM Research Labs demonstrate a prototype 3 nm by 20 nm (Joint of Micronix, IBM and Qimonda)

History of PCRAM R&D

Date

Important tasks

January 2007

Qimonda licenses PCRAM technology from Ovonyx

May 2007

Numonyx joint venture is formed to commercialize PCRAM technology (Joint of ST Microelectronics, Intel and Francisco Partners)

December 2007 Joint of Infineon, Qimonda, IBM and Micronix announces multiple-bit of PCRAM, 2 bit/cell (4 level) and 4 bit/cell (16 level) February 2008

Intel and ST Microelectronics release a 90 nm 128 Mb PCRAM prototype chip to customs

September 2009 Samsung announces the mass production of 512 Mb PCRAM chip based on 60 nm node

November 2009 Numonyx and Intel demonstrate a 3D 64 Mb PCRAM test chip

December 2009 Numonyx announces the 1 Gb PCRAM chip based on 45 nm node April 2010

Samsung ships the first multi-chip package memory, including a 512 Mb phase-change memory die

May 2010

Micron purchases Numonyx

April 2010

October 2010

Numonyx formalizes the 90 nm 128 Mb PCRAM prototype chip as the Omneo range of serial and parallel access memories IBM plans to substitute for DRAM by PCRAM

December 2010 UBM TechInsights has confirmed the commercial availability of a 512 Mb PCRAM die, labeled KPS1N15 EZA, and packaged with a Samsung 128 Mb UtRAM die inside a multi-chip package inside a mobile handset April 2011

China announces an 8 Mb PCRAM test chip (Joint venture of SIMIT, SMIC and Microchip)

December 2011 Samsung announces the 8 Gb PCRAM chip based on 20 nm node

December 2011 Hynix announces the 1 Gb 4F2 PCRAM chip based on 42 nm node June 2012 July 2012

Hynix co-works with IBM to develop PCRAM

Micron announces mass production of 1 Gb PCRAM for cell-phone

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Now, several companies are still being in development on potential products based on phase-change technology. Many other companies, research labs and universities have published technical studies of the properties of this new memory technology. Many of these recent studies on development, test, reliability, modeling, applications and characteristics of the PCRAM are discussed in detail in this chapter.

11.5 Phase-Change Material

11.5.1 Materials Selective Method Basically, the PCRAM cell consists of a phase-change material layer embedded in a dielectric structure and in contact with two electrodes. The phase-change material is at the heart of PCRAM technology. The information is stored in form of the phase of the phase-change material. Almost any material, including metals, semiconductors, and insulators, can exist in an amorphous phase and/or a crystalline phase. However, a very small subset of these materials have simultaneously all the properties that make them useful for data storage technologies. In order to examine the structure of phase-change materials in terms of the chemical bonds, Bicerano and Ovshinsky [16] estimated the average number of near neighbors of each type expected to surround a given central atom using simple considerations based on coordination numbers and bond energies. A memory material with a large average numbers of bonds is likely to be a more stable memory alloy. The crystal structures of phase-change materials are all based on distorted cubic structures and all possess resonant bonding [17]. As this bonding in the crystalline state is a unique fingerprint for phase-change materials, it becomes possible to derive structure-property maps based on an understanding for which compositions resonance bonding can be expected in the crystalline state. Such maps are not only useful because they identify candidates for storage applications. More important, the understanding of the bonding characteristics contained in such data will provide insight into systematic property changes, which can help to tailor materials for specific storage applications. Therefore, Matthias Wuttig and coworkers [18] not only give us a

Phase-Change Material

very good conclusion on what materials being useful for storage applications but also take a big step toward the ability to select and design the novel and appropriate phase-change materials. Phasechange materials are characterized by a rather unconventional property combination. On the one hand, they show a pronounced change of optical and electrical properties on crystallization, which is indicative of a significant change in the local atomic arrangement. Nevertheless, crystallization of the amorphous phase proceeds on a very short timescale. This property combination renders these materials useful for storage applications. Phasechange materials are used in rewritable optical storage media. They are also a strong contender to replace non-volatile FLASH memories. Hence, considerable effort has been put forward to identify materials that provide the required property combination. Regarding the fast crystallization kinetics, this property has been attributed to the simple crystalline structure observed in many phase-change alloys. It has also been suggested that the amorphous and crystalline structure should feature a rather similar atomic arrangement (Ge atoms involved in “umbrella flip”). Finally, it has been argued that the reduced glass-transition temperature should be around 0.5. The reasons for the suitability of chalcogenides, in particular in the form of eutectic alloys or single-phase materials, have recently been discussed in detail. Regarding the optical contrast, it has been argued that both metals and ionic compounds do not provide enough optical contrast between the amorphous and crystalline state. Hence, phase-change materials need to be semiconductors. There are many semiconductors, however, that do not show the characteristic optical contrast of phase-change materials. In one word, phase-change materials must have the basic material properties to enable PCRAM functionality: good thermal stability of the amorphous phase at room temperature or relatively high crystallization temperature, fast crystallization, relatively low melting temperature, single phase transition, good contrast between amorphous and crystalline state, and large enough reversible phase-change cycles. Matthias Wuttig and coworkers [18] first presented a treasure map for phase-change materials on the basis of a fundamental understanding of the bonding characteristics. This map is spanned by two coordinates that can be calculated just from

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the composition, and represent the degree of ionicity and the tendency toward hybridization (covalency) of the bonding. A small magnitude of both quantities is an inherent characteristic of phasechange materials. This coordinate scheme enables a prediction of trends for the physical properties on changing stoichiometry. Thus, the systematic understanding of the relationship between stoichiometry, structure and physical properties might be helpful for the identification of phase-change materials. By using ab initio density functional theory and an improved understanding of the mechanisms behind the structural phase change [19,20], the authors are able to predict the stability of the crystalline state. This could provide valuable information for determining the suitability of chalcogenide materials not only for future optical recording media but also for PCRAM. The wide experience developed on phase-change materials for optical application suggested the materials to be more suitable for PCRAM. In fact, the most famous and widely used phase-change materials are chalcogenide semiconductor thin films containing at least one group-VI element. Phase-change materials can be divided into four types: two-element alloy, three-element alloy, four-element alloy, and five-element alloy. The two-element alloys consist of GeTe, SbTe, AlTe, AsTe, InTe, GaTe, FeTe, SiTe, InSe, SbSe, SnSe, GeSe, GeAu, GeSb, SiSb, ZnSb, SnSb, CSb, and GaSb. The three-element alloys consist of GeSbTe, SiSbTe, GaSeTe, InSeTe, SnSeTe, CuSeTe, AsSeTe, AgAsTe, AlAsTe, InBiTe, doped SbTe (As, Ag, Au, Se, Ga, W, In, N, Bi, Zn, Al, and Ti), doped GeTe (As, Ga, Se, Sn, Cu, Ag, Bi, Pb, Si, N, In, and C), KSbS, GeSbSn, GeSbSe, AgSbSe, GaSbSe, AgTeBr, InGaO, and SnTeOx. The four-element alloys consist of doped GeSbTe (N, O, O(N), Si, S, Ag, Se, Pd,Cr, B, Fe, Zn, Sn, Bi(B), In, H, Ga, Mo, Al, Ti, C, Ce, and Mn), and AgInSbTe. The five-element alloys consist of AgInSbTeV and AgInTeSbGe. Briefly, the main phase-change materials widely researched and used for PCRAM are as follows: GeSbTe system, SbTe-based materials, SiSbTe system, GeTe system, Sb-based materials, and nanocomposite materials.

11.5.2 GeSbTe System

The most popular materials for PCRAM are ternary chalcogenides such as GeSbTe. This material is used for DVD-RAM phase-change


optical disks. GeSb4Te7, GeSb2Te4 and Ge2Sb2Te5 (GST) are the most famous semiconductor alloys along the GeTe-Sb2Te3 pseudobinary line, as shown in Fig. 11.3 [21]. The open circles indicate the nucleation-dominated phase-change materials GST, GeSb2Te4 and GeSb4Te7, plotted along the GeTe-Sb2Te3 tie-line. The filled circle indicates the binary compound Sb69Te31, which forms the base composition of the fast-growth materials (FGM). The red and blue lines indicate the composition range studied by Wuttig et al. [22], which is obtained by gradually removing Ge (red line) or Sb (blue line) atoms from phase-change material with composition Ge2Sb2Te4 (red open diamond). The removal of Ge or Sb atoms, and hence the creation of vacancies, turns out to be energetically favorable for the Ge2Sb2Te4 phase-change material. Using density functional theory, minimal energies are obtained for the phasechange material compositions close to the middle position of the red and blue lines.

Figure 11.3 The GeSbTe ternary system. Note that the ternary material compositions listed inside the triangle are only labeled with their composition numbers. For example, the Ge2Sb2Te5 composition is labeled 225.

The crystallization temperature and melting temperature of GST can be measured by differential scanning calorimeter (DSC) [23]. There are two crystallization temperatures for GST, which were about 172.7°C and 365.3°C at heating rate of 10°C/min.

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The first one is the crystallization temperature of the film from the amorphous state to crystalline state and the second one is the phase transition temperature of the film between two different crystalline states. The melting temperature of GST is about 610°C. At least three different crystallization temperatures at different heat rates are plugged into the Kissinger plot to calculate the activation energy for the crystallization. The activation energy of the GST thin film for the crystallization from amorphous to the first crystalline state is calculated to be about 2.41 eV. The structure of GST can be determined by X-ray diffraction (XRD) [23], transmission electron microscopy (TEM) [24,25], Raman spectra [26], X-ray photoelectron spectroscopy (XPS) [26], extended X-ray absorption fine structure (EXAFS) [27], and densityfunctional theory simulation (DFT) [22]. The as-deposited film is normally in an amorphous state and translates into a metastable face-centre-cubic (FCC) structure when the annealing temperature is higher than the first crystallization temperature, then changes into a hexagonal (HEX) structure with the annealing temperature higher than the second crystallization temperature [23]. It is well known that the structure of FCC phase is NaCl-type structure with a lattice parameter of a = 0.599 nm. Briefly, the 4a site is wholly occupied by only Te atom and the 4b site is randomly occupied by Ge atom, Sb atom, and less than 20% of vacancy [28]. The crystal structure and atomic arrangement of the metastable GST were studied by a high-resolution TEM (HRTEM) [24] and the HRTEM image of the and the suggests that the Yamada and Matsunaga’s model, which tells us the random distribution of the atoms at the 4b site, is somewhat confirmative. On the other hand, the result of the exhibits the deviation from the Yamada and Matsunaga’s model, suggesting the possibility of the existence of the Ge and Sb atoms at 4b site in a specific location through the rearrangement process. Thus, the model was proposed that the metastable GST can form an ordered structure and along the crystallization process and through this, it can be deduced that an intermediate state could exist while transforming to the stable GST phase. However, by EXAFS measurements, Kolobov et al. [27] found that GST does not possess the NaCl-type structure but more likely consists of well-defined rigid building blocks that are randomly oriented in space consistent with cubic symmetry. Using ab initio calculations, Sun et al. [20] have concluded that


the metastable GST does not have a cubic structure and it rather consists of special repeated units possessing rock salt symmetry, whereas the so-called vacancy positions are highly ordered and layered and just result from the cubic symmetry. By using DFT, Matthias Wuttig et al. [22] have clarified the origin of these vacancies and show that the most stable crystalline phases with rock salt–like structures are characterized by large vacancy concentrations and local distortions. However, the atomic positions of the Ge atoms remain controversial. By measuring and analyzing the radial distribution function of crystalline GST, Liu et al. [25] identify the coexistence of local tetrahedral symmetry (t-) and octahedral-like (o-) Ge and determine that the amount of t-Ge is about 35% of the total Ge. Different from FCC structure crystalline phase, a body-centered-cubic (BCC) phase is discovered at high pressures [29]. Yamada [30] proposed a stable HEX structure with a layered structure for this crystalline phase. Each layer contains only one element; hence layers of Ge, Sb, or Te are stacked above each other, that is –Ge–Sb–Te–Ge–Sb–Te– forming long periodical hexagonal lattices. The size of the hexagonal unit cell was determined to be a = 0.4216 nm and c = 1.7174 nm [23]. As the annealing temperature increases, the broad peak for the amorphous –Te-Te– stretching in the Raman spectra of amorphous GST film separated into two peaks, which indicates that heteropolar bond in GeTe4 and Sb–Sb bond connected with four Te atoms, and in other units such as (TeSb) Sb–Sb (Te2) and (Sb2) Sb–Sb (Te2), where some of four Te atoms in the above formula are replaced by Sb atoms remain in crystalline GST thin film. And from the results of Raman spectra and XPS, higher the annealing temperature, more Te atoms bond to Ge atoms and more Sb atoms substitute Te in (Te2) Sb–Sb (Te2) [26]. It is very important to analyze, on a local scale, the structural changes involved in the crystallization process in GST for understanding the fast and reversible phase transition mechanism of GST. It was found that amorphous GST can be regarded as “evennumbered ring structure,” because the ring statistics is dominated by four- and sixfold rings analogous to the crystal phase. This unusual ring statistics of amorphous GST is the key for the fast crystallization speed of the material. Similarly, the analysis of the atomic arrangement of amorphous GST revealed that it has 4-, 6-, and 8 (even number)-membered rings, and easily changes into the

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NaCl structure during crystallization, as shown in Fig. 11.4 [31]. The vacancies are considered to have an important role in the fast and reliable amorphous-to-crystal and crystal-to-amorphous changes. The NaCl structure is closer to the random atomic arrangement.

Figure 11.4 Schematic presentation for the possible ring size transformation in crystal–liquid–amorphous phase change (RESET) and amorphous–crystal phase change (SET) in GST. Stages I and II: RESET process and stage III: SET process.

GST chalcogenide semiconductor has been widely used in PCRAM devices. In order to improve the overwrite cyclability, material stability, and crystallization speed of GST, the composition must be modified by doping. A small amount of nitrogen or oxygen doping into it seems to be an attractive approach. The addition of a small amount of nitrogen remarkably improves the overwrite cycle numbers of phase-change optical disk. A model was proposed to explain the nitrogen atom function in the recording layer [32]. The nitrogen atoms produced nitrides, which are condensed near the grain boundaries of Ge–Sb–Te microcrystals. These results in the formation of very thin wrappings, which wrap the crystal grain in a manner similar to that of the peel of a peach and suppressed the micro-material flow. The nitrides formation can be confirmed by XPS results shown in Fig. 11.5 [33]. From Fig. 11.5, it can be seen that the peak positions of Ge3d, Sb3d, and Te3d all shift to higher bonding energy after nitrogen implantation because the electro-negativity of N, Te, Sb, and Ge element is 3.0, 2.1, 1.9, and 1.8, respectively.


The binding energy of N1s in the nitrogen-doped GST film is 397.90 eV, which is very close to that in Ge3N4 (see Fig. 11.5d). This indicates that the N atom bonds to Ge atom forming Ge3N4, which is further confirmed by the high-resolution X-ray photoelectron spectroscopy and Ge K-edge X-ray absorption spectroscopy measurements [34]. There is no other evidence for N atom bonding to Sb and Te atoms. Some other experimental results show the presence of interstitial N2 molecules in the film, which play a role in suppressing the grain growth [35].

Figure 11.5 XPS spectra for different elements of the crystalline GST films without and with nitrogen doping, (a) Ge element, (b) Sb element, (c) Te element, and (d) N element.

Doped nitrogen in GST thin film plays two roles. One is to distort the crystal lattice and induce a strain field in the film. The other is to refine the grain size of the film through precipitation [36]. The crystallization behavior of GST film revealed a two-step process that includes spherical-nucleation and disc-shaped grain growth. In contrast, nitrogen-doping into GST thin films suppresses

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the second step and the crystallization of GST–N becomes a onestep process that is the primary nucleation process [37]. The XRD results from ref. [33] revealed that the lattice constant increases with the nitrogen implant dose increasing and the phase transition from FCC to HEX structure was delayed or even suppressed by nitrogen implantation at high implant dose. The increase of the lattice constant is due to that a doped nitrogen atom occupying the tetrahedral interstitial site in the FCC structure distorts the unit cell and the volume of the tetrahedral site is not large enough for a nitrogen atom to occupy. In addition, the effective crystallinity of alloy films decreased with the increase in nitrogen content, mainly due to grain-size refinement confirmed by TEM image [37]. Nitrogen doping has great effect on the sheet resistance of GST film [33,38]. The sheet resistance of GST–N film decreases with increasing the nitrogen implant dose at low annealing temperature because the FCC unit cell of crystalline GST film was distorted due to nitrogen atom occupying the tetrahedral interstitial site and the defects in film increased, which results in larger number of current carrier. If the annealing temperature is higher than 400°C, the sheet resistance of GST–N film increases slightly with increasing the nitrogen implant dose. The two major reasons may be that the grain refinement by nitrogen implantation, which results in the scattering of current carrier by grain boundary, and the suppression of phase transition from FCC to HEX structure due to nitrogen implantation. Also, two obvious steps were observed in the resistance–temperature curve of GST–N film with a minor nitrogen implant dose. This phenomenon is very important for multilevel storage [39]. Horii, et al. [40] found that doping nitrogen to GST successfully increased the GST resistivity in about one order and reduced writing current. Also, the cell endurance has been enhanced with grain growth suppression effect of dopant nitrogen. The oxygen doping into GeSbTe material also remarkably improves the phase-change speed of phase-change material and overwrite cycle numbers of phase-change optical disk [41], similar to nitrogen doping. The effect of oxygen implantation on the structure and resistance of GST film was studied in details using XRD, Raman spectra, XPS, and R–T measurement methods [42]. It is indicated that the structure of crystalline GST–O annealed at 250°C is identified as a FCC structure and the lattice parameter


increases with the increasing oxygen implant fluence. However, phase separation takes place in oxygen-doped crystalline GST film when annealing temperature is 450°C. In the case of the high implant fluence samples, phase separation no longer takes place and phase transition from FCC to hexagonal structure is suppressed by oxygen implantation. Oxygen implantation also has great effect on the resistance-annealing behavior of GST film, which may be origin from the structural changes including defect formation, phase separation, suppression of phase transition from FCC to hexagonal structure, and the refinement of grain size, et al. Chen and coworkers [43] investigated the high performance PCRAM using Sn-doped GST as the storage media. With doping of Sn, the writing speed is dramatically increased. The maximum programming time (SET) is reduced from 200 to 40 ns and that for RESET from 40 to 10 ns. Moreover, the reading speed is also improved as a result of lower resistance. The effect of Sn addition, which gives rise to complete crystallization, is brought about by abundant nucleation in the amorphous phase [44]. Due to Sndoping, the sheet resistance of crystalline GST thin films increases about 2–10 times, which may be useful to reduce the switching current for the phase change from crystalline to amorphous state. In addition, the obviously decreased dispersibility for the sheet resistance of Sn-doped GST thin films in crystalline state has been observed, which will play an important role in minimizing resistance difference for the phase-change memory cell elements arrays [45]. The addition of other elements, such as B [46], Ag [47], Si [48], SnTe [49], Ti [50], Al [51], C [52], Ce [53], and (Ge, N) [54] to GST to improve phase-change speed, resistivity, thermal stability, and data retention property.

11.5.3 SbTe-Based Materials

Due to its high crystallization speed and low crystallization temperature, Sb2Te3-based chalcogenide semiconductors have already been used in rewritable optical disk [55]. The switching characteristics of Sb2Te3 films for PCRAM application were first described by Liu et al. [56]. The RESET pulse width is as short as 5 ns, Sb2Te3 chalcogenide can also be changed into a high-

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resistance RESET state and the RESET/SET resistance ratio is as large as 41 times, which is large enough for PCRAM devices. And even when the SET pulse width is as short as 22 ns, Sb2Te3 can also be changed into the low-resistance SET state and the RESET/ SET resistance ratio is about 10. Sb2Te3 may play an important role in low power consumption and high operation speed for PCRAM. Various compositions of SbxTe phase-change films have also been investigated by means of in situ temperature-dependent resistance and XRD measurements [57]. Good performance can be achieved from Sb3Te, including both good data retention and high crystallization speed. Sb3Te has the most rapid crystallization speed among the compositions and its failure time is several orders longer than Sb2Te and Sb4Te. The poly-crystalline structures of Sb–Te alloys are all hexagonal, and phase separation appears in SbTe3, Sb2Te, Sb3Te, and Sb4Te alloys. Sb2Te3 and SbTe are with rhombohedral and hexagonal structure, respectively, and there is no phase separation during the measurement. However, the stability of amorphous SbTe state is very poor and the applicability of a doped-SbTe composition for the phase-change line memory was proposed [58]. Doping one or more elements from the series Ge [59,60], Au [61], In [62], Ag [63], Al [64–67], N [68–70], Ga [71,72], Ti [73], Cu [74], Se [75] and W [76] to SbTe-based chalcogenide has been studied widely. Si-doped SbTe is one of important phase-change materials, which will be introduced individually in Section 11.5.4. The effect of Ag, Ge, N, In, and Al doping on the structure and resistivity of Sb2Te3 was studied in details [59,63,65,68,70] and both crystallization temperature and resistivity of amorphous Sb2Te3 increase after doping, which are beneficial for improving room temperature stability of the amorphous state and reducing the SET/RESET current of PCRAM. It is indicated that Ge atoms substitute for Sb/Te in lattice sites and form Ge–Te bonds, moreover, a metastable phase was observed in Ge-doped specimens [59]. The XPS showed [70] that the nitrogen concentration and the Sb–N bonds were decreasing as the annealing temperature increased, and no nitrogen existed in the N-doped Sb2Te3 when annealed at 300°C. Nevertheless, the sheet resistance of the crystalline N-doped Sb2Te3 film unexpectedly increased as the temperature increased when the temperature was above 260°C.


The author’s explanation for this is that the Sb–N bond is relatively weak and easily disintegrated to form stable nitrogen molecules that can diffuse out of the film by moderate thermal activity. Thus, the N-doped Sb2Te3 film is unstable and will lose all nitrogen when it was annealed at 300°C. The ab initio total energy calculations showed that the incorporation of nitrogen into crystalline Sb2Te3 was not energetically favorable, and the nitrogen atoms preferred forming chemical bonds with Sb atoms to Te atoms. Doping Sb2Te3 with Al element can lead to better amorphous thermal stability, higher crystallization temperature, and larger resistance, which results from the formation of Al–Sb and Al–Te bonds [65]. The Al0.69Sb2Te3 film has a better data retention temperature (110°C for 10 years) than that of GST (87°C for 10 years). Reversible phase-change process has also been observed in the PCRAM cell based on Al0.69Sb2Te3. Al2Sb2Te6 is a pseudobinary material constructed by Sb2Te3 (fast crystallization speed but thermally unstable) and Al2Te3 (thermally stable but without memory switching ability) [66]. Al2Sb2Te6 material possesses advantages of these two binary compounds showing good memory switching ability with fast switching speed and good thermal stability. These improvements are believed to be closely related to the coordination situations of Al atoms in Al2Sb2Te6 material. In amorphous Al2Sb2Te6 material, it is deduced that the appropriate number of fourfold coordination (f4) and (f6) Al atoms makes the atoms network rigidity between those of Sb2Te3 and Al2Te3. And the moderate atoms network rigidity of Al2Sb2Te6 ensures its good thermal stability and electrically triggered memory switching ability. The major phase of crystalline Al2Sb2Te6 shall be a Sb2Te3-like rhombohedral lattice structure. The MAED also confirms the rhombohedral lattice structure of Al2Sb2Te6 in the SET-state PCRAM cell, as shown in Fig. 11.6. The rhombohedral structure can be thought of as a rock salt structure distorted along the [111] direction, illustrating a large amount of f6 atoms Al or Sb in crystalline Al2Sb2Te6. This is quite similar with the major Ge coordinations of crystalline GST [27]. The PCRAM device using Al2Sb2Te6 showed high speed (5 ns), low power consumption, and high endurance (106 cycles). Thus, Al2Sb2Te6 can be considered one of the most promising materials for PCRAM use.

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Figure 11.6 TEM picture of the cross section of Al2Sb2Te6-based PCRAM cell in set state. (b) MAED picture of Al2Sb2Te6 region shown in Fig. 11.6a.

Good performance can be achieved from Sb3Te, including both good data retention and high crystallization speed [57]. For 2 at.% Au-doped Sb3Te [61], better performance has been achieved compared with pure Sb3Te, for example, Tc increases to 161°C and the resistance contrast increases to 1.1 × 104, and failure time is above 2.7 × 1011 s at 80°C, several orders longer than that of pure one. Comparing with GST, Al-doped Sb3Te is proved to be a promising candidate for PCRAM use [64,67] because of its higher crystallization temperature (210–236°C), larger crystallization activation energy (3.19–3.32 eV), and better data retention ability (124–131°C for 10 years). Furthermore, AlxSb3Te shows fast phasechange speed and crystallizes into a uniformly embedded crystal structure. The crystalline AlxSb3Te film is identified as hexagonal


Sb2Te phase and monoclinic Al2Te3 phase. As short as 10 ns width, voltage pulse can realize reversible operations for AlxSb3Te-based PCRAM cell. Moreover, PCRAM cell based on AlxSb3Te material also has good endurance and an enough resistance ratio of 102. AlxSb3Te is also believed to be a promising candidate for PCRAM applications. Another high-speed SbTe-based phase-change material is Gedoped Sb2Te [60]. Contrasted with GST, Ge0.61Sb2Te shows higher Tc (200.5°C) and larger Ea (3.28 eV), which results in a better data retention maintaining for 10 year at 120.8°C. Due to the stronger bonding between Ge and Te, Sb atom is replaced when doping Ge into Sb2Te. However, it still retains the original lattice structure of Sb2Te (the hexahedral structure) with the stable phase. In addition, in PCRAM cell based on Ge0.61Sb2Te, even 10 ns voltage pulse can induce the reversible resistance switching, which indicates that it can be applied to high-speed memory. It can be explained that Ge0.61Sb2Te possesses the crystallization of growth domination, which leads to rapid phase transition. Almost 106 reversible cycles with the resistance ratio of over two orders of magnitude is achieved in Ge0.61Sb2Te-based PCRAM cell.

11.5.4 SiSbTe System

According to ref. [19], a sufficiently large electronic bandgap is required in order to reduce threshold current. The bandgap of Si (1.12 eV) is much wider than that of Ge (0.74 eV). For increasing bandgap width of the material, Si doping into the narrow-gap semiconductor Sb–Te will be much more helpful than Ge doping. Therefore, by substituting Ge with Si, which is located in the upper part of the periodic table, SiSbTe system phase-change materials are invented and widely studied [77–111]. Among the SiSbTe system phase-change materials, Si-doped Sb2Te3 phase-change material (SixSb2Te3) is the most important one. However, some problems still remain and must be resolved first before SixSb2Te3 is applied in PCRAM: (1) At which silicon concentration within SixSb2Te3 film will the film lose the phasechange property and (2) which is the most promising stoichiometric composition for low-energy-cost PCRAM application? Zhang and coworkers adopted “un-focused” co-sputtering method to prepare compositional gradient SixSb2Te3 thin film [79]. The

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SixSb2Te3 film has been found to lose its phase-change property when silicon concentration exceeds 95 at.% according to I–V and XRD measurements. The I–V performance also shows that when x ≤ 7.5, threshold current decreases significantly with the increase of x. However, threshold power reaches its lowest point when x is about 1.7. Si1.7Sb2Te3 film is found to possess an extremely low threshold power and a reasonable low threshold current (Fig. 11.7).

Figure 11.7 Threshold current (Ith) and power (Pth) as a function of silicon concentration. Coefficient x in the x-coordinate is the x in SixSb2Te3.

The crystal structures of Si2Sb2Te3 and Si3Sb2Te3 films were investigated by Rao et al. using XRD method [98]. Crystalline Si2Sb2Te3 phase shows a rhombohedral phase originated from crystalline Sb2Te3, while no diffraction peak corresponding to crystalline Si or Te is observed. Si dopants effectively inhibit the growth of Sb2Te3 grains. Without Si or Te phase appearing implies that Si remains in amorphous state after annealing process and no obvious Te segregation occurs along with the crystallization of Sb2Te3. The HRTEM photos (Figs. 11.8b,c) further confirmed this and only Sb2Te3 crystal grains can be identified in crystalline Si2Sb2Te3 [93]. The selected area electron diffraction (SAED) result of a 5 mm-diameter area also shows a rhombohedral phase of


Sb2Te3 (inset of Fig. 11.8a), which is matched well with the XRD result. Figures 11.8a,b reveal that the amorphous Si-rich regions (region in pale) surround the crystal grains (region in fuscous), and the sizes of both the Sb2Te3 grain and amorphous Si are confined to about 10–20 nm. The similar HRTEM photos were also observed in the Si3.5Sb2Te3 films [108]. It is the precipitation of amorphous Si that results in an overall more disordered microstructure. The influence of Si in Sb2Te3 on structure and phase stability was studied by ab initio calculations [97,109]. The incorporation of Si atoms into Sb2Te3 lattice is energetically unfavorable and hence Si atoms most probably accumulated in the boundaries of Sb2Te3 grains, which is consistent with the notion of phase separation in the crystalline SiSbTe alloys. The crystal structures of Si2Sb2Te3 and Si3Sb2Te3 films were investigated by Rao et al. using XRD method [98]. Crystalline Si2Sb2Te3 phase shows a rhombohedral phase originated from crystalline Sb2Te3, while no diffraction peak corresponding to crystalline Si or Te is observed. Si dopants effectively inhibit the growth of Sb2Te3 grains. Without Si or Te phase appearing implies that Si remains in amorphous state after annealing process and no obvious Te segregation occurs along with the crystallization of Sb2Te3. The HRTEM photos (Figs. 11.8b,c) further confirmed this and only Sb2Te3 crystal grains can be identified in crystalline Si2Sb2Te3 [93]. The selected area electron diffraction (SAED) result of a 5 mm-diameter area also shows a rhombohedral phase of Sb2Te3 (inset of Fig. 11.8a), which is matched well with the XRD result. Figures 11.8a,b reveal that the amorphous Si-rich regions (region in pale) surround the crystal grains (region in fuscous), and the sizes of both the Sb2Te3 grain and amorphous Si are confined to about 10–20 nm. The similar HRTEM photos were also observed in the Si3.5Sb2Te3 films [108]. It is the precipitation of amorphous Si that results in an overall more disordered microstructure. The influence of Si in Sb2Te3 on structure and phase stability was studied by ab initio calculations [97,109]. The incorporation of Si atoms into Sb2Te3 lattice is energetically unfavorable and hence Si atoms most probably accumulated in the boundaries of Sb2Te3 grains, which is consistent with the notion of phase separation in the crystalline SiSbTe alloys.

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(b)

(a)

(c)

Figure 11.8 (a) TEM image of 400°C annealed Si2Sb2Te3 film, and the inset shows the corresponding SAED result of a 5 mm-diameter area, (b) and (c) HRTEM images of 400°C annealed Si2Sb2Te3 film.

Crystallization temperature of SixSb2Te3 film increases with increase of silicon concentration. Dopant with high glass-transition temperature (Tg) like Ge element (Tg = 750 K) added to the Sb–Te material can effectively increase the Tc [112]. Si element has even higher Tg (~1000 K) than that of Ge element. Because Si has larger electronegativity than that of Sb and Te, with more Si addition, the introduced covalent bonds reduce the atomic diffusivity, which reinforces the cohesion of the atom network, leading to the increase of Tc [83]. Table 11.3 [98] lists some of the measured Tc values—Si5Sb2Te3 ~ 550 K, Si3.5Sb2Te3 ~ 528 K, Si3Sb2Te3 ~ 520 K, and Si1.7Sb2Te3 ~ 510 K. Larger Tc may lead to arise of power consumption of the PCRAM SET operation, while a properly higher Tc will help to improve the thermal stability of the amorphous film to achieve a better data retention ability.


Table 11.3

Measured crystallization temperatures, film thickness reductions, and the calculated crystallization activation energies and 10-year data retention temperatures of the GST and SixSb2Te3 compounds Tc (K)

Ea (eV)

Ten-year data retention T (K)

Film thickness reduction (%)

Si5Sb2Te3

550

2.77

442

2.0

Si3Sb2Te3

520

1.82

393

2.3

Si3.5Sb2Te3 Si1.7Sb2Te3 Si1.2Sb2Te3 GST

528 510 465 435

2.13 1.31 1.07 2.21

412 341 323 364

2.2 2.5 —

7.7

Furthermore, resistivity of SixSb2Te3 film increases with increase of silicon concentration. Figure 11.9 displays the dependence of the sheet resistance Rs upon annealing temperature obtained using a heating rate of 13 K/min [98]. As annealing temperature increases, a continuous decrease in sheet resistance is observed for all the films. A sudden drop of Rs occurs when temperature reaches Tc for GST and SixSb2Te3 films. Sb2Te3 film does not have an obvious resistance transition in that the asdeposited film is already partially crystallized. The decrease in resistance with increasing temperature just before the onset of the transition indicates a semiconductor-like behavior. Compared to GST film, SixSb2Te3 (x > 1.2) films have larger resistances for both amorphous and crystalline states. For Si1Sb2Te3 film [82], the resistivity is at least one order of magnitude higher than that of GST and Sb2Te3 films. Large resistance will help to reduce the driving current for both SET and RESET operations of PCRAM. T-shaped PCRAM cell fabricated by 0.18 μm CMOS technology was utilized to verify the electric-pulse-induced phase-change ability of the SixSb2Te3 material [93,94,98]. The SET/RESET operations of PCRAM cell based on SixSb2Te3 material were realized and the endurance of at least 107 cycles was measured even when x is 3.5. However, a PCRAM cell with Si3.8Sb2Te3 or Si4Sb2Te3 material shows inconsistent SET and RESET operations even under wider pulse width. The resistance of the SET state fluctuates

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dramatically, which may be caused by incomplete crystallization. The endurance ability (103–104 cycles) is obviously poor compared to that of Si3.5Sb2Te3-based PCRAM cell. By judging the electrical performance of PCRAM cells using SixSb2Te3 materials, the optimized composition of the SixSb2Te3 system with x in the range of 2–3.5 may be concluded so as to guarantee good overall properties.

Figure 11.9 Temperature dependence of the sheet resistance Rs of the Sb2Te3, GST, and SixSb2Te3 films measured with heating rate of 13 K/min.

Only by substituting Ge with Si in GST, Si2Sb2Te5 may be a new phase-change material. Silicon, the most widely used semiconductor, is similar with germanium in various properties. The atomic radii of Si and Ge are 0.146 and 0.152 nm, respectively. Moreover, Si is with a bandgap width (Eg) of 1.17 eV, which is wider than that of Ge (0.74 eV). Hence, Eg of Si2Sb2Te5 may be larger than that of GST. According to ref. [19], a sufficiently wide electronic bandgap is required in order to reduce threshold current. Thus, Si2Sb2Te5 may possess a more outstanding electrical property than GST does if Si2Sb2Te5 does have a larger Eg. The Si2Sb2Te5 material possesses a low threshold current from amorphous to polycrystalline state in the I–V measurement, and shows a good data retention. Bandgap width of the amorphous and polycrystalline Si2Sb2Te5 are determined to be 0.89 and 0.62 eV by means of


Fourier transform infrared spectroscopy. While the bandgap width for amorphous GST is only 0.73 eV [81]. PCRAM device based on Si2Sb2Te5 was fabricated and characterized. SET and RESET times are 31 and 10 ns when the corresponding voltage pulses are 2 and 3.5 V, respectively. Endurance up to 106 with a resistance ratio of 100 has been achieved [80]. It was demonstrated that the Si2Sb2Te5 amorphous material goes through an elemental separation process during the phase-change process under thermal heating [91]. This process involves the Sb and Te atoms migrating from the parent Si2Sb2Te5 matrix. The final product is a nanocomposite material consisting of amorphous Si, crystalline Sb2Te3 and crystalline Te, with individual separated phase domains of less than 10 nm in diameter (Fig. 11.10). It is very interesting that electron beam (EB) irradiation has significant influence on the crystallization of the film [84]. Crystallization is promoted with a higher energy EB exposure, or with a higher current density, or with a longer exposure time. The EB-induced crystallization process is a displacement damage dominant process. The displacements make the arrangement of atoms within the film become more and more ordered. Furthermore, a crystallized Si2Sb2Te5 thin film was observed to extrude single-crystalline [0001] oriented tellurium nanowires at room temperature [86]. The single-crystalline Te nanowires nucleation and extruded outgrowth can be greatly accelerated by electron beam illumination in a TEM by an order as high as 4. This Te nanowire self-outflow phenomenon comes from a decomposition process of the Si2Sb2Te5 matrix, which is consistent with the results of thermal heating–induced crystallization and means that the crystalline Si2Sb2Te5 phase is unstable. By oxygen doping into Si2Sb2Te5 material, the reduction of grain size further results in the promotion of data retention and thermal stability of the material [89,96]. During an oxidation process, oxygen preferentially reacts with Si due to its smallest electro-negativity value among Si, Sb, and Te elements, and SiOx-rich wrapping will form. Within a nano-crystal structure, Si–Sb–Te-rich phase-change domains could be separated from each other by SiOx wrapping. Si–Sb–Te-rich domains have phase-change property, while SiOxrich domains do not have. In such case, Si–Sb–Te-rich phase-change grain will be restrained to a small volume with average size of 10 nm due to the separation effect of SiOx-rich domains. Reduction

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of the programming volume as well as power consumption is expected by such segregation. The restraint of grain size growth would not only result in a decrease of programming power but also in a promotion of data retention. However, the removing of extra Te may be the best method to improve the stability of Si2Sb2Te5 because Te is the most unstable element compared to Sb, Si, and Ge due to its high vapor pressure and low melting temperature.

Figure 11.10 (a) Bright-field image of the Si2Sb2Te5 thin film after annealing at 300°C. (b) A magnified HREM image shows the crystalline lattices and the surrounding amorphous regions. (c) Low magnification HAADF-STEM image of the Si2Sb2Te5 thin film after annealing at 300°C.

The structure, crystallization behaviors and mechanisms, and application in PCRAM of Si2Sb2Tex (x = 1, 3, and 6) were investigated and compared [90,95,100]. Te-rich Si2Sb2Te6 is the only material in the three compositions that suffers a severe Te segregation in polycrystalline state. The crystallization rate of Si2Sb2Tex decreases as Te content increases, which is proved by both temperature-rise and isothermal resistance measurements. The temperature at which the crystallization becomes fast decreases for Si2Sb2Tex as the Te content increases, resulting from a reduction in overall mean bond energy. The crystallizations of all three


samples are suggested to be by the layer-by-layer model. The data retention of amorphous Si2Sb2Te3 film (407 K) is better than those of Si2Sb2Te (397 K) and Si2Sb2Te6 (382 K) due to its small Avrami coefficient, high crystallization temperature and large Ea. The best data retention and simple crystalline phase, together with the fast crystalline speed of Si2Sb2Te3 have proved that Sb2Te3 is a promising body for doping with elemental Si to optimize the Si–Sb–Te class, which has been discussed on the above. Sb-rich phase-change materials show very fast crystallization speed and low power requirement. However, the excessive increase of Sb content, on the other hand, will degenerate the thermal stability of the amorphous phase due to the decrease of the crystallization energy barrier. Growth-dominant Sb2Te material with large crystal grain is converted to the nano composite material after Si doping [100,104,111]. The increase of Si content in SixSb2Te material helps to further diminish the grain size, form more uniform grain distribution, and enhance the thermal stability of the amorphous phase. Regardless of the dose of Si in the films, the crystalline structures are all based on the Sb2Te structure. Si atoms only exist among the grains, and do not bond with other atoms (Sb and Te). Furthermore, the thickness reduction during phase transition becomes weak with the increase of Si content. The Sb-rich Si24Sb48Te28 phase-change material with moderate Si content (24 at.%) has been prepared, and the phase-change properties have been studied by in situ TEM observations and in situ resistance measurements [106]. Excessive Sb improves the crystallization properties, and the data retention ability is improved by Si. The Si24Sb48Te28 phase-change material has data retention of 10 years at about 110°C, suggesting a more stable amorphous state than the usual GST phase-change material. Si-Sb4Te phasechange thin films with different silicon contents have been investigated by in situ heating technique in TEM [107]. The studies show that Si-doping can significantly improve the thermal stability of Si-Sb4Te thin films, refine their grain size, and change the nucleation characters with the increase of silicon content. By in situ annealing in TEM, the crystalline phase of Si-Sb4Te thin films can be indexed as hexagonal Sb structure, and Si is still holding amorphous state which is considered as the reason for the change, by destroying the long-range order lattice of crystal grains. It is well known that nitrogen-doping can further improve the thermal

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stability of phase-change materials. The phase transformation properties of the nitrogen-doped Sb-rich Si18Sb52Te30 films were investigated in detail [105]. It was found that the addition of N atoms into the Si–Sb–Te films increases the temperature for phase transition from the amorphous phase to a stable hexagonal structure and enhances the sheet resistance of the films following grain refinement. The activation energy for crystallization of the films was increased from 1.84 to 2.89 eV with the increased nitrogen content from 0 to 21 at.%, which promises an improved thermal stability. A prolonged data lifetime up to 10 years at 149°C was realized. From the device performance point of view, the N-doped Si–Sb–Te film with moderate nitrogen content was preferable for the phase-change memory applications due to its advantage of higher reliability.

11.5.5 GeTe System

GexTe100-x (15 ≤ x ≤ 28) has been applied in PCRAM since 1989 and more than 104 repetitions of amorphous to crystalline states, and vice versa, were attained by the application of electric pulses [113]. As is well known, GeTe has a slightly rhombohedrally deformed NaCl type structure at room temperature and is made up of six stacked cyclic layers: -Te–Ge–Te–Ge–Te–Ge- [114]. Massively parallel density functional simulations have been used to characterize the amorphous structure of GeTe [115]. Amorphous GeTe shows longrange ordering of Te atoms and a high degree of alternating fourmembered rings (ABAB squares) that are the main building blocks. Since the crystalline (rock salt) phase comprises perfectly ordered ABAB squares, the rapid amorphous-to-crystalline transition can be regarded as a reorientation of ABAB squares to form additional AB bonds and cubic subunits in a locally “distorted octahedral” structure. Vacancies with characteristically sharp edges, corners, and protrusions play a crucial role in providing the necessary space. The rhombohedral and FCC forms of GeTe are vacancy-free, and a-GeTe contains 6.4% vacancies by volume. Kohara et al. [31] proposed a ring model for amorphous GeTe. The formation of Ge–Ge homopolar bonds in amorphous GeTe constructs both oddand even-numbered rings. Therefore, the recombination of the various size rings attended with breaking of Ge–Ge homopolar bonds and with forming of Ge–Te bonds is required in stage of


phase transition from amorphous to crystalline phase, since oddnumbered rings can be transformed into even-numbered rings with breaking of Ge–Ge bonds. Thus, the construction of odd-numbered rings induced by the formation of Ge–Ge homopolar bonds in a-GeTe disturbs the fast crystallization of the amorphous phase. However, this model may not agree with the fact that GeTe has fast crystallization speed [116]. Microstructural properties of GeTe thin films were investigated by an in situ heating method within a high voltage electron microscope [117]. The GeTe binary alloy has a ring-shaped amorphous structure during the transformation from an amorphous state to a FCC crystalline state. The ring-shaped amorphous structure of GeTe, which is very similar to the FCC lattice, is the reason for the fast crystallization. This is again confirmed by the Raman results, which show pronounced similarities in local structure between the crystalline and amorphous GeTe states, that is, the Ge atoms are in three different environments, namely, tetrahedral, distorted, and defective octahedral sites in crystalline GeTe and Ge sites in tetrahedral and defective octahedral environment in amorphous GeTe [118]. A very strong dependence of the crystallization time on the composition for as-deposited, amorphous films was confirmed, with a minimum for the stoichiometric composition GeTe [119], which may be due to the minimization of the homopolar Ge–Ge bonds in the amorphous state and thus the number of Ge clusters in the crystallized state without Te clusters [120]. For Ge-rich GeTe [121], the crystallized phase adopts the rhombohedral a-GeTe phase and a precipitated cubic Ge phase structure. It is likely that a small part of crystalline Ge persists at the periphery of the programmed volume. As a consequence, the composition of the active phase-change material will gradually change to stoichiometric GeTe with a Ge phase at the interface modifying data retention, which in turn may dramatically affect device performances and long term reliability. The additive nitrogen may improve the chemical and structural stabilities. The transition temperature of sheet resistance increased as a result of nitrogen doping, and the bonding of the doped nitrogen atoms with the Ge atoms in GeTe-N may suppress the instability of GeTe arising from the applied thermal stress [122,123]. Intensively investigation on the local structure around nitrogen species in N-doped GeTe demonstrates that while in as-deposited amorphous

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GeTe nitrogen is predominantly bonded to Ge atoms, upon crystallization the majority of nitrogen forms N2 molecules that are likely to be located in the grain boundaries, with only a small fraction of nitrogen species remaining bonded to Ge [124]. Both data retention up to 127°C and 30% RESET current reduction indicate carbon-doped GeTe as a promising candidate for both embedded and stand-alone PCRAM applications [125]. The addition of carbon in a-GeTe induces strong changes at the second neighbor level through C centered tetrahedral and triangular units and long carbon chains [126]. Preferred bonds for carbon are Ge-C and C–C. Breaking C–C bonds is an extremely endothermic process and long chains could be an obstacle for the recrystallization of the a-GeTe matrix, which results in high data retention.

11.5.6 Sb-Based Materials

It is well known that most of phase-change materials are Te-based chalcogenide. However, Te is with low melting temperature and high vapor pressure, which may lead to phase separation within the materials. Such separation may reduce the reliability of PCRAM. It has also been found that Te motion within the phasechange material is not prevented even by capping a layer. The motion will result in material inhomogeneity and voids [127]. Hence, new phase-change material without Te will be with a good prospect of application in the PCRAM development. When the main component is Sb, the material has a tendency to have low resistance because Sb is a semimetal while Te is a semiconductor. Te-free non-chalcogenide phase-change material SixSb100-x (0 < x < 100) with eximious data retention has been investigated [128]. The crystallization temperature for Si10Sb90 and Si16Sb84 are 191 and 225°C, and the crystallization activation energy are 3.1 and 4.67 eV, respectively. Figure 11.11 shows the failure time of the amorphous SixSb100-x phase-change materials. The failure time is extrapolated to 110°C by fitting the data to an Arrhenius equation. As shown in the figure, Archives life time at 110°C for Si10Sb90 and Si16Sb84 materials are 103 and 106 times longer than that of GST. The density change of Si16Sb84 upon crystallization is only about 3.8%, which is much smaller than that of GST and is favorable for the high reliability PCRAM applications [129]. When the silicon content is low, the polycrystalline SixSb100-x is with rhombic


structure, similar to that of Sb metal. The crystalline grain size within SixSb100-x reduces dramatically with increase of Si content [130]. Si16Sb84-based PCRAM line cell with low RESET/SET current and high operation speed is fabricated by electron beam lithography and endurance of 106 cycles with a resistance ratio of above 800 has been achieved [131]. These advantages make Si10Sb90 and Si16Sb84 phase-change materials promising candidates for the next-generation phase-change memory. The thermal stability of the amorphous Si10.5Sb89.5 film was enhanced by nitrogen doping because the incorporated nitrogen combined with Si to form silicon nitride in SiSb film [132].

Figure 11.11 Failure time as a function of temperature for SixSb100-x materials and GST.

GeSb-based phase-change material was first introduced into PCRAM by Chen et al. [133]. An ultra-thin phase-change bridge memory cell, implemented with doped GeSb, is shown with 36 at.%, polycrystalline GexSb100-x consists of GeSb solid solution mixed with Ge crystalline phase. The evidence was found for the instability in the crystalline state of Ge85Sb15 [137]. It was found that while the amorphous phase of eutectic Ge85Sb15 is very robust until Sb crystallization at 240°C, and at about 350°C, germanium rapidly precipitates out. Moreover, the phase separation of Ge occurred gradually with increasing temperature, due to the weak Ge–Sb bonds in the crystalline state [138]. Ge precipitation, visualized directly with TEM, is exothermic and is found to affect the film’s reflectivity, resistance, and stress. It converts melting into a two-step process, which may seriously impact the switching reliability of a device. No electric field–induced phase-change was observed in Ge-rich GeSb nanowires, and phase-change–induced memory switching was realized in Sb-rich Ge–Sb nanowires but with partial irreversibility, which results from phase-separation of Ge under thermal annealing [139]. Instead of controlling the atomic ratio between Ge and Sb, Si was incorporated in GeSb to control the crystallization process [140]. Crystallization temperature increased and the overall crystallinity was decreased with increasing Si concentration. However, crystallization speed was thought to decrease with increased Si concentration. In order to further increase the crystalline resistivity, nitrogen was doped into Ge15Sb85 [141]. It was found that by adding 7.0 at.% N into the


Ge15Sb85 film, the crystalline resistivity increases 12 times and the crystallization temperature increases about 50°C. Other materials based on the eutectic composition of Sb and Zn/Sn/C/Ga, namely, Zn17Sb83 [142], Sn12Sb88 [143], CSb [144], or Ga14Sb86 [145], were also used.

11.5.7 Nano-Composite Phase-Change Materials

Low power consumption, especially during RESET operation, is one of the most important issues among the critical aspects that may affect the commercial application of PCRAM. However, due to the high melting temperature and low resistance of crystalline GeSbTe, a high RESET current is necessary to switch the device to the RESET state, which causes large energy consumption of PCRAM. One of the effective methods to reduce the RESET current is reducing the programming volume. A self-limiting method to form small phase-change volume in which the phase-change material is separated from each other by dielectric material is proposed [146]. Because of simplicity, such self-limiting method can be costeffective approach to form reduced programming volume. The nanocomposite phase-change materials can be fabricated by cosputtering phase-change material and dielectric material, such as SiO2 [146,147–152], PbZr0.30Ti0.70O3 [153], HfO2 [154–157], Ta2O5 [158,159], and TiO2 [160,161]. Due to its high thermal stability and poor binding state with GST, SiO2 was first selected as the dielectric material cosputtered with GST and strong tendency of phase separation between GST and SiO2 may exhibit [146]. Separate domain formation is found in GST–SiOx mixed layer and the spherical GST-rich domains with relatively uniform size less than 20 nm are enclosed by SiOx-rich domains. The separated domain structure exists already in the as prepared amorphous state and remains even after crystallization into FCC phase. The GST-SiOx mixed layer exhibits increased activation energy and sublimation temperature in comparison to the pure GST layer. It was also found that SiO2-doped GST had a layered structure resulting from the inhomogeneous distribution of SiO2 after annealing [151]. The segregated GST–SiOx mixed layer bears technological importance, such as current confined in the GST domains and significantly reducing operating power

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with relatively small cell-to-cell variation, for development of PCRAM device. The crystallization temperature increases while the melting temperature decreases as the SiO2 concentration in the GST–SiOx film increases [148]. An increased resistivity of the crystallized GST films in proportion to the incorporated quantity of SiO2 leads to a decrease in the writing current and SiO2 also inhibits crystallization of the amorphous GST film which can improve the long term stability of the metastable amorphous phase [147]. Due to the remarkable suppression in thermal conductivity, RESET current can be reduced down to around 0.35 mA for the case of GST–SiOx mixed layer, which corresponds to 32% of the PCRAM with unmixed GST [149]. However, threshold switching voltage increases with increasing SiO2 doping concentration, which is associated with an effective increase in electric field and the decreased generation rate caused by impact ionization [150]. HfO2 can inhibit the crystallization of the amorphous phasechange films, which improved the long-term stability of the metastable amorphous phase. The result of TEM has confirmed the phase separation in annealed GST–HfO2 films with separate domain formation (spherical crystalline GST-rich domains are enclosed by amorphous HfO2-rich domains) and the segregated domains exhibited relatively uniform size (Fig. 11.12) [154]. Therefore, GST–HfO2 phase-change layer has small programming volume and may exhibit significantly reduced operating power. The phase transformation from the amorphous to the crystalline state is accompanied by a thickness and density change which can induce significant stress in the film. Comparing the density change during crystallization with the value for GST (6.8%), the GST–HfO2 film has a slightly lower value (5.1%). It is shown that [155,157] the incorporation of HfO2 could improve the archival life stability of amorphous Sb2Te3 film, as evidenced by the increased crystallization temperature ranging from 200 to 250°C. It is also shown that [156] the crystallization of amorphous GeTe film could be suppressed by the incorporation of HfO2, which had a favorable effect on the archival life stability. The activation energy for crystallization increased from 2.36 to 4.69 eV, and the temperature for 10-year data retention increased from 108 to 187°C with the increasing concentration of HfO2 form 0 to 12 mol%.


Figure 11.12 TEM image of GST–HfO2 film after 5 min heating at 350°C.

For practical using of nanocomposite phase-change materials in PCRAM chips, there are many aspects must be considered and improved: dispersion uniformity of phase-change materials and dielectric material, composition uniformity, sufficiently small particle size and its uniformity of phase-change materials and dielectric material, poor endurance, operation reliability, scalability, et al.

11.5.8 Superlattice-Like Structure Phase-Change Materials

In order to increase the write speed of PCRAM, a material with a high crystallization speed, which will result in a high phase-change speed, is very much needed. However, such a material is generally not stable. In application, the usual method to solve this contradiction is to sacrifice the speed in order to assure the stability. However, Chong and coworkers proposed and utilized the “superlatticelike” (SLL) concept into PCRAM so that a high write speed could be achieved and, at the same time, the high stability could be maintained [162]. The basic concept is to alternatively deposit two phase-change materials: one with a high crystallization speed and the other with a relatively low crystallization speed but a high stability, to form the SLL structure shown in Fig. 11.13. The PCRAM with such a structure can operate at a high speed due to the first material and at the same time maintain a good stability

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Figure 11.13 The diagrammatic sketch of SLL structure.

due to the second material. The binary compounds of GeTe and Sb2Te3 were selected as the two constituent materials of the SLL structure due to the differences in their crystallization temperatures, melting points and bandgaps, and the strong adhesion between them. The crystallization temperature increased with increasing thickness ratio of GeTe to Sb2Te3, which indicates that a higher thickness ratio of GeTe to Sb2Te3 can improve the thermal stability of amorphous films [163]. Both SET and RESET voltages/currents are smaller for SLL structure than those for single layer structure with the same pulse width. The device with SLL structure could work with much shorter pulse widths for both SET and RESET when compared to the device with a single GST layer. Recently, Loke et al. [164] found that small SLL cells can achieve faster switching speed and lower operating voltage compared to the large SLL cells. Fast amorphization and crystallization of 300 ps and 1 ns were achieved in the 40 nm SLL cells, respectively, both significantly faster than those observed in the GST cells of the same cell size. 40 nm SLL cells were found to switch with low amorphization voltage of 0.9 V when pulse-widths of 5 ns were employed, which is much


lower than the 1.6 V required by the GST cells of the same cell size. These effects can be attributed to the fast heterogeneous crystallization, low thermal conductivity and high resistivity of the SLL structures. Furthermore, these differences are related to the film thickness of SLL sublayers. Larger differences could be realized by using thinner sublayers. The difference of the thermal conductivity between single layer material and SLL is one of the main reasons for these excellent performances. Hase and Tominaga’s [165] results on ultrafast coherent phonon spectroscopy have illustrated temperature dependence of lattice thermal conductivity in GeTe/Sb2Te3 SLL films. These data show that the Debye model, including scatterings by grain boundary and point defect, umklapp process, and phonon resonant scattering, well reproduces the experimental value of thermal conductivity measured by using thermo-reflectance. The thermal conductivity in the amorphousSLL film is less temperature dependent, due to the dominant phonon-defect scattering, while in the crystalline-SLL it is strongly temperature dependent because of the main contributions from umklapp and phonon resonant scatterings. Chong and coworkers reported that even after 105 read-write cycles between crystalline and amorphous states, the multilayer structure was preserved [162]. However, Tominaga et al. [166] have found that the interfaces defuse mutually to produce a mixing monolayer, that is, Ge atoms shift forward or backward to the interface in the Ge2Te2/Sb2Te3 stacks to form a superlattice of GST alloys. On the base of this new model, the switching mechanism of GST between amorphous and crystalline states on the basis of the thermal properties was proposed. When Ge atoms (smallest filled circles) in GeTe layers move toward the interface with Sb2Te3 layers, it becomes crystal. When Ge atoms move back to the body of GeTe (to open circles) layers and form Ge2Te2, the state becomes amorphous. That is, the superlattice crystal has a multilayer stack consisting of [–(Sb2Te3)–(Ge–Te–Te–Ge)–]n. Owning to the stack, Ge atoms become surrounded by six Te atoms. And the amorphous must have a sublayer stack of [–(Sb2Te3)···(Te–Ge–Ge–Te)···]n and Ge atoms should show a tetrahedral coordination as a result. This switching was induced by the formation of the [–(Sb2Te3)··· (Te–Ge–Ge–Te)···]n structure from [–(Sb2Te3)–(Ge–Te–Te–Ge)–]n structure. The interface between the GeTe and Sb2Te3 controls the

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local atomic switching of Ge atoms resulting in a phase transition with substantially reduced entropic losses [167]. As a result, the PCRAM devices consume an order of magnitude less energy during the SET process and show enhanced switching responsiveness with respect to their GST counterpart. Other SLL structure phase-change materials, such as Ge/Sb2Te3 [168], GeTe/Sb7Te3 [169], Si/Sb80Te20 [170], GeTe/GST [171], GST/SiO2 [172], GeTe/InTe [173], Ga30Sb70/Sb80Te20 [174] and GaSb/Sb2Te3 [175] were also reported having much better thermal stability in comparison with GST. For example, the 10-year amorphous retention temperature of [Ge (2 nm)/Sb2Te3 (3 nm)]40 film is about 165°C.

11.6 Memory Cell Selector 11.6.1 Overview [12]

A typical PCRAM cell mainly consists of a selector and a resistor. The data storage element (the reversible phase-change resistor) and the memory cell selector are intimately integrated into one single, compact device. Memory cells organized in an array as well as peripheral circuit form a whole functional chip. Careful approach is necessary in designing cell array and corresponding periphery circuitry in a way that minimizes any parasitic effects such as vertical and lateral bipolar junction transistor (BJT) formations, and thermal cross-talk disturbance [176,177]. For PCRAM, the write driver is special and different from other memories. Write time of PCRAM is limited by write operation of SET data which needs slow-quench write pulse for smaller resistance of SET data. Therefore, arbitrary slow-quench shaper scheme is proposed to improve the write time of the SET data [178], which is composed of a maximum current decision part, a slow-quench slope decision part, a minimum current decision part, and a voltage driver with wide operation range. The scheme is also used effectively to enhance distributions and reliability of cell data through writeverify process. The write-verify operations are executed with different write pulse conditions until verify-read data are equal to write-data. The step-up pulse sequences are provided to prevent

Memory Cell Selector

over-write problems which cause poor distribution of cell data and cell reliability during the write-verify process. The verify-read operations are performed with verify-sense-amplifiers. A chargepump system is also important to provide enough write current to the selected PCRAM cells. The charge-pump circuit is generally composed of pump oscillators for clock generation, pump units for pumping charge, active/standby level detectors to maintain the target pumping voltage level, and discharge units for discharging the pumping level into the target level of standby mode. The role of selector is to select the individual memory cells for reading and writing. The cell selection can be on an individual cell basis (bit alterable) or for a group of cells (e.g., an entire block of cells as in NAND FLASH). The memory cell selection device ensures there is no write disturb, the selected cell is writable, and there is adequate read signal-to-noise margin. For resistive memory cells, the memory cell selector also minimizes static power dissipation by the resistive network. In fact, the density of the PCRAM memory cell is in large part determined by the size of the memory cell selector because the resistor can be scaled down to 20 nm node [179]. Ideally, the memory cell selection device has high on-state conductivity, infinite off-state resistance, and occupies a small layout area. Most of the PCRAM integration steps are performed at back-end of the line processing temperature conditions (109

>4 MA/cm2

NA

56.6 MA/ cm2

[182]

[177]

5 × 109 [184]

>10 MA/cm2 109

[185] [186]

0.03 MA/ cm2

3 × 104 [187]

20 A/cm2

104

0.04 MA/ cm2

0.1–1 MA/ cm2

250 A/cm2

0.25 A/cm2 0.01 MA/ cm2

10 A/cm2

1–1000 A/ cm2

106

[188]

50

[189]

103 104 105 109 103

[12]

[190] [191] [192] [193] [194]


Selector type Material

Cell Voltage size range*

On/off On-current ratio# Ref.

Schottky diode P-Si/Al

NA

8 mA

PNP BJT

5.5F2 +2 V/–3 V 2 MA/cm2

PNP BJT

P-Si

PNP BJT

CoSi2

Metal– insulator transition (MIT)

Ovonic threshold switch (OTS)

CoSi2 Pt/VO2/Pt

6F2

+/–2 V +/–3 V

12F2 +1.5 V/ –3 V NA

Chalcogenide NA alloy

0.4 V/ 0.6 V NA

1 MA/cm2

104 106

[195] [196]

3 × 109 [197]

0.3 MA/cm2 3 × 107 [198] 400 A/cm2

103

[199]

NA

105

[200]

*For diodes, the voltage range is the forward and reverse bias voltage at which the on-

and off-current are determined. For MIT and OTS, the voltage range is the switching voltage and the holding voltage.

#For diodes, the on/off ratio are the currents at the forward and reverse bias voltages

specified in the “voltage range” column. For MIT and OTS, the on/off ratio are the currents at the device current biased at the switching voltage to the device current biased at the holding/inhibit voltage.

In the early stage of PCRAM R&D, MOSFET is widely used as the selector. The device width of the MOSFET selector is largely determined by the programming current required. Unlike NAND FLASH for which the programming current per cell is small, PCRAM requires a substantial RESET programming current. The large RESET current calls for a wide device width for a MOSFET selector. For PCRAM technology node of 10 nm, the contact diameter is of 10 nm, the RESET current is projected to be about 40 μA, which may result in a footprint of about 17–22F2 for the PCRAM with a MOSFET selector if the future low-power MOSFET selector has a 1.2 mA/μm current drive [13]. To reduce the cell size without loss of current driving capability, the BJT and diode suitable for large-capacity memories have been presented. However, additional lithography masks are required. Consequently, depending on the doping profile of the two junctions the P-N-P structure can be optimized as a BJT, exploiting the bipolar

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action, or as a pure diode [201]. Diodes can have the minimum 4F2 layout area [179,185]. By sharing the base contact with several cells, the footprint of a BJT selector ranges from 8F2 to about 5.5F2 [197]. The large RESET current also calls for a good quality diode/BJT selector. The current density required of the diode (or BJT) is in the range of 10–20 MA/cm2 for the best PCRAM devices.

11.6.2 Diode

Oh et al. [176] developed vertical pn diode as PCRAM cell switch. Single-crystalline Si of vertical diode is grown by selective-epitaxialgrowth (SEG) into the holes after CMOS transistors to increase Ion/Ioff ratio value higher than poly-Si case. The available maximum Ion is measured around 1.8 mA at the maximum biasing voltage of 1.8 V to diode in the real chip. The measured Ion provides sufficient current for changing the program volume from crystalline state to amorphous state. The Ion of this diode in 5F2 cell is explicitly compared with that of tri-gate in 10F2 cell. It implies strong potential for further scalability of this diode scheme. However, the cell-to-cell isolation in the diode scheme would be a critical problem, because a parasitic lateral PNP-BJT current (IBJT) between the cells in the same row may cause write-disturbance, especially to the nearest neighboring cell. The 90 nm-diode also shows good stability for high current stress. The results of simulated temperature profile while writing RESET state show that the temperature of the pn-junction in vertical diode is not too high to degrade the device operation. However, for the SEG of the 700 nm mono-crystalline silicon into the holes, its thermal process can change the performance of the sensitive 45 nm CMOS transistor devices and beyond, while the deep contact hole may lower the yield of 45 nm CMOS logic circuits. Therefore, this SEG diode technology process at 45 nm is not suitable for embedded applications. A novel 16 × 16 demo array dual trench epitaxial PN junction diode device has been designed and fabricated in the 0.13 μm CMOS process technology [177]. The process is fully compatible to the standard CMOS process (Fig. 11.14), with only 3 extra masks added to the standard CMOS process. The diode array was featured


Figure 11.14 Process flow of dual-trench-isolated epitaxial diode array. (a) BNL and EPI formations on P-type substrate. (b) DT isolation. (c) STI and diode N–/P+ formation. (d) bit- and word line formations.

by its unique blanket epitaxial silicon before CMOS transistor is implemented, all of the thermal process for diode array has been finished before CMOS transistor and its thermal budget will not impact CMOS transistor device even when technology shrinks to 45 nm and beyond. Moreover, the dual trench isolated approach was adapted to isolated diode array instead of inter-metal-dielectric holes. This technical solution can be applied not only to manufacture SOC products which is compatible with CMOS logic process and integrated with embedded PCRAM, but also to participate in the competition of high-density generic memories. The buried N+ layer (BNL) is used as the low-resistance word line, with the pickup contact at the end of word line of diode array to reduce its parasitic resistance effect. BNL has been isolated by deep trench (DT) filled with linear oxide and then undoped poly, with devices on the same word line isolated by shallow trench isolation (STI). In order to improve the breakdown voltage and the on/off current ratio of diode, three-step epitaxial (EPI) process to dual trench epitaxial diode array was proposed [202]. With three-step EPI process

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512


condition, both vertical and lateral Arsenic auto-doping concentration could be reduced by 2–3 orders by adding high temperature and low deposition rate EPI step before main EPI process, as compared to the conventional CVD EPI process. The I–V characteristics of dual trench epitaxial diode array with cell area of 0.196 μm2 (5F2) are shown in Fig. 11.15. It can been seen that forward-bias on-current density at 2 V is higher than 12.5 mA/μm2, reverse-bias off-current density at –2 V is lower than 10–8 mA/ um2, breakdown voltage @10–7 mA/um2 is larger than 8 V, on/off ratio is greater than nine orders of magnitude, which indicate that dual trench epitaxial diode is of excellent quality that enables a RESET operation and a selection operation of the memory array. PCRAM cells integrated with this dual trench epitaxial diode have realized its full function successfully with RESET programming current of 0.7 mA [203]. The normalized cumulative distribution for the programming current density at a fixed forward bias voltage (2 V) is shown the inserted figure in which the x-coordinate represents the ratio of real-measured current density at 2 V to the mean value.

Figure 11.15 Measured I–V curve of diode in 16 × 16 diode array; the inserted figure shows the normalized cumulative distributions for the programming current density at a fixed forward voltage (2 V).


Disturb current between neighbor cells during SET and RESET is an important issue in PCRAM array to prevent incorrectly programming an idle neighbor cell. The disturb current consists of the reverse biased current of the neighbor diode and the bipolar current from the parasitic PNP BJT transistor with P+/N/N+/N-/P+ structure formed from the neighbor diodes. When the forward voltage is at 2 V, the ratio of the disturb current of the first, second, and third nearest neighbor diode to programming current is only 1.34%, 0.1%, and 0.006%, respectively, thus, the disturb current of the nearest neighbor diode along the same word line should be given primary concern. The disturb ratio of the nearest neighbor diode, which is related to the process condition, decreases drastically with thinner EPI thickness when the shallow STI depth and the P+ thickness are fixed, which means that the disturb current (hole) is strongly correlated with the recombination rate of hole and electron under STI. With thinner EPI, the recombination rate of the hole and electron increases. As a result, few holes are injected into P+ region of the neighbor diode, and the parasitic lateral BJT-transistor effect could be controlled. For diode array, substrate leakage is another parameter that needs to be considered, which not only degrades diode program current but also increases power consumption of diode array. Substrate leakage ratio refers to the ratio of Psub leakage to the current of programming diode at forward biased voltage 2 V. The substrate leakage ratio decreases obviously with increasing dosage of BNL. Higher dosage of BNL leads to the increase of the base concentration of parasitic vertical BJT transistor and then diminishes the vertical BJT effect. Liu et al. [184] have established a numerical model combined with geometric, physical, and process parameters based on the 40 nm node to describe electrical properties of a 16 × 16 dual trench epitaxial PN junction diode array for PCRAM application. With the optimized process condition of the BNL dosage and the EPI thickness, the diode array with higher forward current density (~56.6 mA/μm2@2 V), high BVD (~8 V), lower reverse leakage (~10–8 mA/μm2@–2 V), high on/off ratio (~109), cross-talk immunity, and excellent uniformity of electrical characteristics has been demonstrated as shown in Fig. 11.16.

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Figure 11.16 Cumulative probability of forward- and reverse-current density of diodes from silicon data. (Inset) Distribution of the ideality factor.

11.7 Memory Cell Resistor Structure

The large programming current is still a key issue that limits the adoption of PCRAM in many applications. To decrease the programming current, one way is to design and optimize the structure of phase-change element itself. Subtle variations in cell design may have a large impact on critical device characteristics, including endurance, retention, SET and RESET resistance distributions, and SET speed. The memory cell resistor design must be scalable, simple, feasible, compatible as well as highly manufacturable since scaling implies not only a shrink in physical dimensions of the memory cell but also an increase in the number of memory cells per chip. PCRAM cell structure consists two general categories: those which control the cross section by the size of one of the electrical contacts to the phase-change material (contact minimized), and those which minimize the size of the phase-change material itself at some point within the cell, for example, with the phase-change material filling a pore opened in an insulating layer (volume minimized, also known as confined). The typical volume-minimized cell structures tend to be a bit more thermally efficient, showing a RESET current lowered by a factor 2 with respect to the contact-

Memory Cell Resistor Structure

minimized structures and offering the potential for low RESET current requirements. The technology characteristics of some of the recently published PCRAM device structures are summarized in Table 11.5. Table 11.5

Structure

Characteristics of PCRAM device structures Characteristics

Schematic view

Ref.

Mushroom Critical dimension (CD) described as the “heater”

[6]

Edge contact

Contact area is determined by a thin film thickness in one dimension

[204]

μ-trench

Definition of the contact area by the intersection of a thin vertical semi-metallic heater and a trench

[180]

Pore-like currentconfined

Confining the phase-change material layer into a small pore

[205]

(Continued)

515

516


Table 11.5 (Continued) Structure

Characteristics

Ring-type contact

Effective contact area is determined by the thickness of the deposited metal layer

[206]

Crossspacer

Ultra-small lithographyindependent contact area

[207]

PhaseVolumechange line minimized by phase-change film being structured into lines with small diameter Phasechange bridge

Dash-type confine

Volumeminimized through ultrathin films and electrodes are separated by a small oxide gap

Contact size is defined not by a photolithography method but by several nmthick BEC metal confined with dash-type phasechange material

Schematic view

Ref.

[58]

[133]

[208]

Processing

11.8 Processing 11.8.1 Deposition of Phase-Change Materials The vast majority of phase-change materials reported in literature have been deposited by sputtering, i.e., PVD. Sputter deposition from multiple targets makes it very simple to try different compositions. However, since depositing particles in a conventional magnetron sputtering deposition has an isotropic directionality, the step coverage which is defined to be the thickness ratio of films at the bottom of the contact hole over those on the flat surface is decreased by increasing of the aspect ratio of the contact hole. Therefore, the sputtered films typically cannot completely fill high-aspect-ratio vias without keyhole formation. A number of interesting PCRAM cell structures have been discussed (Section 11.7) that call for confining the phase-change volume inside a contact hole (or “pore”) formed in a dielectric, primarily to reduce the RESET current. It is therefore essential to examine alternatives to sputter deposition for GST and other phase-change materials that can successfully fill higher-aspect-ratio vias. Cho et al. [209] developed a novel GST sputter deposition process with in situ deposition/etch/deposition (DED), in order to fill GST into high-aspect-ratio (2:1) pores of approximately 50 nm diameter. Ren et al. achieved void free gap filling of GST on the 45 nm [210] and 30 nm [211] via (as shown in Fig. 11.17) with aspect ratio of 1:1 by two-cycle DED process and a very small composition variation was found for GST film. It was also found that the redeposition of GST material from via sidewall to via bottom by argon ion bombardment during etch step was the key ingredient of the final good gap filling. However, it is very difficult to completely fill via with CD below 30 nm and high-aspect-ratio without keyhole formation for the sputtered films. Among various deposition technologies, CVD has the many advantages of superior step coverage, good uniformity, and high purity for future PCRAM application. However, the precise control of composition, impurity, surface smoothness, and film thickness is still rather difficult for GST due to the narrow window of precursors’ compatibility and deposition conditions, such as deposition pressure and temperature, gas and precursor flow, and bubbling

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temperatures of precursors. Im et al. [208] used CVD GST to fill high-aspect-ratio (4:1) dash-type contacts of 7.5 nm width. The RESET current was below 0.16 mA. In addition, these devices also had fast SET speeds and very good endurance.

Figure 11.17 GST via profile after two-cycle DED process with via CD of 30 nm and AR of 1:1.

However, in an ALD process, excellent step coverage of 100% for both the side/bottom and side/top sections of the contact hole with a high aspect ratio of 10:1 can be confirmed due to the complete surface reaction limited mechanism, which limits the deposition rate in the ALD process. The chemistry-specific ALD process proposed by Eom et al. [212] was quite robust against process variations resulting in highly conformal, smooth, and reproducible film growth over a contact hole structure with an extreme geometry (opening diameter ~65 nm, depth ~400 nm, an aspect ratio of ~6). Other methods were also used to deposit phase-change materials. The amorphous SbTe alloys are obtained by electrodeposition at room temperature and the electrodeposition of Sb was found to be induced by Te, while the latter was not affected by the Sb [213]. Braun et al. [214] obtained amorphous GeSbTe films by using molecular beam epitaxy. Wang et al. [215] reported the solu-

Processing

tion-deposition process for SnSe2 and void-free gap filling of SnSe2 inside nanowells of ~25 nm in diameter and ~40 nm in depth was also realized. Due to its capability of deposition of films with unusual composition, and stoichiometric transfer of a target material to the films, pulsed laser deposition was also used to deposit GST [216].

11.8.2 Etching of Phase-Change Materials

Etching of phase-change materials has been explored using both wet as well as dry etching schemes. Such steps are important for electrical isolation in most cell designs, and are absolutely critical for cell designs such as the pillar cell that depend on subtractive processing to produce a confined volume of phase-change material. Some important parameters that are studied in developing etch processes [217] are etch rate and its selectivity, and anisotropy (etched sidewall angle; steeper profiles are usually desirable since they enable higher resolution patterning). It is also important to understand etch-induced material modification and other sidewall damage effects since these could impact device operation, especially if the damaged portion is close to or part of the active switching volume of the PCRAM. In the end, the etch mechanism of phase-change materials is also very important for optimizing the etch process. There have been a number of studies of plasma etching of phase-change materials. A variety of gas chemistries has been reported in literature, including Cl2/Ar [218,219], CHF3/Ar [218], CF4/Ar [220,221–224], CF4/C4F8 [225], HBr/Ar [226], HBr/He [227], CHF3/O2 [228–231], and CHF3/Cl2/Ar [232,233]. Some of these studies have examined the effects of varying process parameters such as reactant gas concentration fraction, chamber pressure, coil power, and DC bias on the etch rate and anisotropy (i.e., etched sidewall profile and surface graphic). Feng et al. [228] studied the etching characteristics of GST films with a CHF3/O2 gas mixture using a reactive ion etching (RIE) system. The addition of O2 is a necessary step to promote the etching process. The role of O2 is to remove the nonvolatile products by physical bombardment leading to a smooth surface. The addition of O2 can also enhance the etch rate by increasing the production of fluorine radicals. It is also found that an increase of input RF

519

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power leads to a near-to-linear increase of GST etch rate at lower power. The etch rate is up to 83 nm/min, and the selectivity of GST to SiO2 is optimized as high as 3 times. The smooth surface with root-mean-square of 0.72 nm was achieved using optimized etching parameters. However, the sidewall roughness is high. Feng et al. [221] also performed a systematic study of GST etching in CF4/Ar using a RIE system. It was observed that a monotonic decrease in etch rate with decreasing CF4 concentration indicating its importance in defining the material removal rate. Argon, on the other hand, plays an important role in defining the smoothness of the etched surface and sidewall edge acuity. The etch profiles were improved with increasing Ar concentration, which is to promote the etching process as it removes the nonvolatile products by physical bombardment. The GST removal mechanism can be summarized as a combination of spontaneous and ion-assisted chemical reactions with no limitation by ionsurface interaction kinetics such as physical sputtering of the main material or the ion-stimulated desorption of low volatile reaction products (such as GeCl4, SbCl3, TeCl2, and TeCl4) [219]. The N-GST etch process consisting of a high bias Ar/CHF3/Cl2 etch chemistry was found to result in good vertical profiles with acceptable resist budget and process window [232]. However, a resultant etch-induced modification layer exists and has significant implications for device performance. The etch-induced modification penetrates roughly 10 nm deep into the material and removal of the damage is subsequently possible in a fashion which is highly selective to the pristine (undamaged) N:GST material [233]. For the formation of nano-sized GeSbTe patterns, thin films playing the parts of hard masks in the subsequent dry etching processes can be formed on the prepared GeSbTe layers. The introduction of a hard mask can provide the following merits in a process [220]: (1) a hard mask material with a high etch selectivity to GeSbTe under a specific etching condition can be a big help for fabricating finer GeSbTe patterns with robust and uniform shapes, and (2) the total thickness of the resist and hard mask can widen the process window during the GeSbTe patterning process. Both SiO2 and TiN have been confirmed to have sufficient etch selectivity to GeSbTe under each given etching condition. Yoon et al. [220] reported that by using a TiN hard mask process with a CF4/Ar

Processing

chemistry, sub-100 nm features were successfully etched in the GST with good anisotropy and residue-free sidewalls, and such damage as the under-cuts of etched patterns was not observed. Feng et al. [230] investigated dry etching methods for the patterning of Ge1Sb2Te4 films in CHF3/O2 gas mixture with TiN hard mask using RIE system. The gas species CHF3/O2 can reach good etched features with smooth sidewall and a taper angle of 86°. The same method was also successfully applied to etch Si2Sb2Te5 with selectivity of Si2Sb2Te5 to TiN as high as 17 [231]. GST-based materials are known to be halogenated easily and apt to be damaged when exposed to halogen gas–based plasmas in the etch process, whereas a stoichiometric composition of GST needs to be maintained for high-speed phase-change transformation and high degree of cyclability. In particular, it is difficult to conserve the etched sidewall composition of GST without halogenation-induced degradation. It is believed that, by using fluorocarbon gas composed of a low F/C ratio, the surface and sidewall degradation by fluorination during etching can be effectively protected [225]. Among the halogen-gases investigated, HBr showed the lowest damage (as shown in Fig. 11.18 [227]) due to the lowest reactivity.

Figure 11.18 Scanning electron micrographs of cross sections of GST features etched by HBr/He gas.

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Neutral beam etching methods have been investigated to avoid the charge- or physical-related damage [234]. The charge-related problems such as aspect-ratio-dependent etching and gate oxide charging could be removed using reactive neutral beam etching because, compared to the conventional RIE, no ions participate in the etch process. The etch degradation of GST by halogen-based gases using ICP etching and neutral beam etching was compared by Kang et al. [226]. Even though the etch rate is much higher in ICP etching than in neutral beam etching for all of the halogenbased gases, the ICP etching resulted in a thicker halogenated layer with a more severe compositional change of the halogenated layer than the neutral beam etching possibly due to the lower ratio of energetic vertical particle flux to random reactive radical flux. The sidewall of the etched GST feature also showed less etchdegradation in the case of neutral beam etching. A number of groups reported wet etching of phase-change materials using alkaline [235,236] as well as acidic [236–238] solutions. Depending on the etchant and specific phase-change material etched, in some cases the crystalline material was found to have been etched faster than the amorphous phase [235] while the opposite was true in other cases [238]. It is thought [237] that wet-etching of amorphous GST films with a 20% aqueous solution of nitric acid arises from chemical etching that starts with bond breakages, oxidation of each element and subsequent dissolution of the resultant oxides. Ge is the first leached element that dominates the etching process and Sb is the most difficult element to leach in GST thin films. Experimental results [236] show that etching GST thin films can be smooth and well controlled by using 25 wt% bases (such as KOH, NH3·H2O, and TMAH) plus 10 vol% H2O2. The basic wet-etching solutions can result in lower GST etching rates but with a much smoother surface than common acid solutions (such as HNO3) do. The chemical bondings for the GST sample after etching in HNO3 are mainly Ge–Sb, Ge–Te, and Sb–Te, while they are Ge–O, Sb2O5, and Te–O for the sample after dipping in KOH solution. It was hypothesized that GST was first oxidized by H2O2 both in basic and acid solutions. The etching process was milder in basic solutions, while the dissolution of GST was more favored in acid environments due to the protonation effect, leaving a fresh GST surface.

Processing

11.8.3 Chemical Mechanical Polishing of Phase-Change Materials CMP is now a ubiquitous process in CMOS technology, especially in the back-end-of-the-line flow. It enables the formation of inlaid, or “damascene,” structures that are used in copper interconnect fabrication [239]. Such structures are created by first forming a hole (or trench) in a dielectric, then filling the hole, usually with a metal, followed by CMP to planarize the metal with the surrounding dielectric. Thus, CMP allows patterning of the metal without needing an explicit metal etching step. To facilitate mass production of the high density PCRAM, CMP has been employed to develop a high polishing rate, reasonable selectivity, smooth and defect-free surface of GST after gap filling in the confined cell structure. There have been a number of publications on the CMP of phase-change materials such as GST. Liu et al. [240] made arrays of damascene structure of PCRAM cells using CMP process with the dynamic friction coefficient being continuously monitored in situ. SEM and EDS were used to verify that the GST was properly filled in the contact holes and that the material composition of the GST was not changed by the CMP process. The I–V measurement on fabricated cells showed successful switching from the high-resistance amorphous state to low-resistance crystalline state. Zhong et al. [241] used CMP process with self-made alkaline silica slurry to fabricate damascene structure PCRAM cells. The programming endurance of such devices was an order of magnitude better than devices built without CMP. In addition, SET and RESET state resistance fluctuations along the cycling sequence were greatly reduced in the CMP processed devices. Furthermore, the oxidant addition effect on CMP process of GST phase-change film was also studied by Zhong et al. [242]. Hydrogen peroxide (H2O2) is commonly used as the oxidizer in various CMP slurries because it has high oxidizing ability and does not generate ionic byproducts. An ultra-fine surface without deep micro scratches and with root-mean-square roughness of 0.8 nm was achieved by oxidant addition (2 wt% H2O2) in the slurry. XPS measurements showed that Ge, Sb, and Te had been oxidized

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by H2O2 and the surface oxide layer was formed. The chemical alteration oxidation of the surface must occur in the GST CMP process to avoid surface mechanical damage because GST is chemically inert in a pure acidic condition. The oxidization capacity of each element in GST alloy was different. Ge has the highest oxygen affinity and is thus preferentially oxidized because the electronegativity of Ge, Sb, and Te using the Pauling scale is 2.01, 2.05, and 2.1, respectively. The authors suggest that the GST CMP mechanism is similar to that of metals, i.e., oxidation followed by removal of this oxide due to friction with the abrasives in the slurry. CMP uses a combination of chemical and mechanical reactions to remove material, leaving a planarized, damage-free surface. Generally, chemical reactions alter the surface to a mechanically weaker form; this layer is then abraded from the surface leaving the bulk undisturbed. The same group also compared “RIE” cleaning in an Ar plasma post-CMP of GST to conventional ultrasonic cleaning [243]. AFM measurements showed that low surface roughness with root-mean-square of 0.64 nm was obtained after the CMP and RIE cleaning. Particle residue and surface oxidation are removed and the GST material stoichiometric content ratios are unchanged after RIE. Slow I–V sweep measurements on fabricated devices also showed a significant reduction in the threshold switching voltage as a result of the RIE cleaning method. Wang et al. [244] further evaluated typical slurry component H2O2 on amorphous GST CMP. Resistivity-temperature tests for the GST samples post-CMP at different ageing time show the addition of H2O2 does not affect the phase-change property of bulk GST even after ageing for two months. However, when H2O2 is present, AES measurements reveal that there are Ge depletion and Te accumulation while the oxygen depth is the same, which means H2O2 does not affect the bulk GST but can cause composition fluctuation in the interface, hence might deteriorating the reliability of PCRAM in the long term. Shin et al. [245] also found that Te atoms were segregated from the matrix, forming large hillocks on the surface whose amount increases with increasing platen speed and pressure. During the CMP of a-GST in the acidic H2O2 slurry, a-GST exhibits a behavior from active to passive transition for H2O2 concentration from low to high and a possible polishing mechanism was presented by He et al. [246]. When the H2O2 concentration is

Processing

low, e.g., below 0.5 wt%, the removal of a-GST during CMP is controlled by mechanical abrasion because the a-GST is chemically inert in a pure acidic condition. When the H2O2 concentration is medium, chemical reaction between the pad and the wafer is enhanced and there is a competition between the a-GST dissolution and oxide formation of each element. The removal of a-GST seems to be controlled by a-GST and the corresponding partial oxide dissolution and mechanical removal of residual oxide. When the H2O2 concentration is high, e.g., above 2.5 wt%, the formation of a-GST oxide is fast enough, and the removal of a-GST is controlled by mechanical removal of a-GST oxide and its subsequent dissolution. When the oxidizer H2O2 is replaced by (NH4)2S2O8, the remove rate of a-GST with (NH4)2S2O8 was higher than that with H2O2 at the same oxidizer concentration a-GST exhibited an active dissolution behavior in the experiment range for (NH4)2S2O8 [247]. AES results also showed that high concentration of H2O2 could result in much Ge loss and rich Sb accumulation; however, Ge, Sb, and Te content almost hold the line in the our experiment range for (NH4)2S2O8, and little accumulation of Ge and Te in the a-GST surface region was found. Wang et al. [248] investigated the effect of the kinds of acids and surfactants on GST CMP. The GST CMP process was promoted by the additives with the increase in the molecular chain length and the O/OH number. When additives were added, they would be located on the SiO2 surface because of electrostatic attraction or polarity. The additive-modified SiO2 surface would react with the oxidized GST. Then, mechanical tearing led to the GST removal. Additives with longer molecular chain lengths and more O/OH groups would strengthen the complexation effect between the lone pairs of O(H) and the empty p orbits of Ge(IV), Sb(V), and Te(IV) because of the more adequate coordination and steric stabilization effect of the additive chain, which would affect the dissolution of the oxidized GST and would increase the removal rate. Additives also had a significant impact on the polishing efficiency besides the complexation effect. At pH 3, which was near the isoelectric point (IEP) of SiO2 (ranging from below 2 to above 3), nonionic additives were beneficial for the dispersion of SiO2 abrasives. The increase in the molecular chain length would be better for the dispersion of the slurry because of the steric hindrance, which

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would result in slurry with more uniform abrasives and would increase the proportion of functioned abrasives to all the abrasives in the slurry. Zhang et al. [249] explored the effect of pH and abrasive concentration on the CMP of amorphous GST film using the colloidal silica-based slurry. It was found that material removal rate strongly depends on the pH and abrasive concentration. When using only pH adjusted de-ionized water, the material removal rate decreases as the pH was raised or lowered toward neutral, which indicates that chemical effects dominate in the polishing rates. However, electrostatic interactions between the abrasive particles and the surface of GST control the polishing rate with the variation in pH when the silica-based slurry was used. In addition, material removal rate was proportional to abrasive concentration. With the variation of abrasive concentration, material removal rate is strongly correlated with coefficient of friction. The mechanism of GST CMP in two typical silica-based slurries (pH 2 and pH 11) was further explored by Wang et al. [250]. Static etching experiments of GST film showed that GST film was etched faster in alkaline region than acidic region, both resulting a porous island-like surface. Zeta potential measurement demonstrated GST has four IEPs and the solubility data showed Sb and Te are more water soluble than Ge, also more soluble in alkaline region than in acidic slurry. A further comparison of polishing performance in the two slurries showed alkaline slurry leads to faster removal rate of GST and higher polishing selectivity of GST over oxide, while acidic slurry results in a higher removal rate/static etching rate ratio, both not changing the phase-change property of GST post-CMP. It is well known that GST shrinks 5–7% in volume when switching from the amorphous to the crystalline state. GST shrinkage induces high thermal stress on the interface and decreases the adhesions of GST to the surrounding oxide layer and electrode, which leads to voids or peel-off on these interfaces and consequently degrades the reliability of the PCRAM cell. Zhong et al. [251,252] proposed annealing and then CMP GST material (that is crystalline GST CMP process) to solve and avoid this problem. The material removal rate of crystalline GST is faster than that of amorphous one because grain boundaries of crystalline GST are

Processing

easy to be attacked by chemical material in slurry, which result in faster chemical reaction and high material removal rate consequently. Likewise, the surface roughness of crystalline GST is also increased. The augment of both chemical reaction and mechanical abrasion increased greatly material removal rate of crystalline GST. To crystalline GST CMP, the change in grain size is expected to affect the chemical aspects of CMP. Small-grained GST film (many grain boundaries) is thought to polish faster than large-grained GST film because grain boundaries are chemically reaction faster than single grain areas of GST film. However, the very poor adhesion between GST and SiO2 is a huge challenge to the crystalline GST CMP process [253]. The high density (40%) GST via array has been achieved by GST CMP process with the fine tuning condition while the element stoichiometric proportion in GST via is not changed [254]. Cui et al. [255] have found severe pitting corrosion phenomenon during the CMP of nitrogen-doped polycrystalline GST (pcGST) using the alkaline slurry with H2O2 because the chemical passivation layer on the pc-GST film was difficult to form. The nonionic polymer, such as polyvinyl pyrrolidone (PVP), is effective in inhibiting the pitting corrosion of pc-GST film in the alkaline media [256]. On the contrary, Zhong et al. [242] and Wang et al. [248] have conducted amorphous GST CMP with acidic slurries added with H2O2 and some surfactant, and found enhanced CMP performance such as a higher amorphous GST polishing rate and lower surface roughness without inducing pitting corrosion. Cui et al. have also investigated the CMP mechanism of pc-GST using nitric acid slurry [257] without or with 1.0 wt% H2O2. During the CMP of pc-GST film using a colloidal silica–based acid slurry without H2O2, the pc-GST film surface undergoes selective corrosion of Ge and Sb due to the different chemical reactivity of Ge, Sb, and Te elements, resulting in pitting corrosion on the pc-GST film surface. By adding 1.0 wt% H2O2 in the slurry, the selective corrosion of Ge and Sb was suppressed by forming surface Ge, Sb, and Te oxide layer on the pc-GST film surface, thereby reducing pitting corrosion on the pc-GST film surface. All of the above studies on the chemical effect and mechanical effect on GST CMP are based on abrasive-containing slurry. Usually, the Mohs scale of the abrasive (colloidal silica) is 7. GST is a soft

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alloy, which makes it easy to be scratched during CMP. Therefore, the CMP of GST using abrasive-free slurries becomes more and more interesting. CMP of amorphous GST is studied using aqueous solutions of iron trichloride (FeCl3) as possible abrasive-free slurries [258]. The experimental results indicate that the abrasivefree solutions have a higher polishing rate and better surface quality. XPS demonstrates the polishing mechanism of the FeCl3 in which oxidations of Ge and Sb are easier to be removed than oxidations of Te during CMP, which can be conveniently used to clean the post-CMP films. Resistivity test shows that the abrasivefree solutions with FeCl3 have no influence on the electrical property of pre-CMP and post-CMP amorphous GST films.

11.9 Characteristics of PCRAM Memory Cell 11.9.1 Reduction of Operation Current/Voltage

The large programming current is still a key issue that limits the adoption of PCRAM in many applications. Furthermore, large programming current in PCRAM imposes a stringent requirement on the current delivered by the memory cell selector (see Section 11.6) integrated in series with the PCRAM. In order to provide the current required to switch the states of PCRAM, the area of the memory cell selector may not be scaled down as fast as the memory cell itself. Thus, the size of the cell selection device becomes the limiting factor for the device density and annihilates the small size advantage of PCRAM technology. Therefore, reducing the programming current (particularly RESET current) is necessary for achieving both high-density and low power consumption of PCRAM. Since the temperature of the phase-change material should reach its melting point, a very large current is needed for the RESET process. Thermal heat for the temperature rise is generated by Joule heating while the electric current passes through the PCRAM device. From the viewpoint of the power consumption, the RESET current, necessary to cause the RESET process, should be as small as possible to raise memory integration degrees by making the area of the driving transistor small. It is generally agreed that the reduction of RESET current is one of the most critical issues in

Characteristics of PCRAM Memory Cell

developing PCRAM technology. In a PCRAM cell, the RESET current is affected, at least, by the cell geometry/size and the materials properties, such as the melting temperature, electrical resistivity, thermal conductivity, composition of the chalcogenide film, and the degree of crystallization, which changes according to the setting time of phase-change material, the electrical resistivity and thermal conductivity of top/bottom electrode, and dielectric environment. Experimental data shows that the main source of heat for a SET (crystalline) to RESET (amorphous) transition is the GST bulk and interface regions instead of the contacting electrode [259]. Therefore, a phase-change layer with a much higher resistivity than the resistive heater is necessarily adopted for a higher energy efficiency to markedly reduce RESET current [260]. The bottom electrode (BE) plays the role of current supplier and a “cooler” (as opposed to a heater) to insulate the programming volume from a thermal sink. A small-contact-area electrode is used primarily to minimize heat loss from the chalcogenide. Small contact area between BE and GST cell is one of the most important key processes to reduce the writing current. The typical approach to be taken for reducing the writing current is to simply decrease BE contact diameter as much as possible. The diameter of the BE can be smaller than the lithographic limit if the side deposition effect (here called SPACER) on the hole wall is used. This effect is obtained by depositing an insulating film material on the sidewall of holes. However, the simple size reduction generates several physical and electrical issues. The conventional pillar type BE may exhibit undesired physical seam. As the BE size becomes smaller, it is very difficult to fill the contact hole with electrode material due to its steep contact profile, high step coverage of electrode, and CMP variation. When such seam is produced, GST is melted down and filled into the contact seam during writing sequence, thus increasing contact area as well as RESET distribution. Therefore, some other type BE, such as μ-trench, edge contact, ring-type, and confined structure shown in Section 11.7 are used, the RESET current tends to become smaller. A self-aligned μTrench-based cell architecture has been integrated in a 45 nm 1 Gb vehicle based on a pnp bipolar junction transistor for the array selection and the RESET current is 200 μA [197]. PCRAM using thermally confined TaN/TiN BE with diameter of 39 nm has demonstrated 30 μA

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RESET current, representing a 90% reduction compared with conventional solid TiN BE [261]. Characteristics of 20 nm PCRAM cell technology including diode and 7.5 nm × 22 nm phase-change resistor with confined structure and high resistive BE show that the RESET current was below 100 μA [179]. PCRAM bits with singlewall and small-diameter multi-wall carbon nanotube electrode achieve programming currents of 1.4 μA (RESET) for carbon nanotube diameter of 1.2 nm [262]. In the meantime, the RESET current also depends on the thermal process PCRAM cell. The thermal process for SET and RESET of PCRAM is contradictory. During the SET process, good thermal insulation is required to enhance the crystallization of phase-change material. However, very good heat dissipation performance is necessary for the RESET process in order to obtain the amorphous state. Therefore, thermal equilibrium must be realized in a PCRAM cell to ensure both SET and RESET processes successively. The thermal design of PCRAM cells strongly affects the programming current, reliability, and scaling. Successful PCRAM implementations require careful analysis and engineering of the heat generation and thermal resistance distributions and geometrical and material aspects should be taken into account for thermal design and optimum-cell scaling. According to ref. [263], a gross estimate of the heat transfer in the PCRAM cell during RESET programming indicates that only about 1% (q1 ~ 0.2–1.4%) of the heat is used for switching the programmable volume of the crystalline. The effective reduction of the thermal diffusion into the metal and oxide, as well as promotion of heating efficiency, are with significant meaning to reduce programming current of PCRAM. In order to reduce writing current and develop high density PCRAM, high-resistivity heater should be employed and heater engineering was more promising way than heater size reduction, since the higher resistive heater electrode was more efficient for joule heating [264]. The simulation results with a one-dimensional heat conduction model revealed [265] that an inserted heating layer with an electrical resistivity higher than 0.1  · cm and with thermal conductivity κ and specific heat c as low as those of phasechange material was suggested to be able to effectively lower the operation current. The effect of resistivity was elucidated to be


much more significant than those of thermal conductivity and specific heat. It is believed that the selection of right materials as the inserted heating layer could be an excellent way to facilitate advancement of PCRAM. The use of a highly resistive heating layer with low heat conductivity, such as amorphous carbon (a-C) [265], TiON [266,267], TiSiN [268,269], SiTaNx [270,271], GeSi [272], Ta2O5 [273], GeSiN [274], GeSiSb [275], GeN [276,277], C60 [278], TiO2 [279], poly-Ge [280], Si-rich SiSbx [281], WO3 [282,283], CeO2 [284], and et al., in contact with a phase-change material is an effective approach because the self-heating of the phase-change material is often insufficient to raise its temperature to the melting point. Fluctuations (or drifts) in switching voltages such as programming SET/RESET voltages and threshold voltage pose serious obstacles to the reliable operation of electrical phasechange memory devices. The oxidation of TiN electrode was also found to reduce the values of SET and RESET resistances and their fluctuations, resulting in the stabilization of switching voltages and hence the resulting increase in the programming cycles [267]. SiTiN films have shown outstanding barrier performance in Cu metallization and highly electrical resistivity, therefore can be explored as both diffusion barriers and heating layers for the cells of PCRAM [268]. The required current for RESET and the required time for SET were reduced greatly and the rewritable cycles also improved by using TiSiN heating layer [269]. Highly resistive SiTaNx amorphous films were studied focusing on their use as heating layers for PCRAM [270]. The SiTaNx films with higher nitrogen contents showed excellent thermal stability with amorphous structure sustained until at least 900°C. Lee et al. [272] reported that the in situ doped polycrystalline Si0.75Ge0.25 films promoted the temperature rise and phase transition in the GST and caused drastic reduction in both SET and RESET currents compared to a conventional TiN heater material. A memory cell with a very thin Ta2O5 film (about 2 nm) between GeSbTe and a W plug for PCRAM that enables low-power operation (1.5 V/0.10 mA for a W plug with a diameter of 180 nm) has been developed by Matsui et al. [273]. The Ta2O5 interfacial layer works not only as a heat insulator enabling effective heat generation in GeSbTe but also as an adhesion layer between GeSbTe and SiO2 underneath. By inserting a C60

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layer between the phase-change material and the metal electrode [278], the heat dissipation and, thereby, the operating current was dramatically reduced by more than a factor of 4, which may be due to the vertical thermal confinement and lateral temperature uniformity enhanced by the thermal property anisotropy. GeN has already been applied as the adhesion layer in the digital versatile rewritable disc because of its great adhesiveness with GeSbTe and good barrier effect [285]. GeN was also applied to PCRAM device as the interfacial layer [276,277]. The as-deposited GeN with thickness of 3 nm is in the amorphous state and has a smooth surface. This layer improves the device reliability by enhancing the adhesion strength of the GeSbTe film and suppressing the diffusion of atoms. These properties together with the high electrical resistivity and moderate thermal conductivity realize a considerable voltage reduction during the SET and RESET process. In addition, GeN can increase the adhesive strength between the GST layer and the layer below by at least 20 times. It is well known that TiO2 with good heat stability and low heat conductivity is widely used in CMOS process. An 8 nm TiO2 layer was applied into PCRAM as a heating layer [279] and it showed an advanced electrical threshold switching characteristics in the DC I–V measurement with the much lower value of threshold voltage. The RESET current of the device cell decreased 68% compared with that without TiO2 layer. It is also well known that the physical properties (electrical resistivity, crystallization temperature, and thermal conductivity) of silicon material can be controllably modified by doping with other elements. The magnitude of the resistivity of the Si9Sb film is close to the simulated value (0.1  · cm), which indicates that the Si9Sb heating layer can effectively generate more Joule heat [281]. The measured resistance–voltage curves show that both SET and RESET voltage values for an Si9Sb inserted PCRAM cell are lower than those of the conventional PCRAM cell. Tungsten trioxide (WO3) is an n-type semiconductor and has a very low thermal conductivity (1.63 W/m K for 100–300 nm thick film). The electrical resistivity of crystalline WO3 film is about 0.5  · cm. In addition, WO3 bears a high melting point (1743 K) and has a stable orthorhombic crystal structure around the melting


point of GST (883 K). Moreover, the interactions between WO3 and Ge, Sb, or Te atoms are not expected to occur. That is to say, WO3 will be thermally stable at high temperature (900 K) during RESET operation, which is essential for a better operating reliability of the PCRAM cell. Therefore, crystalline WO3 thin film is inserted in PCRAM cell for enhancing the thermal efficiency to reduce the power consumption [282,283]. Due to the low electrical resistivity and the low thermal conductivity of crystalline WO3 film, the overall SET resistance of the PCRAM cell will not be greatly increased, while the remarkably increased overall thermal resistance helps to reduce the RESET voltage. The WO3 heating layer effectively helps to suppress the heat dissipation through the W plug, which achieves a higher RESET temperature and transfers the hottest position from the middle of GeSbTe layer to the GeSbTe-WO3 interface. Also, the thermal uniformity over the W plug is greatly improved by the inserted WO3 layer, which promotes to form a series connection in GeSbTe layer, resulting in a lower RESET voltage.

Figure 11.19 Central cross-sectional temperature profiles for PCRAM cells: (a) with poly-Ge interlayer (input current: 0.35 mA– 250 ns), (b) without poly-Ge (0.35 mA–250 ns), and (c) RESET process of PCRAM without poly-Ge (0.84 mA–250 ns).

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Due to its low interface trap density and small leakage current density, cerium dioxide (CeO2) is widely used as an insulator in metal ferroelectric insulator semiconductor structures and metal–oxide–semiconductor devices. Because of its low thermal conductivity, which is also expected to further decrease with decreasing film thickness, CeO2 should be a promising candidate as buffer layer of PCRAM cells [284]. The presence of a buffer layer remarkably reduced the RESET voltage of the PCRAM cell. Even at voltage pulse width of 10 ns, the buffered PCRAM cell could accomplish RESET operation. It is concluded from the theoretical thermal simulation of RESET process that the improved performance of the PCRAM cell with a CeO2 buffer layer can be attributed to the fact that the buffer layer not only acted as heating layer but also reduced efficiently the cell dissipated power. On the other hand, since 3–17% of the applied energy was untapped, diffusing upward out of the phase-change film [263], it is worth considering whether utilizing a suitable upper heating layer can ameliorate the heat efficiency to reduce the programming power. A SiGexNy upper heating layer was proposed to PCRAM [274]. It was indicated that the amorphous SiGexNy heating layer was crystallized along with the melt of the Ge1Sb2Te4 layer. Then the SiGexNy heating layer preserved its crystalline state during the successive programming cycles. With this crystalline SiGexNy heating layer, the SET and RESET threshold voltage values were reduced, which enhanced the heat efficiency and decreased the power consumption of the PCRAM cell. A higher temperature achieved by using crystalline SiGexNy layer than the amorphous one and the hottest position in the phase-change layer slightly moved close to the bottom electrode, indicating an improved heat concentration in the Ge1Sb2Te4 layer. Superlattice-like top electrode formed alternately by TiN and W was also employed into PCRAM with the aim of reducing the power [286]. The low thermal conductivity of superlattice-like electrode is responsible for the performance improvement of PCRAM. In summary, the physical parameters of various heating layer materials, phase-change material (GST), dielectrical material (SiO2), and electrode (Al) are presented in Table 11.6.


Table 11.6

Materials GST [280] SiO2 [280] Al [280]

W [280]

TiN [280] a-C [265]

TiON [266,267]

Physical parameters of various materials Electrical resistivity ( · cm)

Melting temperature (K)

3.61 × 10–4 (poly) 0.24 10 (amorphous) 0.28

202 202

883 883

2.65 × 10–8

900

933

1014

1.4

5.71 × 10–8

174

10–6

0.01–1

0.01–100

TiSiN [268] 0.039–0.69 SiTaNx [270]

Thermal Heat conductivity capacity κ (W/m K) (J/kg K)

0.07–1.21

237 28.9

0.2–2.2 1–22

730 132 784 617

~700

1993 3695 3223 3652 —

—

—

>1073 —

—

—

—

GeSi [272]

3.09 × 10–3

4.7–11.1

—

poly-Ge [280]

0.48

17.4 (1000 K) 60 (300 K)

350 (600 K) 1211 320 (300 K) 1211