Predictive Control Algorithm Technique for ... - Semantic Scholar

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 55, NO. 12, DECEMBER 2008

Predictive Control Algorithm Technique for Multilevel Asymmetric Cascaded H-Bridge Inverters Marcelo A. Pérez, Member, IEEE, Patricio Cortés, Member, IEEE, and José Rodríguez, Senior Member, IEEE

Abstract—Predictive control algorithms have been proposed for power electronic converters, featuring a high performance in terms of dynamic behavior. This is true due mainly to the accurate modeling and the finite set of inputs or possible switching combinations. However, when it is used in multilevel converters, the dynamic performance is degraded, because the optimization algorithm needs to evaluate and search over a large number of possible switching combinations. In this paper, a predictive control algorithm, which exhibits high dynamic performance for multilevel converters, is proposed. The algorithm reduces the complexity of calculations and the number of possible combinations, allowing the use of predictive control with a large number of switching states. Experimental results on a 27-level asymmetric multicell converter, which validate the proposed algorithm, are presented. Index Terms—Asymmetric multicell inverters, multilevel converters, predictive control.

I. I NTRODUCTION

M

ULTILEVEL inverters can provide an efficient alternative to high power applications, providing a high quality output voltage, increasing the efficiency and robustness, and reducing the electromagnetic interference. There are three wellestablished topologies of multilevel inverters: neutral point clamped (NPC) [1], flying capacitor [2], and cascaded H-bridge (CHB) [3], [4]. This paper deals with the CHB inverter topology which is based on a series connection of many single-phase H-bridge inverters to provide the total output voltage required by the load [5], [6]. The CHB inverter with equal dc sources has a large number of redundant switching combinations that synthesize the same output voltage per phase [7]. Using asymmetrical dc sources, it is possible to reduce the redundancies, increasing the output voltage levels [8]. Therefore, a high quality output voltage can be achieved using only a few H-bridge inverters [9], featuring a very low harmonic content, reduced common mode voltage [10], and practically no electromagnetic compatibility issues [11]. Considering the high quality output voltage provided by this converter, applications like high power drives [12], [13] and STAtic COMpensators (STATCOMs) [14] have been proposed. Manuscript received April 16, 2008; revised August 29, 2008. First published October 31, 2008; current version published December 2, 2008. This work was supported in part by the Chilean Government under Project FONDECYT 1080443, by the Industrial Electronics and Mechatronics Millennium Science Nucleus, by the Science and Technology Bicentenario Project PSD-30, and by Universidad Técnica Federico Santa María. The authors are with the Department of Electronic Engineering, Universidad Técnica Federico Santa María, Valparaíso 110-V, Chile (e-mail: [email protected]). Digital Object Identifier 10.1109/TIE.2008.2006948

The modularity provided by the CHB is very attractive for STATCOM applications, because the dc sources can be replaced by capacitors which provide the reactive power required to compensate the load current [15]. Predictive control relies on a model of the inverter and basically calculates the error of a cost function for each possible input, selecting the input that minimizes this function. Predictive control algorithms exhibit a high dynamic and a very good performance when applied to power electronics [16]; this feature can be achieved because the power electronics devices, in spite of its nonlinear characteristic, can be modeled accurately [17], and using a parameter estimation scheme, the model uncertainties can be adjusted [18]. In addition, the inputs belong to a finite set of switching combinations [19], reducing the processing time used to perform the optimization. Predictive control has been successfully applied to two-level three-phase inverters [20], where the cost function is related to minimize the error of the output current and a given current reference. Cost functions with higher complexity can be implemented, incorporating the model of the load to provide a direct power control [21], [22], the model of an induction motor to provide flux and torque control capability [23], or impose a desired load current spectrum [24]. Multilevel inverters have a higher number of switching combinations than a two-level inverter [25]. Hence, the number of iterations to implement the predictive algorithm, as well as the processing time, is greatly increased. This requirement degrades the overall performance, and the implementation of predictive control could become impracticable when the sample time is large enough. However, the predictive control of threelevel NPC inverters has been reported [26]. The NPC inverter has the property that does not have switching redundancy, i.e., each possible output voltage has one and only one switching combination; therefore, the processing time could remain small. In [27], an extension of the algorithm is proposed and tested in a four-level NPC. It is possible to reduce the processing time required by predictive control, using the fact that the solution of the discrete model can be expressed directly in terms of the state variables. Therefore, this function does not have to be evaluated in each optimization iteration. The theoretical background and an example application can be found in [28] and the references therein. This paper proposes a predictive control algorithm for multilevel inverters, which has a reduced execution time. The algorithm is based on a two-stage sequence; the first stage uses the direct solution to obtain a reference state vector. The second stage selects, if possible, the best switching combination

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PÉREZ et al.: PREDICTIVE CONTROL ALGORITHM TECHNIQUE FOR CASCADED H-BRIDGE INVERTERS

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Fig. 2. Predictive control algorithm.

of switching combinations per phase for a CHB with N inverters connected in series is given by S = 3N

(3)

where S is the number of switching combinations. Fig. 1.

Multilevel asymmetric CHB inverter topology.

III. P REDICTIVE C ONTROL A LGORITHMS

that matches the cost function, using the available switching redundancies. The experimental results of the algorithm applied on a 27-level CHB inverter are given. II. A SYMMETRIC CHB I NVERTER The CHB inverter can provide a high output voltage with low harmonic content, connecting in series many single-phase three-level H-bridge inverters. The power topology of a multilevel CHB inverter is shown in Fig. 1. When the dc link voltages are equal, the maximum number of output voltage levels that this topology can provide is given by L = 2N + 1

(1)

where L is the number of levels, and N is the number of inverters connected in series. Using different dc voltages, it is possible to increase the output voltage levels using the same number of H-bridges. The maximum number of voltage levels is obtained when the ratio between each dc voltage is three, namely, trinary. The maximum number of levels using a trinary dc voltage ratio is given by L=3 . N

(2)

On the other hand, the number of possible switching combinations does not depend on the asymmetry factor. The number

Predictive control uses a model of the system to be controlled to calculate the state variables at the next sample time. Then, it selects the input that minimizes a cost function defined by these state variables and the references. The basic algorithm to implement a predictive control starts sensing the state variables x(k) and disturbances d(k) of the system in a given sampling time k. Using a suitable model, it is possible to obtain the state variables during the next sampling time x(k + 1), for each possible input u. Using this predicted variables and the references xref (k + 1), it is possible to optimize a defined cost function E. The input u∗ that minimizes the cost function is applied in the next sampling time k + 1. This algorithm is shown in Fig. 2, where it is possible to note that the operation of modeling and evaluating the cost function, which are both time consuming functions, are within the optimization loop, repeated for each possible input. IV. P REDICTIVE C ONTROL FOR P OWER I NVERTERS In a three-phase cascaded multilevel inverter, composed by single-phase inverters connected in series, the total number of switching combinations, i.e., possible inputs, is given by Sp = (3N )P = 33N

(4)

where Sp is the number of switching combinations of the threephase inverter, and P = 3 is the number of phases. The predictive algorithm must calculate the optimal input, considering


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and can be expressed as vo =

N %

Vdcj sj

(10)

j=1

where Vdcj is a diagonal matrix containing the dc-link voltages, and sj is the switching combination of the j-inverter. Thus, using this approach, it is possible to reduce the possible switching combinations, reducing also the number of iterations. The number of switching combinations necessary to perform the optimization is given by Sp = P (3N ) = 3N +1 .

Fig. 3. Three-phase systems with neutral point not connected.

each one of this switching combinations, which becomes very difficult as soon as N is greater than one. However, to reduce the number of algorithm iterations, it is possible to take advantage of the fact that, in three-phase systems with no neutral point connected, the line currents can be used to calculated directly the voltages required in each phase. When the neutral point is not connected, as shown Fig. 3, the line current must accomplish ioa + iob + ioc = 0

(5)

and each current can be calculated, considering the impedances Za = Zb = Zc = Z, as io =

1 M(v + vcm ) Z

(6)

where io is the three-phase output current, v is the tree-phase balanced output voltage, vcm is the common mode output voltage, and   2 −1 −1 1 −1 2 −1  . M= 3 −1 −1 2 Applying the properties

Mx = x

(7)

when x is a balanced three-phase variable and Mx = 0

(8)

when x is a common mode variable, the total output voltage can be calculated as vo = Zio + vcm .

(9)

Therefore, given a defined common mode voltage, it is possible to obtain the output voltage required to produce the desired output current. In CHB inverters, this output voltage is a function of the dc link voltages and the switching combinations of each inverter

(11)

For instance, consider the multilevel CHB shown in Fig. 1 with N = 3 inverters and S = 27 switching combinations per phase. Using the proposed methodology, the three-phase switching combinations are Sp = 81 instead of Sp = 19.683, when all the possibilities are considered. V. P ROPOSED P REDICTIVE C ONTROL A LGORITHM In this section, an algorithm to efficiently implement the predictive control for multilevel inverter is proposed. The proposed algorithm is based on the following two stages: 1) the use of a direct solution to reduce considerably the required processing power and 2) the analysis of switching redundancies of the topology in order to reduce the subset of possible inputs. A. Direct Solution The discrete model of a multilevel inverter is given by x(k + 1) = Ax(k) + B (x(k), d(k)) u(k) + Ed(k)

(12)

where x are the state variables, u are the inputs, and d are the disturbances. The matrices A, B, and E define the dynamic of the system. It is important to note that the matrix B, which multiplies the inputs, depends on the state variables and disturbances, which is a common behavior in power electronics converters. The predictive control algorithm is based on a cost function given by E = g (x(k + 1), xref (k + 1))

(13)

where g is an arbitrary positive semidefinite function, xref (k + 1) is the state vector reference for the next sample time, and x(k + 1) is the estate vector predicted. The algorithm optimizes the cost function over the set of possible inputs, and the input which minimizes the cost function is applied at the next sampling time u(k + 1) = u∗ .

(14)

This algorithm follows the scheme mentioned in the previous section, shown in Fig. 2. To find the direct solution of the predictive algorithm, it is necessary to obtain the state variables from the cost function.



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TABLE I VOLTAGE LEVEL REDUNDANCIES

the algorithm can be applied if the state variables can be expressed explicitly from the cost function. B. Redundancy Analysis

Fig. 4.

Predictive control algorithm using the direct solution.

Consider a cost function based on the quadratic error of the state variables and the references, given by E = (x(k + 1) − xref (k + 1))2 .

(15)

To minimize this function, it is necessary that E ∗ = 0 ⇒ x∗ (k + 1) = xref (k + 1)

(16)

replacing this expression in the discrete model, it is possible to define F(k) = xref (k + 1) − Ax(k) − Ed(k).

(18)

and the algorithm only has to find the possible input u∗ closest to the optimal input u(k + 1). If the matrix B does not have an inverse, it is possible to calculate the term G(k) = B (x(k), d(k)) u(k + 1)

VI. T WENTY -S EVEN -L EVEL A SYMMETRIC H-B RIDGE I NVERTER

(17)

This function does not depend on the inputs and can be calculated outside the optimizing loop. Moreover, if it is possible to find B−1 (x(k), d(k)), then the required input can be calculated directly using u(k + 1) = B−1 (x(k), d(k)) F(k)

The switching redundancies are defined by the different switching combinations that produce the same output voltage per phase. In the symmetric CHB inverter, there exists a maximum of redundancies. They are reduced when the asymmetry factor is changed, reaching no redundancies when the asymmetry is trinary. In the Table I, the switching combinations and the corresponding output voltages using two cells per phase for symmetric H-bridge and two asymmetric H-bridges are shown. When there are no redundancies, the correspondence between switching combinations and output voltages is direct, because each phase output voltage calculated at the previous section has only one corresponding switching combination. This feature simplifies the implementation of the predictive algorithm; however, the degrees of freedom are reduced. Therefore, to control other state variables, for example, the dc link voltages, it is necessary to use a weight factor.

(19)

for each input u(k + 1) and compare with the function F(k) in order to obtain the minimum error. This modified algorithm is shown in Fig. 4. The time consuming operations, like next step evaluation and cost function calculations, are processed outside the optimization loop. This algorithm can be applied directly to any converter, which can be expressed as (12), and uses a quadratic error over its states (currents and/or voltages). For another cost functions,

The 27-level asymmetric CHB inverter is composed by three single-phase three-level inverters per phase, each one fed by a dc voltage which has a trinary ratio, i.e., vdc1 = Vdc , vdc2 = 3Vdc , and vdc3 = 9Vdc , like as shown in Fig. 1. Each phase of this inverter can synthesize an output voltage vo of L = 3N = 27 levels. Assuming a resistive–inductive load model, the system can be described by the following: L

d io = −rio + Mvo dt

(20)

where vo = s1 vdc1 + s2 vdc2 + s3 vdc3 .

(21)

Consider that each dc link is fed by a diode rectifier and they have a fixed value. The output voltage can be written as vo = sVdc

(22)

where the switching combination is s = s1 + 3s2 + 9s3 .


(23)

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TABLE II EXPERIMENTAL SETUP PARAMETERS

Fig. 5. Implementation of direct predictive controller of a 27-level CHB inverter.

The discrete model, using a first order derivative approximations, is given by x(k + 1) = Ax(k) + Bu(l) where x = io , u = s, and & r' I A = 1 − Ts L

B=

Ts MVdc . L

The function F(k) to obtain the direct solution is & r' io (k) F(k) = ioref (k + 1) − 1 − Ts L

(24)

(25)

(26)

and the function G(k) is

Ts G(k) = Vdc Ms(k + 1) L

(27)

Excluding the common mode voltage and considering only balanced switching combinations, it is possible to determine directly the optimal switching combination using & ' r' L 1 & ˆs = (28) ioref (k + 1) − 1 − Ts io (k) . Ts Vdc L

This switching reference can be calculated before the optimization loop. The optimization loop must calculate the error between the optimal switching combination and each one of the possible switching combinations using, for example, an error function like Es = (ˆs − s(k))2 .

(29)

The input that produces the smallest error is considered for the next switching combination s(k + 1). The multilevel CHB inverter does not have redundancies; therefore, it is possible to simplify the optimizing loop, calculating directly the switching combination for each inverter

Fig. 6. Operation at 30% of the nominal load. (a) Inverter 9 output voltage vo9 . (b) Inverter 3 output voltage vo3 . (c) Inverter 1 output voltage vo1 . (d) Total phase output voltage vo .

from the optimal switching combination. The selection of each switching combination could be implemented using a comparative iterative algorithm like as shown in Fig. 5. VII. E XPERIMENTAL R ESULTS In order to validate the proposed algorithm, experimental results with a 27-level CHB multilevel inverter were performed. The parameters used in the implementation are given in Table II. The predictive control is implemented using a dSPACE platform model CP1104. Using a light load equivalent to 30% of the nominal load, the output voltage of the 90-V inverter produces a high switching frequency when the output voltage required is maximum, as shown in Fig. 6. Moreover, the 30- and 10-V inverters produce high switching frequency at the same time. The sinusoidal output current, as well as the output voltage, is shown in Fig. 7. When the load is increased to 80% of the nominal load, as shown in Fig. 8, the output voltage of the 90- and 30-V



Fig. 7. Operation at 30% of the nominal load: Phase output voltage vo , line to line output voltage vo(L−L) , and output current io .

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Fig. 9. Operation at 80% of the nominal load: Phase output voltage vo , line to line output voltage vo(L−L) , and output current io .

Fig. 10. Dynamic response of the predictive current controller.

Fig. 8. Operation at 80% of the nominal load. (a) Inverter 9 output voltage vo9 . (b)Inverter 3 output voltage vo3 . (c) Inverter 1 output voltage vo1 . (d) Total phase output voltage vo .

inverter does not present a high switching frequency, which is concentrated in the 10-V inverter. The output current also presents a sinusoidal waveform in this operating condition, as shown in Fig. 9, as well as the output voltage. Fig. 10 shows the dynamic response of the output current when the reference changes periodically between 30% and 80% of the load current. To compare its dynamical performance, a linear PI control using a hybrid modulation [10] is implemented. The PI param-

Fig. 11. Dynamic response of the linear controller and hybrid modulation.

eters are in Table II. Fig. 11 shows the dynamic response of the output current when the reference changes between 30% and 80% of the load current.


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VIII. C ONCLUSION A predictive control algorithm for multilevel asymmetric H-bridge inverter is presented. The algorithm is based on the direct solution of the predictive model in order to reduce the processing time and a topology redundancy analysis to reduce the subset of possible switching combinations. The resulting algorithm can be implemented to obtain directly the switching combinations when there are no redundancies, for example, a 27-level asymmetric inverter. The proposed predictive control algorithm can be used with cascaded multilevel converters, which have a large number of possible switching combinations, allowing the use of a reduced sample time. Experimental results show a fast dynamic response compared to classical linear controllers. R EFERENCES [1] J. Rodriguez, S. Bernet, B. Wu, J. Pontt, and S. Kouro, “Multilevel voltage-source-converter topologies for industrial medium-voltage drives,” IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 2930–2945, Dec. 2007. [2] L. Xu and V. G. Agelidis, “VSC transmission system using flying capacitor multilevel converters and hybrid PWM control,” IEEE Trans. Power Del., vol. 22, no. 1, pp. 693–702, Jan. 2007. [3] M. A. Perez, J. R. Espinoza, J. Rodriguez, and P. Lezana, “Regenerative medium-voltage ac drive based on a multicell arrangement with reduced energy storage requirements,” IEEE Trans. Ind. Electron., vol. 52, no. 1, pp. 171–180, Feb. 2005. [4] P. Lezana, J. Rodriguez, and D. A. Oyarzun, “Cascaded multilevel inverter with regeneration capability and reduced number of switches,” IEEE Trans. Ind. Electron., vol. 55, no. 3, pp. 1059–1066, Mar. 2008. [5] C. R. Baier, J. I. Guzman, J. R. Espinoza, M. A. Perez, and J. R. Rodriguez, “Performance evaluation of a multicell topology implemented with single-phase nonregenerative cells under unbalanced supply voltages,” IEEE Trans. Ind. Electron., vol. 54, no. 6, pp. 2969–2978, Dec. 2007. [6] P. Lezana, C. A. Silva, J. Rodriguez, and M. A. Perez, “Zero-steady-stateerror input-current controller for regenerative multilevel converters based on single-phase cells,” IEEE Trans. Ind. Electron., vol. 54, no. 2, pp. 733– 740, Apr. 2007. [7] R. Gupta, A. Ghosh, and A. Joshi, “Switching characterization of cascaded multilevel-inverter-controlled systems,” IEEE Trans. Ind. Electron., vol. 55, no. 3, pp. 1047–1058, Mar. 2008. [8] C. Rech and J. R. Pinheiro, “Hybrid multilevel converters: Unified analysis and design considerations,” IEEE Trans. Ind. Electron., vol. 54, no. 2, pp. 1092–1104, Apr. 2007. [9] Z. Du, L. M. Tolbert, J. N. Chiasson, and B. Ozpineci, “Reduced switching-frequency active harmonic elimination for multilevel converters,” IEEE Trans. Ind. Electron., vol. 55, no. 4, pp. 1761–1770, Apr. 2008. [10] C. Rech and J. R. Pinheiro, “Impact of hybrid multilevel modulation strategies on input and output harmonic performances,” IEEE Trans. Power Electron., vol. 22, no. 3, pp. 967–977, May 2007. [11] Y. Liu and F. L. Luo, “Trinary hybrid 81-level multilevel inverter for motor drive with zero common-mode voltage,” IEEE Trans. Ind. Electron., vol. 55, no. 3, pp. 1014–1021, Mar. 2008. [12] J. Dixon, A. A. Breton, F. E. Rios, J. Rodriguez, J. Pontt, and M. A. Perez, “High-power machine drive, using non redundant 27-level inverters and active front end rectifiers,” IEEE Trans. Power Electron., vol. 22, no. 6, pp. 2527–2533, Nov. 2007. [13] S. Kouro, R. Bernal, H. Miranda, C. A. Silva, and J. Rodriguez, “Highperformance torque and flux control for multilevel inverter fed induction motors,” IEEE Trans. Power Electron., vol. 22, no. 6, pp. 2116–2123, Nov. 2007. [14] J. D. L. Morales, M. F. Escalante, and M. Mata-Jimenez, “Observer for DC voltages in a cascaded H-bridge multilevel STATCOM,” IET Elect. Power Appl., vol. 1, no. 6, pp. 879–889, Nov. 2007. [15] Q. Song, W. Liu, and Z. Yuan, “Multilevel optimal modulation and dynamic control strategies for STATCOMs using cascaded multilevel inverters,” IEEE Trans. Power Del., vol. 22, no. 3, pp. 1937–1946, Jul. 2007. [16] P. Athalye, D. Maksimovic, and R. Erickson, “Variable-frequency predictive digital current mode control,” IEEE Power Electron. Lett., vol. 2, no. 4, pp. 113–116, Dec. 2004.

[17] P. Merceorelli, N. Kubasiak, and S. Liu, “Model predictive control of an electromagnetic actuator fed by multilevel PWM inverter,” in Proc. IEEE Int. Symp. Ind. Electron., May 4–7, 2004, vol. 1, pp. 531–535. [18] S.-J. Jeong and S.-H. Song, “Improvement of predictive current control performance using online parameter estimation in phase controlled rectifier,” IEEE Trans. Power Electron., vol. 22, no. 5, pp. 1820–1825, Sep. 2007. [19] J. Rodriguez, J. Pontt, C. Silva, M. Salgado, S. Rees, U. Ammann, P. Lezana, R. Huerta, and P. Cortes, “Predictive control of three-phase inverter,” Electron. Lett., vol. 40, no. 9, pp. 561–563, Apr. 29, 2004. [20] J. Rodriguez, J. Pontt, C. A. Silva, P. Correa, P. Lezana, P. Cortes, and U. Ammann, “Predictive current control of a voltage source inverter,” IEEE Trans. Ind. Electron., vol. 54, no. 1, pp. 495–503, Feb. 2007. [21] S. A. Larrinaga, M. A. R. Vidal, E. Oyarbide, and J. R. T. Apraiz, “Predictive control strategy for DC/AC converters based on direct power control,” IEEE Trans. Ind. Electron., vol. 54, no. 3, pp. 1261–1271, Jun. 2007. [22] J. Rodriguez, J. Pontt, P. Correa, P. Lezana, and P. Cortes, “Predictive power control of an AC/DC/AC converter,” in Conf. Rec. 14th IEEE IAS Annu. Meeting, Oct. 2005, vol. 2, pp. 934–939. [23] J. Rodriguez, J. Pontt, C. Silva, P. Cortes, U. Amman, and S. Rees, “Predictive current control of a voltage source inverter,” in Proc. 35th Annu. IEEE PESC, Jun. 20–25, 2004, pp. 2192–2196. [24] P. Cortes, J. Rodriguez, D. E. Quevedo, and C. Silva, “Predictive current control strategy with imposed load current spectrum,” IEEE Trans. Power Electron., vol. 23, no. 2, pp. 612–618, Mar. 2008. [25] O. Lopez, J. Alvarez, J. Doval-Gandoy, and F. D. Freijedo, “Multilevel multiphase space vector PWM algorithm,” IEEE Trans. Ind. Electron., vol. 55, no. 5, pp. 1933–1942, May 2008. [26] R. Vargas, P. Cortes, U. Ammann, J. Rodriguez, and J. Pontt, “Predictive control of a three-phase neutral-point-clamped inverter,” IEEE Trans. Ind. Electron., vol. 54, no. 5, pp. 2697–2705, Oct. 2007. [27] G. S. Perantzakis, F. H. Xepapas, and S. N. Manias, “Efficient predictive current control technique for multilevel voltage source inverters,” in Proc. Eur. Conf. Power Electron. Appl., Sep. 11–14, 2005. CD-ROM. [28] A. Linder and R. Kennel, “Model predictive control for electrical drives,” in Proc. IEEE 36th PESC, 2005, pp. 1793–1799.

Marcelo A. Pérez (M’06) received the Engineer degree in electronic engineering and the M.Sc. and D.Sc. degrees in electrical engineering from the University of Concepción, Concepción, Chile, in 2000, 2003, and 2006, respectively. He is currently a Postdoctoral Researcher in the area of efficiency improvement in multilevel converters with the Department of Electronic Engineering, Universidad Técnica Federico Santa María, Valparaíso, Chile.

Patricio Cortés (S’05–M’08) received the Engineer and M.Sc. degrees in electronic engineering from the Universidad Técnica Federico Santa María (UTFSM), Valparaíso, Chile, in 2004, where he received the Ph.D. degree in 2008. In 2003, he was with the Department of Electronic Engineering, UTFSM, where he is currently a Research Associate. In 2007, he visited the Institute of Control and Industrial Electronics, Warsaw University of Technology, Warsaw, Poland. His main research interests are power electronics, adjustable speed drives, and predictive control.



José Rodríguez (S’83–M’81–SM’94) received the Engineer degree in electrical engineering from the Universidad Técnica Federico Santa María, Valparaíso, Chile, and the Dr. Ing. degree in electrical engineering from the University of Erlangen, Erlangen, Germany, in 1977 and 1985, respectively. Since 1977, he has been with the Universidad Técnica Federico Santa María, where he is currently a Professor in the Department of Electronic Engineering and the President of the university. During his sabbatical leave in 1996, he was responsible for the mining division of the Siemens Corporation in Chile. He has a large consulting experience in the mining industry, particularly in the application of large drives like cycloconverter-fed synchronous motors for semiautogenous grinding mills, high power conveyors, controlled drives for shovels, and power quality issues. His research interests are mainly in the areas of power electronics and electrical drives. In the last years, his main research interests are in multilevel inverters and new converter topologies. He has authored and coauthored more than 130 refereed journal and conference papers and contributed to one chapter in the Power Electronics Handbook (Academic Press, 2006).


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