Robust Design Of Differential Operational Amplifiers

Robust Design Of Differential Operational Amplifiers by Constrained Optimization

POMS -- NITIE 2014 Conference at NITIE, Mumbai Tapan Bagchi and Nasiba Mandal KIIT University; NMIMS University Copyright Tapan P Bagchi & Nasiba Mandal

What is “Robust Design”? Poor performance

Robust performance

Plasticity

Ambient (uncontrolled) Temperature Copyright Tapan P Bagchi & Nasiba Mandal

Robust Design of OpAmps • Present study involved re-designing an Op amp designed originally by AT&T engineers (Phadke 1986, 1989) • AT&T’s robust design had two goals:  The product must satisfy all design requirements  It must retain its exacting performance over a wide range of operating condition

Copyright Tapan P Bagchi & Nasiba Mandal

Taguchi’s IA×OA Method for Robust Design Prototypes

Loss

Lo Spec Target

Hi Spec

Inner Array Copyright Tapan P Bagchi & Nasiba Mandal

Outer Array

AT&T’s Design Targets: OUTPUT V0

• Use a Differential Operational Amplifier • Supply (a) unbiased V0 (= 0.0 volts) and (b) robust voltage V0 -- to a telecom device Copyright Tapan P Bagchi & Nasiba Mandal

The 5 Design Factors (Components)

OUTPUT V0


AT&T’s Design Methodology Two design goals: a) Average VO = 0.0 volts b) Exhibit minimum variance when under the influence of noise Design factors were 5 in number – RFM (R5), RPEM (R2), RNEM (R3) and current sources I1 (OCS) and I2 (CPCS) AT&T used the IA×OA method and the L36 orthogonal array Results of these experiments evaluated using a computer simulation model for circuit analysis Present study used constrained optimization Copyright Tapan P Bagchi & Nasiba Mandal

AT&T’s IAxOA Experimental Data Source: Phadke (1986) Row No. of Control OA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18

Mean Offset Voltage (10 -3 V) -1.28 -3.54 -11.47 14.12 39.68 -127.26 -35.67 22.76 73.04 -14.09 -46.93 125.94 70.57 -46.56 -26.17 -24.41 -88.82 47.24

Variance Offset Voltage (10-6V2) 321 1184 7301 389 1789 4850 623 615 7737 250 3468 4685 1335 5039 763 633 12211 703

Row No. of Control OA 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

Mean Offset Voltage (10 -3 V) -6.75 -3.77 -1.75 -6.23 -3.52 -2.1 37.36 23.43 -68.48 -6.75 -3.07 -2.22 -85.06 45.88 -25.71 69.34 -36.44 23.27


Variance Offset Voltage (10-6V2) 3810 1621 336 2573 1135 650 2035 523 3534 3613 649 175 4862 716 1089 6964 656 645

AT&T’s Robust OpAmp Solutions • Optimum 1: Only change RPEM from 15 kΩ to 7.5 kΩ. By the procedure in “Evaluation of Mean Squared Offset Voltage,” the value of η for this design was found to be 33.70 dB compared to 29.39 dB for the starting design. In terms of the rms offset voltage (robustness) this represents an improvement from 33.9 mV to 20.7 mV. • Optimum 2: Change RPEM to 7.5 kΩ. Also change both CPCS and OCS to 10 μA . The η for this design was computed to be 35.82 dB, and rms offset voltage was seen to be 16.2 mV.


INTRIGUES How these solutions would change if more exact analytical methods

were marshaled to manipulate the same experimental data?

Hypothesis 1: A superior robust design can be reached if constrained optimization is harnessed Hypothesis 2: A second order response model of sufficient “explanability” for both offset voltage (VO), and one for its variance (in the particular situation when the design space is constrained to guarantee VO = 0 volt) can be built to serve as the arena where the worthy “robust designs” would be present This study exclusively retained AT&T’s mean VO and variance of VO data (Slide 8) to facilitate a direct comparison. Copyright Tapan P Bagchi & Nasiba Mandal

Why the IAxOA Methodology is not enough? OA-based approach is a compromise—it often forces us to not fully exploit nonlinearities and some interactions. The differential Op Amp design problem is no exception: its response or its robustness is not an additive function of individual design factor effects. This negates the use of simple adjustment of factor settings to reach target performance and robustness. Copyright Tapan P Bagchi & Nasiba Mandal

Methodology that we Tested—using AT&T’s original experimental data For the Differential Op Amp, since a closed form design factors  response model is unavailable, we empirically developed a model for offset voltage VO, and another model for the noise-induced variance of VO. DF1 VAR_VO model

VO model with constraint VO = 0.0 Maximise Robustness on this constrained “design space”

Design Space

DF3 DF2


Approaching Robustness of the Op Amp • Step 1. Generate a response surface for mean offset voltage (VO) using the starting level data for each factor from Table 8.5 and response data from Table 8.6 of Phadke (1989). Constrain search to a subset of solutions (designs) that satisfy the target offset voltage. This is the “feasible” solution space in which every design would deliver mean VO = 0.0. • Step 2. Apply constrained optimization. To do this use the expression of the offset voltage response surface from Step 1 to constrain the solutions at VO = 0.0. Next, pick a reasonable trial value(s) for one or more design factor(s) leaving the others to assume values so as to keep the solution exactly on the VO = 0.0 surface. This is often possible for a single performance objective when there are two or more factors in the response surface equation. • Step 3. On the VO = 0.0 surface conduct a search using the response surface expression for Var(VO) constructed in Step 1, aimed at minimizing Var(VO). The solution with the smallest Var(VO) will be the final design— assuring VO = 0.0 and also maximum robustness. • Step 4. Compare the solution found in Step 3 with the “Optimum 1” and “Optimum 2” solutions shown in the introductory section above. This comparison would help test the acceptability of Hypotheses 1 and 2. Copyright Tapan P Bagchi & Nasiba Mandal

First a simple—an additive linear regression response model without involving interaction effects was built: VO = 0 + A A + B B +C C +D D +E E

(1)

Adjusted R2 was 0.79—respectable, D and E were significant. But over 20% of the variation in mean VO data was unexplained—possibly due to higher order terms that the linear model has not included. For this purpose, model (1) was enhanced to model (2).


VO = 0 + A A + B B +C C +D D +E E +A2 A2 +AB AB +AC

AC +AD AD +AE AE +B2 B2 +BC BC +BD BD +BE BE +C2 C2 +CD CD +CE CE +D2 D2 +DE DE +E2 E2

(2)

For (2), adjusted R2 = 0.83

This model, re-run without the intercept term, had an adjusted R2 = 0.90 and contained A, B, C, E, A2, AE, BC and BD as significant explanatory variables Copyright Tapan P Bagchi & Nasiba Mandal

Residuals of the Second Order VO Model without intercept (R2 = 0.90) Observed vs. Second Order Fitted Mean VO Model without Intercept 0.15 0.1

VO

0.05 0 -0.05

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35

-0.1

-0.15 Observed VO

Predicted Mean VO Volt


Residuals

Interaction of B (RPEM) and D (CPCS) Variance (VO)

30000 25000 20000

7.5

15000

15

10000

30

5000 0 D = 10

D = 20

D = 40

Graphic visualization of BD interaction caught by Model (2) Copyright Tapan P Bagchi & Nasiba Mandal

To implement Step 3, model (3) for variance of VO (Var_VO) was similarly built. Adjusted R2 for (3) was 0.73. Unexplained part of Var_VO would be traceable to higher order or omitted and interaction between control factor settings and noise. Robust design procedure would attempt to minimize this last part of Var_VO. Var_VO = 0 + A A + B B +C C +D D +E E +A2 A2 +AB AB +AC AC +AD AD +AE AE +B2 B2 +BC BC +BD BD +BE BE +C2 C2 +CD CD +CE CE +D2 D2

+DE DE +E2 E2

(3) Copyright Tapan P Bagchi & Nasiba Mandal

Imposition of Constrained optimization to keep (a) V0 = 0, and (b) max Robustness The VO = 0.0 constraint was imposed on model (2’) as follows: A A + B B + C C +E E + A2 A2 + AE AE + BC BC + BD BD = VO = 0.0

(4) In the second order Var_VO model (3), the only statistically significant contributor was the BD term in (3); coefficient BD being 0.004823253. This incidentally simplified searching design space to seek maximum robustness. BD = - (A A + B B + C C +E E + A2 A2 + AE AE + BC BC)/BD


(5)

If B was now set at some value, the factor that might then be manipulated to minimize Var_VO is D. The final robust design thus reached was

A RFM = 71000  B RPEM = 1760 

VAR_VO model

C RNEM = 2500  E OCS = 0.00002 Amp

VO model with constraint VO = 0.0 Maximise Robustness on this constrained “design space”

D CPCS = 1.5444E-08 Amp The predicted mean offset voltage VO for this design was 0.0 Volt, close to what circuit simulation delivered… Var_VO ~ 0 Volt2, very robust, and noticeably different from “Optimum 1” and “Optimum 2” given by AT&T

(Phadke 2086). This hinted that perhaps Offset Voltage VO and its variance rise together and fall together. Copyright Tapan P Bagchi & Nasiba Mandal

VO vs. Var VO V2

Variance of VO

0.014 0.012

Designs reached by Optimum 1 & Optimum 2

0.01 0.008 Designs approachable by Constrained Optimization

0.006 0.004 0.002 0

-0.15

-0.1

-0.05

0 VO Volts

0.05

0.1

0.15

“Rising together, falling together” is visible in a scatter plot of the data given in Column 2 and Column 3 of Phadke’s Table 8.6 (Slide 8). Figure above displays this. Copyright Tapan P Bagchi & Nasiba Mandal

Results delivered • Solution shown on Slide 19 is a very robust design while it meets the target requirement—offset voltage VO = 0.0 Volt • But VO’s variance 1178E-6 V2 could be further reduced by adjusting design factor B. This was done here by a simple search (What If analysis). • This produced a differential Op Amp that has A = 71,000 , B = 1760 , C = 2500 , D = 1.54E-08 Amp, E = 0.00002 Amp, VO = 0.0 and variance of VO ~ 0. Copyright Tapan P Bagchi & Nasiba Mandal

Conclusions • Study demonstrates high value of using RSM combined with constrained optimization to seek robustness when additivity does not hold • Method particularly useful when analytical closed form response models are unavailable • Simulation can produce the data required for statistically modelling the responses • D-optimal or centrepoint designed experiments are likely to lead to superior robust designs • Our on-going study is focused on CMOS devices. Copyright Tapan P Bagchi & Nasiba Mandal

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Phadke, M S (1989). Quality Engineering Using Robust Design, Pearson. Sedra, A S and K C Smith (2004). Microelectronic Circuits, 5th ed., Oxford University Press. Taguchi,G (1978). Off-line and On-Line Quality Control System, Int’l Conference on Quality Control, Tokyo, Japan. Taguchi, G (1986). Introduction to Quality Engineering, Asian Productivity Organization, ASI, Dearborn. Wilson, David and Blake Hannaford (2001). Robust Electronic Design: What’s That? 31st ASEE/IEEE Frontiers in Education Conference, October 10-13, Reno, NV. Copyright Tapan P Bagchi & Nasiba Mandal