Se2 THIN-FILM POLYCRYSTALLINE SOLAR CELLS

CHARACTERIZATION OF PHOTOCURRENT AND VOLTAGE LIMITATIONS OF Cu(In,Ga)Se2 THIN-FILM POLYCRYSTALLINE SOLAR CELLS

by Christopher P. Thompson

A thesis submitted to the Faculty of the University of Delaware in partial fulfillment of the requirements for the degree of Master of Science in Electrical & Computer Engineering

Summer 2008

2008 Christopher P. Thompson All Rights Reserved

CHARACTERIZATION OF PHOTOCURRENT AND VOLTAGE LIMITATIONS OF Cu(In,Ga)Se2 THIN-FILM POLYCRYSTALLINE SOLAR CELLS By Christopher P. Thompson

Approved:

__________________________________________________________ Steven S. Hegedus, PhD Professor in charge of thesis on behalf of the Advisory Committee

Approved:

__________________________________________________________ Christiana Honsberg, PhD Professor in charge of thesis on behalf of the Advisory Committee

Approved:

__________________________________________________________ Gonzalo R. Arce, PhD Chair of the Department of Electrical and Computer Engineering

Approved:

__________________________________________________________ Michael Chajes, PhD Dean of the College of Engineering

Approved:

__________________________________________________________ Debra Hess Norris, M.S. Vice Provost for Graduate and Professional Education

ACKNOWLEDGMENTS Without the support and help of many people, this work would not have been possible. Over the last two years, my family, friends, and fellow scientists have helped me along, instructed me, encouraged me, and most importantly, inspired me to work hard, and apply myself to my research. Mom and Dad, thank you for the years of Love and encouragement you’ve given to me. Thank you for your support, whether I’m off at school, or bicycling far away from home, you have always supported me in whatever I choose to do. My sister, Anne, thanks for your encouragement as well, good luck with your studies. Daniel and Chris, thank your for your friendship, and our many adventures; I hope there are many more. My advisor Steve, who hired me as an undergraduate researcher at the IEC; thank you for supporting my research, teaching me, letting me disappear for occasional wilderness expeditions, and all your hard work and patience. Most importantly, thank you for your friendship. To my many friends and fellow researchers at the institute, thank you for being my family away from home. Brian, I have enjoyed our many and varied conversations, you are a great friend. James, I could not have asked for a better office mate, our discussions in the office and over meals where always fun, and valuable. Greg, racing

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on your boat was an awesome experience, go Rhumbnutz! Much thanks to Bill, who helped guide my research, and asked me many important, penetrating questions. Thanks to Stuart, Shiro, and Rui for valuable discussions, questions, and answers to my questions. John and Brad, thank your for your help with my measurements and analysis. Thank you again to everyone at the Institute for the many good times, I’ll have fond memories of my time at the Institute.

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TABLE OF CONTENTS LIST OF TABLES........................................................................................................vii LIST OF FIGURES .....................................................................................................viii ABSTRACT .................................................................................................................. xi Introduction .................................................................................................................. 13 Overview .......................................................................................................... 14 2Thin Film CIGS Solar Cells ....................................................................................... 16 2.1 Device Structure ...................................................................................... 16 2.1.1 Substrate and Back Contact......................................................... 17 2.1.2 Cu(In,Ga)Se2 Absorber................................................................ 18 2.1.3 CdS Buffer Layer......................................................................... 20 2.1.4 Window Layers and Front Contact.............................................. 21 2.2 Device Preparation .................................................................................. 22 2.2.1 Layout 23 2.3 Device Operation..................................................................................... 23 2.3.1 Formation of the Junction............................................................ 24 2.3.2 Current-Voltage Characteristics .................................................. 26 2.3.3 Light Collection........................................................................... 27 2.3.4 Device Losses .............................................................................. 29 Optical Losses.............................................................................. 30 Recombination............................................................................. 31 Series Resistance and Shunt Conductance .................................. 32 3Device Measurments and Analysis............................................................................. 34 3.1 Current-Voltage ....................................................................................... 34 3.1.1 Diode Analysis ............................................................................ 37 3.2 Quantum Efficiency................................................................................. 38 3.2.1 Quantum Efficiency Setup........................................................... 39 3.2.2 QE Analysis.................................................................................... 42 3.3 Capacitance.............................................................................................. 43 3.3.1 Capacitance Setup .......................................................................... 43 3.3.2 C-V measurements ......................................................................... 45 3.3.3 DLCP measurements ...................................................................... 46 3.3.4 DLCP Data Analysis ...................................................................... 47 3.4 Open Circuit Voltage-Temperature ......................................................... 47

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3.4.1 Experimental Setup ..................................................................... 47 3.4.2 Measurement Procedure .............................................................. 51 Quantum Efficiency Modeling ..................................................................................... 52 4.1 Light Generated Current .......................................................................... 52 4.2 Determination of Optical Constants ........................................................ 56 4.2.1 Optical Limitations...................................................................... 59 4.3 JL(V) Losses............................................................................................. 60 4.4 Depletion Width ...................................................................................... 64 4.5 Device Analysis ....................................................................................... 65 4.5.1 Baseline Cu(In,Ga)Se2 Devices................................................... 67 4.5.1 Baseline Devices Deposited With Low Substrate Temperature................................................................................. 68 4.5.3 Wide Bandgap Cu(In,Ga)Se2 Devices......................................... 72 4.5.3 CuInS2 75 Open Circuit voltage vs. Temperature.......................................................................... 77 5.1 Devices .................................................................................................... 79 5.2 Device Analysis and Discussion.............................................................. 80 5.2.1 High and Low Gallium Devices .................................................. 80 5.2.2 CuInS2 Devices............................................................................ 81 5.2.3 Sodium Free and Deficient Devices ............................................ 82 5.2.4 Low Deposition Temperature Films............................................ 84 5.2.4 Low Measurement Temperature-Freezout Regime ..................... 85 Conclusions .................................................................................................................. 87 6.1 Quantum Efficiency Modeling ................................................................ 87 Baseline Results........................................................................... 88 Devices Deposited with a low substrate temperature .................. 88 Wide Bandgap Results................................................................. 88 CuInS2 Results............................................................................. 88 6.1.1 QE Overview and Conclusions ................................................... 89 6.1 Open Circuit Voltage vs. Temperature.................................................... 90 High and Low Gallium Devices .................................................. 91 Devices Deposited with a low substrate temperature .................. 91 CuInS2 Devices............................................................................ 91 Sodium Free and Deficient Devices ............................................ 92 6.2.1 VOC(T) Overview and Conclusions ............................................. 92

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LIST OF TABLES Table 1: Device Characteristics .................................................................................... 66 Table 5.1 Device performance under simulated AM1.5 at 25°C ................................. 80 Table 5.2 VOC at ~300K, absorber bandgap, activation energies, and VOCSAT ............. 86 Table 6.1 Theoretical Increases in Wide Bandgap Cu(In,Ga)Se2 device efficiency ................................................................................................. 90

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LIST OF FIGURES Figure 2.1: A typical Cu(In,Ga)Se2 solar cell structure ................................................ 17 Figure 2.2: Multisource Elemental Co-Evaporation System........................................ 19 Figure 2.3: EG vs Ga/III ................................................................................................ 20 Figure 2.4: Layout of Front Contacts and Cell Divisions............................................. 23 Figure 2.5: (a) CdS and Cu(In,Ga)Se2 Separated, not in thermal equilibrium. (b)CdS and Cu(In,Ga)Se2 brought into contact; majority carriers diffuse across the junction. (c) Carriers crossing the junction leave donor/acceptor ions uncompensated near the junction, setting up an electrical barrier to further diffusion [4]. .......................... 26 2.3.2Current-Voltage Characteristics ........................................................................... 26 Figure 2.6: Absorption of Photons. White circles are holes, black circles are electrons.................................................................................................. 27 Figure 2.7: A diagram of our three regions, the CdS field region, Cu(In,Ga)Se2 field region, and the Cu(In,Ga)Se2 field neutral region.......................... 29 Figure 2.8: Optical Accounting. A) Grid Shading, B) Front Surface Reflection, C) Absorption within ITO, ZnO, & CdS, D) Absorption within Cu(In,Ga)Se2, and E) Sub-EG photons. .................................................. 31 Figure 3.1 A schematic diagram of a four point probe measurement setup. The source measure unit (SMU) contains a voltage source, and a ammeter. There are series resistance elements within the meter and the wires connecting the device to the meter................................... 35 Figure 3.2 The J-V test bed for front contact solar cells at the IEC. Shown here is a Cu(In,Ga)Se2 solar cell, contacted with 4 point probes, and a RTD temperature sensor. The square black hole in the background is the simulator light aperture. ............................................ 36

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Figure 3.3 The lumped circuit model in schematic form, RS is the series resistance term, RSh is the shunt resistance term, the diode is the diode formed by the p-n heterojunction, and the current source is the light generated current, in opposition to the diode current............... 37 Figure 3.4 Optical Stage of the IEC QE system. A) Light source, B) Filter wheel, C) Oriel monochromater, D) Light chopper, E) Collimating and focusing lenses............................................................. 39 Figure 3.5 A high level diagram of the QE electrical stage.......................................... 41 Figure 3.6 The capacitance setup. From left to right, top to bottom: DMM, Bipolar power supply, voltage source, LCR meter, external bias adapter. ................................................................................................... 44 Figure 3.7 A schematic diagram of the C-V system..................................................... 44 Figure 3.8 Shifting AC small signal during a DLCP measurement.............................. 46 Figure 3.9 The cryostat, ELH lamp, temperature controller, and filters....................... 48 Figure 3.10 A schematic diagram of the cryostat and sample chamber. ...................... 49 Figure 3.11 A detailed diagram of the thermal contact between the sample and sample mounting plate............................................................................ 50 Figure 4.1:

Absorption Coefficient for several compositions of Cu(In,Ga)Se2 thin films from ellipsometry [Paulson1]. ............................................... 57

Figure 4.4:

(1-ACdS), (1-AZnO/ITO), and (1-RF)........................................................... 59

Figure 4.5:

Available QE and Measured QE of Typical Baseline and WideBandgap Cu(In,Ga)Se2 Devices. ............................................................ 60

Figure 4.6: J′Light, and J′Dark-JL0 for Baseline and Wide-Bandgap devices .................... 62 Figure 4.7: A Typical η(V) function............................................................................. 63 Figure 4.8:

Dissection of a Baseline Device, L=1500nm, and W=310nm, L is the only fitting parameter ....................................................................... 67

Figure 4.9:

Baseline JV corrected for shunt conductance, and dark shifted by JL0 ........................................................................................................... 69

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Figure 4.10: Low Temperature JV corrected for shunt conductance, and dark shifted by JL0 ........................................................................................... 70 Figure 4.11: QEF and QEM for baseline and low temperature Cu(In,Ga)Se2 devices. ................................................................................................... 71 Figure 4.12: Internal QEM of baseline and low temperature devices.......................... 72 Figure 4.13: JV curves of high and low efficiency wide-bandgap devices................. 73 Figure 4.14: η(V) for high and low efficiency wide-bandgap devices........................ 74 Figure 4.15 QEM and QEF for high and low efficiency wide-bandgap devices......... 75 Figure 4.16: QEM and QEF of a CuInS2 device, and QEF of a Cu(In,Ga)Se2 EG=1.5eV device with W=200nm, L=650nm ........................................ 76 Figure 5.1 Cu(In,Ga)Se2 wide bandgap and baseline VOC(T) curves, measured at 10%, 20%, and 100% illumination......................................................... 81 Figure 5.2 CuInS2 wide bandgap device, measured at 10%, 20%, and 100% illumination. ........................................................................................... 82 Figure 5.3 Low Na Cu(In,Ga)Se2 device with EG=1.18eV. Notice the low temperature drop in VOC ......................................................................... 83 Figure 5.4 Cu(In,Ga)Se2, TSS=400°C, EG=1.18 eV ...................................................... 85

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ABSTRACT Thin film polycrystalline CdS/Cu(In,Ga)(Se,S)2 solar cells have great potential as a candidate for high efficiency, high throughput, low cost production. Cu(In,Ga)Se2 devices have laboratory efficiencies approaching 20% and module efficiencies around 11%. However, most progress in device optimization has been the result of empirical studies; little is known about the device defect structure, and even less is known about the control of defects within the Cu(In,Ga)(Se,S)2 absorber. Despite years of study, the complex nature of the Cu(In,Ga)(Se,S)2 system has made progress towards a fundamental understanding of device behavior, and limiting defects a slow affair. The goal of this work is to shed further light on the nature of the limitations on photocurrent and voltage. The main topics covered in this thesis are: (1) fitting quantum efficiency curves calculated from an analytical model to measured quantum efficiency curves, and (2) Open circuit voltage temperature measurements. For the first section, series of devices with varying absorber layers will be analyzed, using the minority carrier diffusion length as the only fitting parameter. All other variables within the model will be supplied from direct and indirect measurements. We show that by using quantum efficiency, capacitance-voltage, and current-voltage measurements, we can generate excellent fits using only diffusion length as a fitting parameter. It is found that for Cu(In,Ga)Se2 devices with EG≈1.2eV, L=1000-1500nm.; for wide bandgap devices, with EG≈1.4eV, L=10-400nm; for

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devices with EG≈1.2eV, deposited with a low substrate temperature, L=650nm. Wide bandgap devices long wavelength collection is limited by minority carrier diffusion. For the second section, VOC(T) measurements are taken on devices with a wide range of absorbers, including some previously un-measured devices; absorbers grown with a Na deficiency. Analysis will focus on the activation energy of the dominant recombination mechanism, as well as low temperature saturation of VOC. Both of these parameters shed light on the limiting properties of devices. Cu(In,Ga)Se2 with bandgap ranging from 1.2eV-1.4eV are limited by Shockley Read Hall recombination, and have a ratio of saturation voltage to bandgap of 80%. Lowering the electrical quality of the absorber by depositing the Cu(In,Ga)Se2 layer at lower substrate temperature decreases the ratio of saturation voltage to bandgap to 64%, as a result of increased bandtail defect states. CuInS2 devices and Cu(In,Ga)Se2 devices with low or no Na are limited by hetero-interface recombination, and have a saturation voltage to bandgap ratio of ~60%.

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Chapter 1 INTRODUCTION It is well known that the Cu(In,Ga)(Se,S)2 thin-film solar cell is well suited for photovoltaic applications, and large scale production [1] . Cu(In,Ga)Se2 solar cells could play a important part in the production of energy to power our growing world. However, despite years of research, the Cu(In,Ga)Se2 material system and resulting device behavior are not well understood. The function and origin of its electrical defects are not well known, and poorly controlled. It is important to develop a greater understanding of the inner workings and mechanics of Cu(In,Ga)(Se,S)2 devices. An understanding of the defect physics and nature of the device operation is needed in order to fabricate and design devices with higher efficiencies. It is difficult to extract basic properties of the devices, such as defect energy levels and concentrations, minority and majority carrier profiles, and carrier mobility. Many of these parameters must be indirectly inferred. Without a strong understanding of the underlying mechanisms for efficiency losses, it will be difficult to translate laboratory efficiencies [2] to production lines. This work will utilize simple analytical models to analyze Cu(In,Ga)(Se,S)2 solar cell devices. Current collection, and open circuit voltage will be the focus of the paper. These analytical models will be developed, and then applied to a wide variety of Cu(In,Ga)(Se,S)2 absorbers, with varying compositions, and processing.

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Current and voltage loss mechanisms in various alloys of Cu(In,Ga)Se2 will be examined. More specifically, quantum efficiency (QE) of high and low bandgap Cu(In,Ga)Se2 will be analyzed. Using a model based on the continuity equation, and diffusion and drift current in a p-n diode, we will derive a solution for the minority carrier distribution for our diode; a solution for monochromatic photocurrent follows. Using this model, we can fit measured QE curves, using basic parameters, such as minority carrier diffusion length (L) as fitting parameters. This method will be applied to a variety of Cu(In,Ga)(Se,S)2 devices. To study open circuit voltage (VOC), VOC vs temperature {VOC(T)} measurements will be used. These measurements will shed light on the electrical properties of the materials, with an elegant, analytical solution, using fundamental semiconductor physics, and a lumped circuit model with some modifications. These basic measurements are powerful analytical tools to understand the factors limiting device efficiency. They can be used to study the basic device physics, as well as a powerful diagnostic tool; coupled with variations in composition, and processing conditions. Overview The goals of this paper are the following: 1. Characterize QE of members of the Cu(In,Ga)Se2 family of thin film poly-crystalline solar cells, using a straightforward analytical model. 2. Specifically, analyze and explain the causes of decreased performance in wide-bandgap Cu(In,Ga)Se2 devices, especially poor collection of long wavelength light.

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3. Analyze the VOC(T) characteristics of Cu(In,Ga)Se2 thin film solar cells, especially sodium free/low sodium films.

In chapter two we will discuss the device structure, examine each element of the device, and discuss the electrical operation of thin film Cu(In,Ga)(Se,S)2 solar cells. In chapter three, each characterization and testing technique will be explained. The chapter will contain an overview of the testing equipment and setup, as well as the analysis of the resulting data. Chapter four examines QE measurements of several Cu(In,Ga)(Se,S)2 devices, and then determines the electrical properties of the absorber using the QE fitting procedures outlined in the chapter. Chapter five examines the VOC(T) measurements of another series of Cu(In,Ga)(Se,S)2 devices, and the analysis of the results. Chapter six summarizes the findings of this work, draws conclusions, and provide suggestions for further research.

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Chapter 2 THIN FILM CIGS SOLAR CELLS This chapter will begin with the substrate, and finish with a working photovoltaic device. The following topics will be covered: 1)

An overview of the basic structure and layers.

2)

A closer examination of each layer and deposition.

3)

Preparation of the solar cell.

4)

The operation of the solar cell, and its basic loss mechanisms.

These basic loss mechanisms are the ultimate interest of this paper, and will be further explored in the subsequent chapters. 2.1

Device Structure The finished device is a stack of thin film semiconductors, oxides, metal

layers, and a thick glass substrate. The baseline device structure at the Institute of Energy Conversion (IEC) is as follows: A soda-lime glass substrate, a molybdenum metal back contact, the p-type Cu(In,Ga)Se2 absorber layer, a n-type window layer, and then nickel/aluminum front contact grids. The window layer is composed of a CdS n-type thin-film, a zinc-oxide buffer layer, and a indium-tin-oxide transparent conducting oxide (TCO). The core of the device is the Cu(In,Ga)Se2 absorber layer, and the CdS buffer layer. These two layers form our p-n hetero-junction solar cell. All the other layers are in place to facilitate the completion of the electrical circuit

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(front and back contacts, TCO), and are designed to reduce their absorption/reflection of useful light, and minimize their electrical resistance.

Ni/Al Front Contacts

ITO Window Layer: 200 nm ZnO Buffer Layer: 50 nm CdS Buffer Layer: 50 nm

Cu(InGa)(SeS)2 Absorber: 1-2 µm

Mo Back Contact: 1µm Soda Lime Glass Substrate

Figure 2.1: A typical Cu(In,Ga)Se2 solar cell structure

2.1.1

Substrate and Back Contact There are three important influences of a substrate on a Cu(In,Ga)Se2 film:

1) thermal expansion, 2) chemical effects, and 3) surface influence on nucleation. Soda lime (SL) glass has a thermal expansion coefficient that closely matches that of Cu(In,Ga)Se2. The most important effect SL glass has on Cu(In,Ga)Se2 films is the sodium effect. The diffusion of sodium from the SL glass, through the Mo back contact, and into the Cu(In,Ga)Se2 film has large positive effects on device performance[1,3]. There are many other choices for substrates, such as stainless steel, flexible plastic webs, and borosilicate glass. However, none of these provide a supply of Na to the Cu(In,Ga)Se2 film [1]. SL glass is cheap, readily available, and devices deposited on SL glass have achieved record performance efficiencies [2].

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The Mo back contact is deposited by direct current (dc) sputtering. Typically at IEC the Mo is 1 µm thick, and has a sheet resistance of 0.1- 0.2 Ω/. Sodium from the SL glass substrate must diffuse through the Mo, so it is important to have a uniformly thick back contact [1]. 2.1.2

Cu(In,Ga)Se2 Absorber Cu(In,Ga)Se2 is a I-III-VI semiconductor alloy with a chalcopyrite lattice

structure. The two endpoints of the alloy system are CuInSe2, EG=1.02eV; and CuGaSe2, EG=1.68eV. CuInSe2 and CuGaSe2 can be mixed in any proportion to form Cu(In,Ga)Se2. Cu(In,Ga)Se2 films are very tolerant of variations of composition. Most notably, the Cu/(In+Ga) ratio can vary from 0.7 to close to 1.0; films with such Cu/III ratios can have very high efficiencies across the range. CuInSe2 films can be made either p-type or n-type. Films annealed or deposited in a Se rich environment will become p-type. Cu(In,Ga)Se2 films used for high quality photovoltaic devices are grown in excess Se; and are p-type semiconductors The Cu(In,Ga)Se2 absorber is deposited using thermal evaporation from elemental sources (Fig 2.2). The substrate is suspended directly overhead of the Cu, In, Ga, and Se sources within a vacuum bell chamber. Metal vapors rise from the sources in a straight path, and stick to the substrate, which is typically heated to around 550 deg. C [1].

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Bell Jar Heater Heaterand and Substrate Substrate

Evaporation Heater and Sources Substrate

Vacuum

Figure 2.2: Multisource Elemental Co-Evaporation System

By adjusting the ratio of Ga/In+Ga in the deposition vapor, or Ga/Group III elements (Ga/III), we can adjust the bandgap of the material, EG, from 1.02eV to 1.68eV (Fig 2.3).

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E vs Ga/III G

1.8 1.7

EG(eV)

1.6 1.5 1.4 1.3 1.2 1.1 1

0

0.2

0.4

0.6

0.8

1

Ga/III

Figure 2.3: EG vs Ga/III

2.1.3

CdS Buffer Layer The CdS buffer layer is typically formed using a chemical bath deposition

(CBD), which can be thought of as a liquid phase chemical vapor deposition, or solution growth. The SL/Mo/Cu(In,Ga)Se2 stack is dipped into a bath containing an alkaline aqueous solution containing: 1) a cadmium salt, 2) a complexing agent, NH3, and 3) a sulfur precursor, SC(NH2)2. The film is left immersed for a few minutes at a temperature of 60 to 80 deg. Celsius. The deposition system is simple, the solution heated by a hot plate, with a magnetic stirrer. Often the beaker containing the solution is set in a water bath for even heating of the solution. The ammonia in the bath acts as an etchant, cleaning the surface of the Cu(In,Ga)Se2 film, allowing for an epitaxial growth of the CdS on the Cu(In,Ga)Se2 surface [1]. After deposition, the CdS film is dried at a low temperature in an oven, in atmosphere.

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Other deposition methods can be used, such as: vacuum evaporation, atomic layer chemical vapor deposition, chemical vapor deposition, and metal organic chemical vapor deposition; there are certain drawbacks to some of the alternative methods, CBD is typically used [1]. The CdS layer is typically around 50 nm thick. And light absorbed within the CdS is a loss to the performance of the device. Keeping the CdS layer as thin as possible is important to increase photocurrent. However, if the CdS layer is made too thin, the Cu(In,Ga)Se2 layer can directly contact the ZnO layer, forming areas of high recombination, causing Voc to drop. 2.1.4

Window Layers and Front Contact

A ZnO buffer layer is sputtered onto the CdS. The ZnO buffer layer is a undoped high resistance (HR) layer, put in place to ensure good diode quality. A combination of thin CdS and locally non-uniform electrical quality in the Cu(In,Ga)Se2 film can contribute to parallel diodes with higher saturation currents. A relatively thin HR layer reduces the effect of “weak diodes”. A transparent conducting oxide (TCO), is sputtered on top of the HR layer. This film is designed to have high lateral conductivity, and minimize absorption of spectrally useful light. ITO is used as the TCO at the IEC, but doped ZnO is more commonly used elsewhere. To make a front electrical contact, metal grids are deposited on the TCO film. The grid is optimized to add as little series resistance to the cell as possible, and minimize shading. First a thin layer of Ni is laid down through a mask to prevent a highly resistive oxide layer from forming, and then several microns of Al top off the

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grid. The metal contacts are deposited by evaporating the metal through a mask that defines the grid layout. (Fig 2.4) 2.2 Device Preparation Following the deposition of the front contact and grids, scribing marks are laid out on the surface of the device. Using the marks, each cell is delineated by removing all the material down to the Mo back contact, using a diamond carbide scribe. The one inch square glass substrate has six front contacts deposited on it. Each cell on a substrate, or piece, has a common Mo back contact which is exposed by scribing away the Cu(In,Ga)Se2/CdS/contact. Indium solder is applied to exposed Mo, providing a large area low resistance contact to the Mo. The scribing separates each individual cell for electrical characterization.

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2.2.1

Layout

Figure 2.4: Layout of Front Contacts and Cell Divisions.

Figure 2.4 illustrates a typical IEC Cu(In,Ga)(Se,S)2 device, and contacting scheme. The indium back contact can be seen on the far right. Each small square connecting the network of grids is the front contact point for the Kelvin probes. The scribe lines, and scribe line marks can be seen separating each device. 2.3 Device Operation The finished solar cell is a p-n heterojunction diode. This diode is the result of intimate contact between our Cu(In,Ga)Se2 absorber layer, and the CdS buffer layer. The operation of the device can be understood by applying the basic principles of semiconductor physics, and building upon them. The result will be several powerful tools to examine our devices; a modified ideal diode equation and an

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analytical equation for monochromatic photocurrent. With these simple tools, powerful and worthwhile analysis can be performed on opto-electronic measurements. 2.3.1

Formation of the Junction Imagine the CdS and Cu(In,Ga)Se2 layers separated, ready to be pressed

together. As they are pressed together, the system is not in a state of thermal equilibrium. A system of electrons is characterized by a constant Fermi level at thermal equilibrium; the Fermi level is the average energy of charge within a semiconductor. Considering a film of Cu(In,Ga)Se2 or CdS, the Fermi levels would differ in respect to the vacuum level in each film (they are p and n type materials). Putting these two films in contact, and the Fermi levels would be out of alignment. The system would approach equilibrium as electrons move from the high Fermi level region (the CdS buffer layer) to the low Fermi level region (the Cu(In,Ga)Se2 absorber). As the charges flow across the junction, they begin to form an electrical barrier impeding the flow of more charges. The drop in voltage across the junction increases to the point that the Fermi levels are equalized [4].

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E0

E0 q? n

qF sn

q? p

Ec Ec

Efn qF sp

Efp Ev Ev CdS:n-type

CIGS:p-type

(a)

n

Ec Ec

Efn

Efp Ev Ev

p

(b)

e

Ec

Ev

(c)

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Figure 2.5: (a) CdS and Cu(In,Ga)Se2 Separated, not in thermal equilibrium. (b)CdS and Cu(In,Ga)Se2 brought into contact; majority carriers diffuse across the junction. (c) Carriers crossing the junction leave donor/acceptor ions uncompensated near the junction, setting up an electrical barrier to further diffusion [4].

2.3.2

Current-Voltage Characteristics

Now that the electrostatic basis for our p-n diode is established, the operation of the device can be examined. If the diffusion length of the minority carriers, L, where L = Dτ

(2.1)

is much less than the width of the semiconductor (tCIGS), then the long-base diode approximation is appropriate. The diffusivity is given by D, and the lifetime of minority carriers by τ. With a 2µm absorber, it is safe to assume L 1 , yields equation 2.2b; representing injected current only. The ideal diode equation, 2.2b, is the basis of one of our main tools. The specific form of J0 is determined by the dominant recombination mechanism; each has a different thickness, temperature, and barrier dependence.

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2.3.3

Light Collection In addition to injected current, there is the light generated current, JL.

Photon’s that reach the absorber layer of our solar cell can be absorbed. An absorbed photon imparts energy, Eph E ph = hν

(2.3)

Where h is Planck’s constant and ν is the frequency of the photon. When a photon is absorbed by our collector, there are three possible outcomes: 1) Eph < EG, 2) Eph = EG, 3) Eph > EG.

Thermal Energy

Eph > EG EG Eph = EG

Eph > EG

Figure 2.6: Absorption of Photons. White circles are holes, black circles are electrons.

When Eph < EG the photon either: passes through the material, unabsorbed; or is converted to heat through a phonon interaction. If Eph = EG, then the photon will create a electron-hole pair within the absorber. In the case of Cu(In,Ga)Se2 promoting a minority hole carrier to the valence band, in the case of CdS promoting a minority electron carrier to the conduction band.

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In the last case, Eph>EG then the promoted carrier is promoted to an energy band above/below the conduction/valence band. The carrier then releases thermal energy = Eph-EG; and returns to the energy minimum/maximum, in a process called thermalization. Whether Eph=EG or > EG, only one electron-hole pair is generated; there is no benefit of excess energy. At this point, the collection of minority carriers must be discussed. A minority carrier can only contribute to JL if it is collected, and becomes a majority carrier by crossing the junction. Dividing the device into three regions: 1) the field free bulk of the Cu(In,Ga)Se2 absorber, 2) the high field, or depletion, region of the Cu(In,Ga)Se2 absorber WCIGS, and 3) the depletion region of the CdS buffer layer. Due to the defective nature of the CdS, minority carriers recombine instantly. Any absorption within the CdS is a complete loss. For a first order approximation, it can be assumed that any electrons generated in the field region of the Cu(In,Ga)Se2 are collected. It will also be assumed that any carriers that diffuse from within the field neutral region to the field region will be collected. To first order, any carriers absorbed within xj + L in the Cu(In,Ga)Se2 will be collected. A careful examination of JL in chapter three will provide us with an analytical model for collection.

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Xj

Xj+W

Xj+tCIGS Field Neutral Region Diffusion Length

CdS Window Layer

CIGS

Field Region, Space Charge Region (SCR), Depletion Width (W)

Figure 2.7: A diagram of our three regions, the CdS field region, Cu(In,Ga)Se2 field region, and the Cu(In,Ga)Se2 field neutral region.

Including the light generated current to the ideal diode equation yields an expression that will give a complete expression for the solar cells current: J = J F − J L = J oe

2.3.4

qV kT

− JL

(2.4)

Device Losses In order to create the most efficient device possible, it is important to

identify, quantify, and eliminate if possible, loss mechanisms. The purpose of device characterization is to identify and quantify device loss mechanisms, and hopefully point to solutions to minimize or eliminate losses. Losses can be lumped into two categories, optical losses, and electrical losses. Optical losses include reflective losses, shading, non-productive absorption, and incomplete absorption. Electrical losses result from the recombination of minority

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carriers, and losses due to series resistance. The optical losses will be examined, and accounted for, leaving the electrical losses to be accounted for. Series resistance will be accounted for, leaving us to examine losses due to recombination. Optical Losses Photons which do not reach the optical absorber cannot be collected for conversion, and are a total loss. Optical losses can be separated into two areas; Losses starting from the front contacts extending to the CdS/Cu(In,Ga)Se2 heterojunction interface, and losses within the Cu(In,Ga)Se2, extending to the back contact. Losses up to the junction are from shading, front reflection, and non-productive absorption. Any optical losses within the Cu(In,Ga)Se2 would involve incomplete absorption. Moving through the device structure will enumerate each of our losses, and account for them; they are: 1) shading from the front contact grids, 2) absorption within the ITO, ZnO, and CdS, and 3) front surface reflection. Within the Cu(In,Ga)Se2 light that has gotten through the grids, window, and buffer layer is either absorbed, or passes through the Cu(In,Ga)Se2. Photons with Eph