Second Harmonic Generation for Noninvasive ... - IEEE Xplore

IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 20, NO. 2, MAY 2007

107

Second Harmonic Generation for Noninvasive Metrology of Silicon-on-Insulator Wafers Michael L. Alles, Member, IEEE, Robert Pasternak, Xiong Lu, Norman H. Tolk, Ronald D. Schrimpf, Fellow, IEEE, Daniel M. Fleetwood, Fellow, IEEE, Robert P. Dolan, and Robert W. Standley

Abstract—We report experimental results from noninvasive second harmonic generation (SHG) measurements applied to characterize separation by implantation of oxygen (SIMOX) and bonded thin film silicon-on-insulator (SOI) wafers. Results demonstrate that the SHG response of the SOI structure can provide an indication of the quality of the buried oxide interfaces, including roughness, charge states, and detection of the presence of metallic contamination. The potential application of SHG as a noncontact metrology tool for process control is described. Index Terms—Contamination, interface, metrology, nondestructive, roughness.

I. INTRODUCTION VOLUTION of semiconductor material systems and device topologies calls for development of new noninvasive metrology methods to characterize and monitor quality and structural parameters. The use of nondestructive, noninvasive optical second harmonic generation (SHG) can support a class of these needs. The SHG process is very sensitive to characteristics of heterointerfaces, making the technique well suited to layered material structures such as gate-dielectric to semiconductor interfaces and silicon-on-insulator (SOI) structures. SHG has been previously investigated to detect defects in the SOI structure and to measure the bias dependence of the SHG signal in SOI wafers [1], and rotational dependency has been structures (none in correlated to interface roughness in Si/ SOI buried oxides) [2]. In this paper, we focus on the specific application of monitoring the subsurface quality parameters of SOI wafers in a noncontact, noninvasive manner, not requiring an applied bias. The work presented is not intended to be a comprehensive scientific study with qualitative models, but is intended to further evaluate and demonstrate the potential of SHG for application as a nondestructive SOI wafer metrology tool. The buried oxide (BOX) layer and associated interfaces with the silicon device layer and the substrate in SOI structures are

E

Manuscript received December 25, 2006; revised March 7, 2007. M. L. Alles, R. Pasternak, X. Lu, R. D. Schrimpf, and D. M. Fleetwood are with Vanderbilt University, Nashville, TN 37235 USA (e-mail: mike.alles@ vanderbilt.edu). N. H. Tolk is with the Department of Physics and Astronomy, Vanderbilt University, Nashville, TN 37235 USA and also with Fisk University, Nashville, TN 37208-3051 USA. R. P. Dolan is with Ibis Technology Corporation, Danvers, MA 01923 USA R. W. Standley is with MEMC Electronic Materials, Inc., St. Peters, MO 63376 USA Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TSM.2007.896642

Fig. 1. Energy level diagram for the SHG process.

currently characterized using invasive physical measurements such as atomic force microscopy (AFM) measurements after removal of the top silicon layer by selective chemical etching, or by electrical characterization of point contact transistors, pseudo-MOSFETs, or BOX capacitor structures. Subsurface contamination in SOI wafers is measured by time-consuming destructive analysis such as secondary ion mass spectrometry (SIMS) or inductively coupled plasma mass spectrometry (ICPMS) on a sampling basis. SHG has been demonstrated as a noninvasive, real-time method to probe semiconductor–insulator interfaces, and is well suited to characterization of properties of SOI wafers [1]–[5]. This work demonstrates the potential to apply SHG for nondestructive, noninvasive characterization of SOI wafers. II. SHG METHOD The SHG process can be visualized by considering the interaction of photons, as shown in Fig. 1. It shows that two photons are annihilated and a of the same frequency and energy photon of and energy is simultaneously created in a single quantum-mechanical process. For centrosymmetric materials such as crystalline Si, second-order nonlinear susceptibility vanishes. However, at heterointerfaces, or in bulk regions pervaded by electrostatic fields, the symmetry is broken and optical nonlinear processes are allowed. Time-dependent electric field-induced second harmonic (TD-EFISH) generation is a very effective and sensitive tool for probing interface dynamics in semiconductor heterostructures. The presence of a DC electric field also breaks the inversion symmetry and can enhance SHG signals [1], [3]. The time-dependent SHG signal is a direct measure of the time dependent electric field created by the charge separation at the Si-oxide interface, which can be described in general by

where is the intensity of the incident laser light, is the varying time-dependent electric field at the interface, and

0894-6507/$25.00 © 2007 IEEE

108


Fig. 2. Conceptual schematic of the SHG measurement configuration. Note that this assumes that the surface (native) oxide is removed using selective etch.

and are the interfacial second- and bulk third-order susceptibilities, respectively. EFISH measurements provide information about electronic structure, carrier dynamics, local fields, symmetry, and quality of interfaces. The SHG measurement technique involves directing a pulsed laser beam into a sample (an SOI wafer in this case) at an angle, and detection of the second harmonic optical signal that is emitted from the wafer. The present laboratory implementation used in the experiments reported in this paper uses a Ti:Sapphire femtosecond oscillator with a wavelength of 800 nm (1.5 eV). After the reflected fundamental and SHG signals are separated by a prism, the 400 nm SHG signals are detected by a photomultiplier tube (PMT) and measured by a photon counter. The basic configuration is shown in Fig. 2. Pulsed laser irradiation generates electron-hole pairs in the Si regions; some of these electrons acquire enough energy, through multiphoton excitation, to overcome the barrier at the Si/ interface and are injected into the oxide. Some of the injected electrons are trapped on free surfaces or at defects in the oxide regions. These electrons modify the electric fields in the system; interfaces due to the SHG signals are generated at the Si/ lack of inversion symmetry and the magnitude of the signal obtained from an interface depends on the electric field at the interface [4]–[10]. The interface electric fields (magnitude and time dependence) may depend on many factors including: fixed charge, interface trap density, interface recombination velocity, interface morphology, strain, and contamination (affecting interface recombination lifetime). Different factors may dominate in different SOI manufacturing methods; for example, morphology (interface roughness) may be of more interest in the case of SIMOX-SOI wafers, while trapped charge, hydrogen, and interface traps may be of more interest in the case of wafer bonding processes [11]. Contamination is clearly of interest in either type of SOI. Regardless of the dominant factor, SHG can be viewed as a nondestructive measurement of “interface quality.” III. EXPERIMENTS To evaluate the efficacy of SHG-based metrology for SOI wafers, three experiments were conducted. All SOI wafers used were 200 mm diameter with BOX and SOI thicknesses

Fig. 3. Schematic front view of wafer showing location of contamination introduction. Note that contamination was introduced on the back of the wafers in concentrations shown as in solution.

Fig. 4. SHG data for a SIMOX-SOI wafer before and after the removal of the surface native oxide by chemical etch in HF.

in the 140–150 and 50–85 nm ranges, respectively, and comparable doping levels and crystal orientation. For an incoming wavelength of 800 nm passing through the 85-nm-thick silicon layer, approximately 6% of the light is absorbed; for the 400 nm wavelength SHG signal returning through the same silicon layer thickness, approximately 45% of the light would be absorbed. Assuming that the BOX layer is transparent, the compound absorption would be less than 50% in the silicon layer. In all of the experiments, SHG measurements were performed with the surface (native) oxide present, and then again after removal of the surface oxide using a highly selective HF etch. Since the HF etch leaves the surface hydrogen passivated, the native re-oxidation process is relatively slow and measurements are performed within such as time that the surface oxidation does not contribute significantly to the results. With the surface oxide present, the signal from the top oxide/silicon interface dominated the results. Fig. 4 shows a comparison of SHG measurement results with and without the surface oxide, and is representative of the impact of the surface oxide observed in all

ALLES et al.: SHG FOR NONINVASIVE METROLOGY OF SOI WAFERS

109

Fig. 5. SHG data for SIMOX-SOI wafers fabricated using two different proprietary recipes. Insets show AFM results for the top Si/BOX interface.

measurements. Since it is the purpose of this study to perform the first evaluation of the promise of SHG for noninvasive characterization of the subsurface interfaces in the SOI wafers, all of the subsequent data shown in this paper are for measurements after the layer of native oxide was etched from the SOI samples. Measurements have not been repeated over extended time periods since this would not be a typical condition that would be relevant in a manufacturing process line, however, this is an area for further academic study. It should be noted that the results presented here were produced in a research environment over a period of over a year on a limited number of samples provided by multiple SOI wafer vendors, and not on a production metrology tool with statistically significant numbers of wafers. Topics of stability and calibration are not addressed, but are an area for further investigation using a dedicated tool and more systematic studies (i.e., larger sample sizes). Within each experiment, multiple measurements were repeated to investigate reproducibility over a short term for a given set of samples. Results were found to be reproducible and the data included is representative of the measurements. The first two experiments focused on interface properties, the third on contamination detection. In the first experiment, SOI wafers fabricated using the Separation by IMplanted OXygen (SIMOX) process were characterized by nondestructive SHG, and also by using AFM measurements of the top of the BOX following removal of the silicon device layer using a wet seat lective etch in a solution of 25 g KOH per 250 mL of 80 C, followed by 5 min rinse in deionized and an dry. Two SIMOX process variants were measured having comparable layer thicknesses but different levels of interface roughness between the top of the BOX layer and the silicon device layer. The particular process parameters are proprietary, however, it has been shown that SIMOX annealing properties can affect the interface roughness and electrical properties of the interface [12], [13]. In the second experiment, four variants (dif-

ferent heat treatments during wafer processing; process parameters are proprietary) of a nominal bonded SOI manufacturing process were characterized using SHG, and also using electrical pseudo-MOSFET measurements [14]. In the third experiment, spot contamination was intentionally introduced onto the back of bonded SOI wafers (all from the same fabrication lot, but a different one than used in the second experiment) using Ni, Cu, and Fe solutions, each in two different and (as deposited on the back concentrations: of the wafer) at locations shown in Fig. 3. After the solutions were allowed to dry, the wafers, including a control wafer with no contamination, were placed in a diffusion furnace for 1 h . Following cooling, wafers were cleaned and charat 950 ). Folacterized by microwave photoconductivity decay ( measurements, wafers were cleaved and half lowing the of each measured by SIMS and SHG, respectively. IV. RESULTS Fig. 5 shows the TD-EFISH generation response and AFM measurement results from the SIMOX wafer variants. SHG measurements at three points across the sample produced consistent results. A clear difference is observed in both the peak magnitude and time dependence of the SHG signal. The interface roughness effectively increases the surface area. In addition, the difference in the fabrication process parameters may lead to differences in charge states at the interface. In any case, the rougher interface is not desirable, and the differences in the SHG signals provide an indication of the interface quality. There is certainly information contained in both the magnitude and time dependence of the signal. One issue for real-time metrology in manufacturing is measurement time. In this work, we have chosen to select the magnitude (peak, or plateau) of the signal to compare with the other measurements. The approach to apply this in manufacturing is discussed in Section V. With a dedicated tool and a larger sample size for a given process,

110


Fig. 6. SHG data for bonded SOI wafers subject to different heat treatments during wafer fabrication.

Fig. 8. SIMS data for intentionally contaminated wafers following the diffusion anneal. Measurements were performed on the samples at locations corinitial solution concentrations. From the SIMs responding to the 10 cm A): 8.3 10 at=cm ; Ni(> 200 A): 4.4 10 at=cm ; data: Fe(> 200 Cu(> 200 A): 2.4 10 at=cm .

2

2

2

Fig. 7. SHG data (a.u.) for bonded SOI wafers [3] using different thermal processing. Inset shows pseudo-MOSFET Id-Vg transfer characteristic measurements [14].

more quantitative models (for example, SHG temporal signatures specific to a given problem) could perhaps be developed allowing SHG to provide more diagnostic capabilities. Fig. 6 shows the TD-EFISH generation response of the bonded SOI wafers subject to different thermal processing. Fig. 7 plots the flatband voltage shift as measured from the electrical characteristics (shown in pseudo-MOSFET the inset) versus the maximum SHG magnitude. For the bonded wafers, the thermal process appears to have limited impact over the range of temperatures from T1 to T3; however, the electrical results indicate that temperature T4, the pseudo-MOSFET, no longer shows MOSFET characteristics, indicating a probable issue with the quality of the BOX or related interfaces (including the bonding interface). Fig. 9 shows the SIMS measurement results for the intentionally contaminated bonded SOI wafers. Measurements were performed on the samples at locations corresponding to the initial solution concentrations. It is known that, in SOI wafers, metals that may be introduced during wafer fabrication can be gettered to the silicon/BOX interface(s) [15]–[19]. Subsequent thermal processing may cause the metals to migrate and degrade device yield and reliability. Ni and Cu are extremely fast diffusers and precipitate at the oxide interfaces

Fig. 9. SHG data (a.u.) for control SOI wafer, SOI wafer without contamination annealed at 950 C for 1 h, and intentionally Ni contaminated wafer annealed at 950 C for 1 h. All measurements are shown following removal of native oxide.

(both BOX and the 2 nm surface oxide) during the cool-down from the drive-in anneal; Fe is a much slower diffuser, and a substantial concentration of Fe may be quenched into the bulk of the wafer (as well as some surface precipitation). The Cu and Ni are seen to pile up at the surface (native oxide/Si interface) and the Si/BOX interfaces, while the Fe is not gettered significantly to any interface. The SHG signal was measured at three locations on each of the wafers following removal of the native oxide. Fig. 10 shows the TD-EFISH measurement results from the control and Ni


Fig. 10. Correlation of microwave photoconductivity decay (PCD) lifetime and peak SHG magnitude (a.u.) for intentionally Ni contaminated wafers following the diffusion anneal. The inset shows the PCD map, and the arrows indicate the points at which the SHG measurements were performed.

Fig. 11. Correlation of microwave photoconductivity decay (PCD) lifetime and peak SHG magnitude (a.u.) for intentionally Cu contaminated wafers following the diffusion anneal. The inset shows the PCD map, and the arrows indicate the points at which the SHG measurements were performed.

contaminated wafers. Here, it is evident that the thermal process step alone changes the response; however, the trend with contamination is much more significant, with the presence of the Ni increasing the SHG signal beyond that of either of the uncontaminated control wafers. lifetime maps for the Ni and The peak SHG signal and Cu contaminated SOI wafers are shown in Figs. 11 and 12. In maps, the contaminated regions appear as areas of the low lifetime. The SHG results show differences that correspond to the measured differences in lifetimes. The SHG magnitude increases for higher concentrations of Ni and Cu. Fig. 13 summarizes the SHG results from the contaminated wafers. For Ni, the SHG signal is significantly larger for the high contamination level, while the two lower level measurements appear to be near or below the sensitivity limit. From the SIMS data, the concen. For Cu, tration at the interfaces is less than 4.4 the SHG response remains proportional to contamination level across the range examined, with the more pronounced difference between the two low contamination spots indicating that

111

Fig. 12. Summary of peak SHG signal (a.u.) for intentionally contaminated wafers following the diffusion anneal. The low, higher, and highest lifetime designations correspond to SHG measurements taken at locations based on the microwave photoconductive decay (PCD) maps such as shown as in Fig. 10.

Fig. 13. SHG data (a.u.) from [3] and this contamination study normalized and combined to illustrate schematically the proposed use of SHG for process control metrology.

sensitivity may be higher for Cu. The SIMS data for Cu show the low concentration of less than 2 . For the Fe, which does not pile up near the interface, the SHG signal does not vary significantly with contamination level. V. SHG FOR PROCESS CONTROL The experimental results presented here demonstrate that the SHG measurements exhibit differences that depend on SOI interface characteristics of importance to wafer manufacturers and users. Fig. 14 illustrates schematically how SHG can be used as a method of process control metrology. By first establishing the nominal response and control limits for the SHG signals for “good” wafers, additional quantitative destructive analysis can be limited to cases where the SHG signal extends beyond the acceptable limit(s). This provides a method to measure a higher number of samples (potentially every wafer, if desired) and obtain real-time feedback. SHG implementation as a production monitor is compatible with commercial metrology tool configurations based on laser scanning; appropriate lasers, detectors, and wafer handling systems are available. Each wafer can be measured and compared with an expected signal from a known clean wafer. If the SHG signal exhibits unacceptable departure

112


from control, the wafer can be analyzed using destructive diagnostics. With increased amounts of statistical data and more systematic correlation of SHG to other measurements, more sophisticated models may allow direct quantitative analysis based on SHG measurement results. VI. CONCLUSION Results presented here, while on a limited data set, demonstrate the potential for application of SHG to address the need for production-compatible nondestructive characterization of interface quality and detection of subsurface contamination in SOI wafers. Such capability could reduce the need for sampling-based destructive testing, and reduce the risk of events propagating and having a more severe impact later in device processing. These promising results, and the real need for such a metrology capability, provide motivation for additional systematic studies and development of a production-compatible metrology tool based on the use of SHG. REFERENCES [1] Y. Gu, T. Vu, and G. P. Li, “SOI material characterization using optical second harmonic generation,” in Proc. IEEE Int. SOI Conf., Oct. 1994, pp. 94–95. [2] J. L. Dadap, B. Doris, Q. Deng, M. C. Downer, J. K. Lowell, and A. C. Diebold, “Randomly oriented Angstrom-scale microroughness at the interface probed by second harmonic generation,” Appl. Si(100)/ Phys. Lett., vol. 64, no. 16, pp. 2139–2141, Apr. 1994. [3] R. Pasternak et al., “Investigation of second-harmonic generation for SOI wafer metrology,” in Proc. Int. Symp. Silicon-on-Insulator Technol. Devices XII, G. K. Celler, Ed., May 2005, pp. 87–92, PV 2005-03. [4] M. L. Alles, R. Pasternak, N. H. Tolk, R. D. Schrimpf, D. M. Fleetwood, and R. W. Standley, “Experimental evaluation of second harmonic generation for non-invasive contamination detection in SOI wafers,” in Proc. 17th Annu. IEEE/SEMI Advanced Semicond. Manuf. Conf., May 2006, pp. 1–6. [5] B. Jun, R. D. Schrimpf, D. M. Fleetwood, Y. V. White, R. Pasternak, S. N. Rashkeev, F. Brunier, N. Bresson, M. Fouillat, S. Cristoloveanu, and N. H. Tolk, “Charge trapping in irradiated SOI wafers measured by second harmonic generation,” IEEE Trans. Nucl. Sci., vol. 51, pp. 3231–3237, Dec. 2004. [6] J. F. McGilp, “A review of optical second-harmonic and sum-frequency generation at surfaces and interfaces,” J. Phys. D: Appl. Phys., vol. 29, pp. 1812–1821, Jul. 1996. [7] G. Lüpke, “Characterization of semiconductor interfaces by secondharmonic generation,” Surf. Sci. Rep., vol. 35, no. 3, pp. 75–161, Nov. 1999. [8] J. G. Mihaychuk, J. Bloch, and H. M. van Driel, “Time-dependent second-harmonic generation from the Siinterface induced by charge transfer,” Opt. Lett., vol. 20, no. 20, pp. 2063–2065, Oct. 1995. [9] J. Bloch, J. G. Mihaychuk, and H. M. van Driel, “Electron photoinjection from silicon to ultrathin films via ambient oxygen,” Phys. Rev. Lett., vol. 77, no. 5, pp. 920–923, Jul. 1996. [10] Z. Marka et al., “Characterization of x-ray radiation damage in Si/ structures using second-harmonic generation,” IEEE Trans. Nucl. Sci., vol. 47, pp. 2256–2261, Dec. 2000. [11] D. M. Fleetwood, “Hydrogen-related reliability issues for advanced microelectronics,” Microelectron. Reliab., vol. 42, pp. 1397–1403, Sep. 2002. [12] C. Jacobs, A. Genis, and L. P. Allen, “Effect of annealing temperature on Si/buried oxide interface roughness of SIMOX,” in Proc. IEEE Int. SOI Conf., Oct. 1994, pp. 49–50. [13] H. Shin, T. Wetteroth, S. Wilson, G. Harris, D. Schroder, W. Krull, and M. Alles, “Effect of nitrogen and argon anneals on the leakage currents of SIMOX TFSOI devices,” in Proc. IEEE Int. SOI Conf., Oct. 1995, pp. 44–45. [14] S. Cristoloveanu and S. Williams, “Point-contact pseudo-MOSFET for in –situ characterization of as-grown silicon-on-insulator wafers,” IEEE Electron Device Lett., vol. 13, pp. 102–104, Feb. 1992.

SiO

SiO

SiO

SiO

[15] M. Shabani, T. Yoshimi, and H. Abe, “Low-temperature out-diffusion of Cu from silicon wafers,” J. Electrochem. Soc., vol. 143, no. 6, pp. 2025–2029, Jun. 1996. [16] K. L. Beaman, A. Agarwal, O. Kononchuk, S. Koveshnikov, I. Bondarenko, and G. A. Rozgonyi, “Gettering of iron in silicon-on-insulator wafers,” Appl. Phys. Lett., vol. 71, no. 8, pp. 1107–1109, Jul. 1997. [17] O. Kononchuk, K. G. Korablev, N. Yarykin, and G. A. Rozgonyi, “Diffusion of iron in the silicon dioxide layer of silicon-on-insulator structures,” Appl. Phys. Lett., vol. 73, no. 9, pp. 1206–1208, Aug. 1998. [18] J.-I. Furihata, M. Nakano, and K. Mitani, “Study of Cu diffusion in ultra thin bonded SOI wafers evaluated by using radioactive isotope tracers,” in Proc. IEEE Int. SOI Conf., Oct. 1999, pp. 125–126. [19] M. H. Yang, A. Wang, M. Neuburger, and R. S. Hockett, “SIMS measurements of metal contamination in SOI wafers,” in Proc. Int. Symp. Silicon-on-Insulator Technol. Devices XII, G. K. Celler, Ed., May 2005, pp. 149–154, PV 2005-03.

Michael L. Alles (S’92–M’92) received the B.S.E.E., M.S.E.E, and Ph.D. degrees in electrical engineering from Vanderbilt University, Nashville, TN, in 1997, 2000, and 2002, respectively. He is a Senior Research Engineer with the Institute for Space and Defense Electronics, and Research Associate Professor of Electrical Engineering at Vanderbilt University. He spent two years with Silvaco International, ten years with Ibis Technology Corporation, and one year with Harris Semiconductor. He has served on the SIA ITRS starting materials working group since 1999, chairing the 2001 SOI materials group. His background includes semiconductor technology, silicon and SOI wafer manufacturing and metrology, computer-aided design tools for semiconductor fabrication processes, devices and integrated circuit design, and expertise in simulation of radiation effects in semiconductor devices and circuits.

Robert Pasternak received the Ph.D. degree from Vanderbilt University, Nashville, TN, in 2005. He is a Research Associate at Arizona State University, Tempe. His research is focused on nonlinear optical effects in thin semiconductor heterostructures.

Xiong Lu received the M.S. degree from Vanderbilt University, Nashville, TN, in 2006. She is currently working towards the Ph.D. degree in physics at Vanderbilt University. Her research is focused on nonlinear optical effects in semiconductor heterostructures and resonant photodesorption of hydrogen molecules from silicon and diamond surfaces.

Norman H. Tolk received the A.B. degree from Harvard College, Cambridge, MA, in 1960 and the Ph.D. degree from Columbia University, New York, in 1966. He is a Professor of Physics in the Department of Physics and Astronomy, Vanderbilt University, Nashville, TN. He is also an Adjunct Professor of Physics at Fisk University, Nashville, TN. He was a Member of Technical Staff at Bell Laboratories, Murray Hill, NJ (1968–1984). He holds seven patents, is the author or coauthor of three edited books and more than 240 papers on nonlinear laser-surface and laser-interface interactions, ultra-fast vibrational and electronic processes at surfaces and interfaces, spin dynamics, desorption induced by electronic process, and atomic collision physics. Dr. Tolk is a Fellow of the American Physical Society. He received the Alexander von Humboldt Senior Scientist Award in 1987.

Ronald D. Schrimpf (S’92–M’86–SM’97–F’00) received the Ph.D. degree from the University of Minnesota, Minneapolis, in 1986. He is a Professor of Electrical Engineering and Director of the Institute for Space and Defense Electronics, Vanderbilt University, Nashville, TN. He served as a Professor of Electrical and Computer Engineering at the University of Arizona from 1986 to 1996. Dr. Schrimpf is Past Chairman of the IEEE Nuclear and Plasma Sciences Society Radiation Effects Steering Group.


Daniel M. Fleetwood (M’87–SM’90–F’97) received the Ph.D. degree from Purdue University, West Lafayette, IN, in 1984. He is a Professor of Electrical Engineering, Professor of Physics, and Chair of the Electrical Engineering and Computer Science Department, Vanderbilt University, Nashville, TN. He was a Member (1984–1990) and Distinguished Member (1990–1999) of the Technical Staff at Sandia National Laboratories, New Mexico. He is the author or coauthor of more than 275 papers on radiation effects on microelectronics, defects in microelectronic materials, and low-frequency noise. Dr. Fleetwood is a Fellow of the American Physical Society.

Robert P. Dolan is Vice President of Wafer Technology at Ibis Technology Corporation. He has been involved in silicon-on-insulator (SOI) ion implantation equipment and process development since 1984, and holds U.S. and international patents relating to SIMOX-SOI equipment and materials. He is also the author of numerous papers relating to SIMOX-SOI manufacturing and technology.

113

Robert W. Standley received the Ph.D. degree from the University of Illinois at Urbana–Champaign, Urbana, in 1980. He is a Fellow in the New Materials Research and Development Group at MEMC Electronic Materials, Inc., where he has been since 1995, working on the materials science and characterization of silicon homo- and hetero-epitaxial wafers and SOI wafers. From 1980 to 1995, he was a member of the Corporate Research Department, Amoco Corporation. He has served as Chairman of the Metrology Group of the ITRS Starting Materials Working Group since 2000.