Solid State Devices , Circuits and Systems

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EE 5340 – Semiconductor Device Theory. Contact: Professor ... (A copy of the Solution Manual is on reserve in the Science and Engineering. Library.) Sample  ...

EE Diagnostic Exam Preparation Guide for the Exam Based on EE 5340 – Semiconductor Device Theory Contact: Professor Ronald L. Carter, [email protected], http://www.uta.edu/ronc Course Learning Goals and Objectives: Introduction to solid state physics and the physics of semiconductor devices. Device physics as applied to diodes, bipolar junction transistors and MOS transistors. Silicon and IIIV device physics and technology will be considered. Text: RDevice Electronics for Integrated Circuits, 3rd ed., by Richard S. Muller, Theodore I. Kamins, and Mansun Chan, John Wiley and Sons, New York, 2003. ISBN: 0-471-59398-2. (Books on reserve in the Science and Engineering Library are marked R.) Reference Text: RDevices for Integrated Circuits: Silicon and III-V Compound Semiconductors, by H. Craig Casey, Jr., John Wiley & Sons, New York, 1999. Problems: The problem assignments given in the outline below have been selected from the Muller, Kamins and Chan text for preparation for the 5340 Diagnostic Exam. The study of the problems assigned will be helpful in your preparation. (A copy of the Solution Manual is on reserve in the Science and Engineering Library.) Sample 5340 Diagnostic Exam: A sample exam is attached.

Topic Coverage Ch. 1 - Semiconductor Electronics, P1:1,3,4,6,8,18 Appendix 1A - Electric Fields … Ch. 2 - Silicon Technology, P2:15,18,19,20 Ch. 3 - Metal-Semiconductor Contacts, P3:2,3,4,5,7,16 Ch. 4 - pn Junctions, P4:1,2,5,6,9,14 Ch. 5 Currents in pn Junctions - P5:1,2,3,6,9,11,19,21 Ch. 6 - Bipolar Transistors I, P6:1,5,8,9,12,13,16,17 Ch. 7 - Bipolar Transistors II, P7:1,2,7,9,11,23,29 Ch. 8 - Properties of the MOS System, P8:1,2,4,7,12,15 Ch. 9 - MOSFETs I, P9:1,3,5,7,14,21, Ch. 10 - MOSFETs II, P10:1,2,4,8

Diagnostic Exam for EE 5340 Spring 2008

(place exam ID # sticker here)

Instructions, Notes and Physical Constants: 1. 2. 3. 4. 5. 6. 7. 8. 9.

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Do your own work. Do 2 of the 3 problems. Calculator allowed. You may NOT share a calculator with another student. Use values for constants given on this cover sheet. If a value is not given, explicitly state definitions and assumptions that you use. Special note: Where used, nEm = nx10m = n·10m. In some cases, parameters may be calculated from model equations given below . Do all calculations on this exam paper, or on extra sheets supplied by the Graduate Advisor. Use one side of the paper only. Show all calculations, making numerical substitutions and giving numerical results where possible. If time does not permit the final calculation derive the correct symbolic calculation and the correct numerical substitution in the symbolic equation. Write answers in space given. Unless stated otherwise, T = 300 K, Vt = 25.852 mV For this exam purposes, unless otherwise stated, the material is silicon with ni = 1.07x1010 cm-3 Nc = 2.84x1019 cm-3 qχSi = 4.05 eV Eg,Si = 1.125 eV. Nv = 3.08x1019 cm-3 For the work function of poly-silicon, use φn+ = χsi = 4.05 V φp+ = χSi + Eg,Si/q = 5.175 V. For the minority carrier lifetime in silicon (either electrons or holes), you may use the model relationship τmin = (45x10-6 sec)/(1+7.7x10-18*Nimp+4.5x10-36*Nimp2), (where Nimp = the total impurity concentration in n- or p-type material, compensated or not). For holes in silicon, assume μp = {425.6÷[1+(Nimp÷2.23x1017)0.719]}+44.9, in cm2/V-sec, (where Nimp = the total impurity concentration in n- or p-type material, compensated or not). For electrons in silicon, assume μn = {1346÷[1+(Nimp÷9.2x1016)0.711]}+68.5, in cm2/V-sec, (where Nimp = the total impurity concentration in n- or p-type material, compensated or not). Metal gate work functions should be assumed to be φAu = 4.75 V for gold, φAl = 4.1V for aluminum. The electron affinity of SiO2 is χSiO2 = 0.95 V. Planck constant h = 6.62618x10-34J-s= 4.1354x10-15eV-s, 1 eV = 1.60218x10-19 Joule Free electron mass mo = 9.1095x10-28 g. Boltzmann constant, k = 1.38066x10-23J/K Electron charge, q = 1.60218x10-19 Coulomb Permittivity of free space, εo = 8.85418x10-14 Fd/cm Relative permittivity of silicon, εr,Si = 11.7 Relative permittivity of silicon dioxide, εrOx = 3.9 The breakdown voltage of an abrupt (step) junction (assymetrical or one-sided) diode with doping on the lightly doped side of NB is VB = 60(Eg/1.1)3/2 (1016/NB)3/4 V. Each problem is worth 50 points. Do any 2 of the attached 3 problems.

1. A sample of silicon has donor concentration of 1.500E17/cm3 and acceptor concentration of 3.3E15/cm3. a. What is the electron concentration (to 4 significant figures)?

Answer a: n = ______________ cm-3. b. What is the total impurity concentration, Ni (to 4 significant figures)?

Answer b: Ni = _________________cm-3. c. What is the electron mobility?

Answer c: μn = _________________ cm2/V-sec. d. Sketch and calculate the location of the equilibrium Fermi level for this material relative to the conduction band edge?

Answer d: Ec - Ef = _____________ eV

2. For this problem, consider a hypothetical semiconductor material with ni = 8.00E+10/cm3 and a relative permittivity of 13. Consider the charge neutral region width to be the same as at Va = 0, unless otherwise stated. • The anode (p-type) region has NA = 3.50E+18/cm3 (no compensation), D min = 7.6 cm2/sec and τ min = 3E-8 sec, and is 1.4E-4 cm wide from junction to contact. • The cathode (n-type) region has ND = 6.8E15/cm3 (no compensation), D min = 32 cm2/sec and τ min = 6.2E-6 sec, and is 400E-4 cm wide from junction to contact. a. Calculate the minority carrier diffusion length, Lp in the cathode.

Answer a: Lp = ______________ cm. b. For Va = 650 mV (in the low-level injection range, and ignoring recombination currents), calculate the largest component of the forward diffusion current density at the appropriate depletion region boundary (either Jp(xn) or Jn(-xp) in functional notation). Also, sketch the pn junction band diagram at this potential.

Answer b: J(650 mV) = ______________ A/cm2. c. For Va = 0 V the depletion capacitance per unit area (assume a perfectly abrupt junction) is:

Answer c: C’j(0 V) = ______________ Fd/cm2. d. Calculate the minority carrier transit time across the lightly doped side for the condition in part b.

Answer d: τmin = _________________ sec.

3. An ideal (no interface charge) nmos (n+ poly-Si gate) device has substrate concentration of 5.41E14 cm-3 and the gate oxide thickness is 740 nm. a. Calculate the φms for this device and sketch the band structure for the device at the flat-band condition, including the energy levels in the poly-Si and silicon substrate. Show the value of qφms on this sketch.

Answer a: [6] φms = ___________________ V. b. Sketch the band diagram for the silicon at the onset of strong inversion. Be sure to label each level and the total band bending.

Answer b: Show sketch above. c. Next, calculate the maximum depletion depth at the onset of strong inversion (OSI).

Answer c: xd,max = ___________________ cm. d. Next, calculate the threshold voltage for channel formation in this system.

Answer d: VT = ___________________. .