[2] Singh, K., George, S.M., Rambabu, P.: Recurrent Networks for Standard ... [6] Dorn, J., Froeschl, K.A.: Scheduling of Production Processes; New York et al.
SOLVING SEQUENCING PROBLEMS USING RECURRENT NEURAL NETWORKS AND SIMULATED ANNEALING - A STRUCTURAL AND COMPUTATIONAL COMPARISON Kirti Singh, Indore, India Bernd Schneider, Münster Karl Kurbel, Münster
Summary: Since most sequencing problems are NP-hard, many heuristic techniques have been tried to solve such problems. In this paper, we investigate two methods - Hopfield neural networks and Simulated Annealing - and their application to the problem of placing standard cells during VLSI design. Comparisons were made with respect to solution quality and computing time. Simulated Annealing performed better in all test cases, but the differences between solution qualities decrease as problem sizes and complexities are higher. Advantages and disadvantages of both methods, and approaches to improve their performance are discussed.
1 Introduction Sequencing problems occur in various areas. Examples are job-shop scheduling, VLSI (very large scale integration) cell placement, and the travelling salesman problem. Many attempts have been made in Operations Research to solve sequencing problems. Since most problems are NP-hard, many deterministic and stochastic heuristic techniques have been tried. As neural networks and other new computational paradigms have been emerging ([1] - [7]), it is interesting to compare their performance with other well-known techniques. In recent work, we have studied the Hopfield neural-network model and Simulated Annealing for job-shop scheduling [8] and for VLSIcell placement. In this paper, we compare the two methods, both from a structural and a computational point of view, with respect to the problem of placement of standard VLSI cells on a chip [9]. The standard-cell placement problem occurs in VLSI design when the layout of integrated circuits has to be determined. Standard-cell design techniques are very common because they provide a semi-regular layout which can be accomplished in a relatively short time. Standard cells have the same height but their widths vary depending on functionality. The cells are placed in rows and interconnects run in channels between the rows (see figure 1b). Interconnections are predefined by so-called netlists. A netlist states which cells are to be connected within a circuit. For a given number of cells and netlists, the task is then to minimize overall interconnection wirelength by placing the cells optimally on the given layout. In chapter 2, the Hopfield network model is described and the energy function for the cell-placement problem is formulated. Chapter 3 gives an outline of Simulated Annealing and the representation chosen
for cell placement. In chapters 4 and 5, we compare the two methods with regard to computational and structural differences. Chapter 6 gives a short outlook of further work.
2 Hopfield Network Model Hopfield and Tank suggested that a single-layered feedback neural-network model can be used to solve optimization problems if problem constraints and the optimization goal can be represented as a Lyapunov function [1]. The basic principle of the Hopfield net is that it behaves like a dynamical system. If a dynamical system is evolving, and when it reaches its stable state, the corresponding energy of the system is minimal. If we thus incorporate the objective function of the application problem into the energy function in an appropriate way, the objective function will also reach its minimum at equilibrium state. For the standard-cell placement problem, the solution is represented by variables outxi. A variable outxi stands for activation of a neuron, where indices x and i represent cells and position numbers on the chip, respectively. If outxi is 1, cell x will be placed at position i. If n is the total number of cells, problem constraints E1, E2 and E3 can be written as: E1 = −
(1)
No two cells must be placed at the same position:
(2)
The same cell must not be placed at two positions: E2 = −
(3)
1 ∑ ∑ ∑ out xi * out xj 2 x i j ≠i 1 ∑ ∑ ∑ out xi * out yi 2 x y≠ x i
1 E3 = − ∑ ∑ out xi − n 2x i
All the cells must be placed:
2
Each of the terms is divided by two because the factors are summed up twice. The energy function E is now the sum of the constraints plus the objective function, weighted by constants c1, c2, c3, and c4 (see chapter 5):
( )
E = c1 * E1 + c2 * E2 + c3 * E3 + c4 * − 12 ∑ ∑ ∑ ∑ out xi * out yj * Dij * N xy x y i j
E is calculated from the distance matrix D = (dij) and the connectivity matrix N = (nxy). dij stands for the distance between positions i and j; nxy is 1 if cells x and y have to be connected, otherwise 0. The corresponding weight matrix and external inputs are derived from this energy function [2].
3 Simulated Annealing Simulated Annealing is a stochastic heuristic for optimization problems, motivated by the physical process of crystallization [10]. The effect of the stochastic component on the optimization process depends on an external parameter called temperature. The higher the temperature, the stronger the influence of the stochastic component is. During optimization, the temperature is decreased in very small steps. In this way, the process gradually turns from a stochastic process to a traditional gradient descent method. Our implementation uses an ordered list to represent the problem. Items of the list are the cells to be placed on the chip (see figure 1a). Positions of the list stand for the locations of items. In figure 1a, for example, cell e will be placed at position 3 of the chip, assuming that positions are numbered from 1 to n. In the algorithm, solutions are modified by moving items of the list to other positions (one at a time). Since the list is initialized with a valid solution (e.g. cell i at position i, for all i = 1, ... n) and since the moving operator works in a way that feasibility is maintained at each step, no additional constraint checking is necessary. Thus the energy function of chapter 2 is reduced to the last term. Recalculating the energy function is also easier, because it only needs to be updated partially. (a)
(b) Cell width
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Fig. 1:
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Cell height
C h a n n e l h e ig h t d
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Sequence of chips and corresponding chip layout (example)
4 Computational Comparison To evaluate the performance of both methods, a number of test runs were carried out. For three problem sizes (12, 15, 20 cells), 75 test cases with different complexities of chip layout − low, medium, and high, respectively − were generated randomly. The complexity of a problem is the ratio of actual number of interconnects and number of possible interconnections. All test cases were attacked with both methods. As the results show, Simulated Annealing is faster and comes out with better solutions than the Hopfield net in all cases (see figure 2).
It is interesting to note how differences between solutions computed by the Hopfield net and those computed by Simulated Annealing vary with complexity. For highly complex problems, differences are rather small, whereas for simple problems, Simulated Annealing performs much better than the Hopfield net. Figure 3 shows relative deviations of solutions calculated by the Hopfield net from those computed by Simulated Annealing (SA) on a semi-logarithmic scale.
Fig. 2:
Comparison of solutions by Hopfield net and Simulated Annealing
Test cases were also run for larger problems (30, 40, 60 and 100 cells). Whereas the Simulated Annealing algorithm converged in all cases up to 60 cells in less than one second and for 100 cells in the range of minutes, it took the Hopfield net already more then 22 hours to compute a 30-cell problem of low complexity. Further runs were thus postponed until substantial improvement of the Hopfield net will be achieved (see chapter 6). Number of cells
Complexity
Average deviation of wirelength (Hopfield net relative to SA)
CPU time (Hopfield) [min:sec]
CPU time (SA) [min:sec]
12
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55 %
0:36
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28 %
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Fig. 3:
Test results grouped by problem sizes and complexity classes
5 Structural Comparison In the Hopfield network technique it is important to find an appropriate problem representation and then to formulate constraints and objective function in form of a Lyapunov function to satisfy the stability condition. Behavior of the network depends very much on the parameter set and on the initial state of the network. The network is very sensitive to these parameters. There is no rule of thumb to find out an appropriate parameter set. Instead, trial-and-error has to be applied. As can be seen from the equation of the energy function, parameters c1, c2 and c3 are used as weights for the constraints to ensure feasible solutions, and c4 as weight for the optimization criterion. If the values of c1, c2 and c3 are chosen too low compared with c4, the network will try to optimize the wirelength without giving enough consideration to solution feasibility. On the other hand, if c1, c2 and c3 are too high, a valid solution is likely to be generated, but it may be far from optimal. There is also a significant probability to get stuck in a local minimum. If the parameters are not appropriate, it may take the net very long to converge. Another reason why the Hopfield net is inferior to Simulated Annealing could be that there are no intermediate solutions to be evaluated in order to guide the network towards improvement. In other heuristic techniques like Genetic Algorithms and Simulated Annealing, solutions are evaluated at each step. Since new solutions are accepted (with some probability) if they are better than previous ones, solution quality is continuously improved. With regard to computation time, the Hopfield net is very slow. This is partly due to the fact that a highly parallel neural network has to be simulated on a sequential computer (Sun SparcStation 10). Since the number of neurons in the network is n2, computing time increases by n4 per cycle, without a way to check the number of cycles needed. In contrast, Simulated Annealing took less than or little more than one second for any of the above test cases! A significant advantage of our implementation of Simulated Annealing is that the objective function can be recalculated in an incremental way. This is one reason why processing is very fast. However, just as selecting the right parameter set for the Hopfield network, it is difficult to determine an appropriate cooling schedule for Simulated Annealing: Slow cooling will make the algorithm run longer, but it will give better results. Quick cooling will speed up computation, but it will result in worse solutions.
6 Outlook Our results have shown that the Hopfield net comes closer to Simulated Annealing as more cells and more complex netlists are included. There is a chance that the Hopfield net can be improved to produce better results. Our further work will proceed into two directions. First, we will attempt to find better initial states. These initial states have to be derived from the given problems; i.e. they will not be generated
randomly but tailored according to the specific problem description. Second, we will implement the Hopfield net on a parallel computer to make it faster. By this, it will be possible to run the network for larger numbers of cells. In addition, we will be able to do more experiments with different parameter sets and initial states within reasonable computing times and select appropriate configurations. So the overall performance of the Hopfield net might improve.
7 References [1]
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[2]
Singh, K., George, S.M., Rambabu, P.: Recurrent Networks for Standard Cell Placement; in: Balagurusamy, E., Sushila, B. (eds.): Artificial Intelligence Technology - Applications and Management; New Delhi, New York et al. 1993, pp. 141-148.
[3]
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[4]
Informatik
und
Formale
Starkweather, T., Whitley, D., Mathias, K., McDaniel, S.: Sequence Scheduling with Genetic Algorithms; in: Fandel, G., Gulledge, Th., Jones, A. (eds.): New Directions for Operations Research in Manufacturing; Berlin et al. 1991, pp. 129-148.
[5]
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[6]
Dorn, J., Froeschl, K.A.: Scheduling of Production Processes; New York et al. 1993.
[7]
Aarts, E.H.L., Korst, J.H.M.: Simulated Annealing and Boltzmann machines: a stochastic approach to combinatorial optimization and neural computing; New York 1989.
[8]
Kurbel, K.E.: Production Scheduling in a Leitstand System Using a Neural-net Approach; in: Balagurusamy, E., Sushila, B. (eds.): Artificial Intelligence Technology - Applications and Management; New Delhi, New York et al. 1993, pp. 297-305.
[9]
Shahookar, K., Mazumder, P.: VLSI Placement Techniques; ACM Computing Surveys 23 (1991) 2, pp. 143-220.
[10] Kirkpatrick, S., Gelatt (Jr.), C. D., Vecchi, M. P.: Optimization by Simulated Annealing; Science 220 (1983) 5, pp. 571-680.
