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Microelectronics International: An International Journal Thermal modeling of semiconductor devices in power modules Kaiçar Ammous Slim Abid Anis Ammous

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To cite this document: Kaiçar Ammous Slim Abid Anis Ammous, (2007),"Thermal modeling of semiconductor devices in power modules", Microelectronics International: An International Journal, Vol. 24 Iss 3 pp. 46 - 54 Permanent link to this document: http://dx.doi.org/10.1108/13565360710779190 Downloaded on: 25 January 2015, At: 05:02 (PT) References: this document contains references to 18 other documents. To copy this document: [email protected] The fulltext of this document has been downloaded 653 times since 2007* Access to this document was granted through an Emerald subscription provided by 368988 []

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Thermal modeling of semiconductor devices in power modules Kaic¸ar Ammous, Slim Abid and Anis Ammous

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Power Electronic Group (PEG)-ENIS, Sfax, Tunisia Abstract Purpose – The paper aims to focus on the semiconductor temperature prediction in the multichip modules by using a simplified 1D model, easy to implement in the electronic simulation tools. Design/methodology/approach – Accurate prediction of temperature variation of power semiconductor devices in power electronic circuits is important for obtaining optimum designs and estimating reliability levels. Temperature estimation of power electronic devices has generally been performed using transient thermal equivalent circuits. This paper has studied the thermal behaviour of the power modules. The study leads to correcting the junction temperature values estimated from the transient thermal impedance of each component operating alone. The corrections depend on multidimensional thermal phenomena in the structure. Findings – The classic analysis of thermal phenomena in the multichip structures, independently of powers’ dissipated magnitude and boundary conditions, is not correct. An advanced 1D thermal model based on the finite element method is proposed. It takes into account the effect of the heat-spreading angle of the different devices in the module. Originality/value – The paper focuses on mathematical model of the thermal behaviour in the power module. The study leads to a correction of the junction temperature values estimated from the transient thermal impedance of each component given by manufacturers. The proposed model gives a good trade-off between accuracy, efficiency and simulation cost. Keywords Simulation, Numerical analysis, Semiconductors, Temperature Paper type Research paper

Rth-IGBT and Rth-DIODE

Nomenclature Li ki k0 ks rCVi ZthJC(t) Tj (t) Tc P Rth T Rhea-IGBT and Rhea-DIODE

¼ materials thickness (m) ¼ thermal conductivity of the material (i)(W.K2 1.m2 1) ¼ silicon thermal conductivity at 300 K ( ¼ 1.548 W cm2 1 K2 1) ¼ silicon thermal conductivity ¼ thermal capacitance of the material (i) (J.K2 1.m2 3) ¼ transient thermal impedance between junction and case (K/W) ¼ transient junction temperature (K) ¼ case temperature at the module base plate (K) ¼ dissipated power at the active surface of the chip (W) ¼ thermal resistance between junction and case (K/W) ¼ absolute temperature (K) ¼ heat sink thermal resistance corresponding to the equivalent thermal resistance between the case (just below the component under test) and ambient air (K/W)

PIGBT and PDIODE

¼ thermal resistance between junction and case of the IGBT and the DIODE, respectively, (K/W) ¼ dissipated power in the IGBT and DIODE, respectively, (W)

Introduction Design of power electronics systems involves numerous trade-offs as is common in most engineered systems. It proceeds through a careful selection process for various parameters and technologies starting with the electrical design and culminating in manufacturing process design. The electrical design phase results in the selection of power electronic circuit components, which is relatively mature and well established. However, rendering well-conceived electrical designs into reliable and low-cost products suitable for any application requires a substantial amount of additional engineering effort. The physical design proceeds further beyond the electronic circuit design, accounting for magnetic devices, current densities, dielectric isolation requirements, semiconductor power losses, thermal management methods, thermo-mechanical stresses, dieattach processes, electromagnetic interference, etc. Aforesaid factors that affect the design are coupled through complex interrelationships. Design activity encompasses several engineering domains including magnetic, electrical, mechanical, thermal, material processing, and manufacturing sciences. In this paper, we have studied the thermal behaviour of the power modules. The study lead to correct the junction temperature values estimated from the transient thermal impedance of each component operating alone. The corrections depend on multidimensional thermal

The current issue and full text archive of this journal is available at www.emeraldinsight.com/1356-5362.htm

Microelectronics International 24/3 (2007) 46– 54 q Emerald Group Publishing Limited [ISSN 1356-5362] [DOI 10.1108/13565360710779190]

46

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Thermal modeling of semiconductor devices

Microelectronics International

Kaic¸ar Ammous, Slim Abid and Anis Ammous

Volume 24 · Number 3 · 2007 · 46 –54

phenomena in the structure. It was noticed that the classic analysis of thermal phenomena in these structures, independently of powers dissipated magnitude and boundary conditions, is not correct. In the first part of the paper we have studied the thermal behaviour of each component of the studied IGBT module (SKM75GB 123D). After a brief description of the internal structure, a 3D numerical simulator is used to implements the module structure. The thermal impedance ZthJC(t) between junction and case of each module device is compared to the thermal impedance deduced from manufacturer data sheet. The variations of the devices thermal resistance, according to the dissipated power and the boundary conditions at the case, are studied. In the second part of the paper, an advanced 1D thermal model is proposed. It is based on finite element method (FEM) represented by an equivalent electrical circuit which sweet well with circuit simulators where electrical behaviour are studied. The multidimensional phenomena are taken into account by considering the heat spreading angle for each devices of the studied module. In the third part of the paper, 3D numerical simulations and experimental investigations are performed in order to validate the proposed advanced model. The effect of the takes into account of the heat spreading angle on the estimated junction temperature value is studied. Static and transient thermal results show the good accuracy of the proposed thermal model.

between the junction and the case. According to the power dissipation, it can be derived from the following formula: Z t DT ðtÞ ¼ PðtÞZ_ thJC ðt 2 tÞdt ð1Þ 0

Where DT ðtÞ ¼ T j max ðtÞ 2 T c ; T j max ðtÞ is the hot spot temperature (junction temperature), Tc is the bottom temperature of the base plate (case temperature), P(t) is the dissipated power at the top surface of the device and Z_ thJC ðtÞ is the time derivative of Z thJC ðtÞ: The concept of equation (1) may be used to correlate the junction temperature rise at any instant and the amount of the average power dissipating level. In the steady state conditions, ZthJC reaches the junction-tocase thermal resistance, RthJC. Moreover, in the particular but practical case of power losses with rectangular waveforms featuring amplitude P0 and in the case of linear assumption, the thermal impedance can be written as: T j max ðtÞ 2 T c ðtÞ ð2Þ Z thJC ðtÞ ¼ P0 The thermal impedance curves are classically given for different duty cycle values and in the range of few microseconds to some hundred-millisecond pulse duration. Sometimes, semiconductor manufacturers give only the step transient thermal impedance in the case of power module. The transient thermal impedance of each device In order to study the thermal behavior of each component in the module, operating alone, 3D finite element simulations are investigated to register the transient evolutions of the thermal impedance. The obtained results are compared with those given by the manufacturer data sheet. This can validate the used structure (Figure 2) of the module implemented in the 3D numerical simulator. We note that, isothermal condition is assumed at the copper pad of the module and the lower surface of the device is fixed to 333 K. This is in agreement with the conditions used by the manufacturer to provide transient thermal impedance evolutions in the data sheet. The program COSMOS/M (1999) is used as a suitable 3D numerical simulation tool for the calculation of the temperature fields. This software is based on calculations with FEM. The top area of the device is divided into 91 £ 31 cells permitting to discretise the (0.9 £ 0.9) cm2 area of the IGBT chip into 81 (9 £ 9) elementary cells and the (0.6 £ 0.6) cm2 area of the DIODE chip into 36 (6 £ 6) elementary cells. In the case of studied devices (vertical structure), power is assumed to be dissipated at the top surface of the chip. In the perpendicular axis of this surface, the discretisation step is variable, it is low in the most active parts of the module and greater in the lower layer (case). The total thickness of the module is divided into 60 elements. The final structured mesh has 51,884 elements and 57,290 nodes. The dissipated power in the IGBT is equal to 60 W uniformly distributed in the active surface of the device (operating alone in the module). Figure 3 shows the evolution of the thermal impedance ZthJC, between junction and case, obtained by numerical simulations. This evolution is in concordance with the thermal impedance evolution given by the manufacturer data sheet. With the same boundary condition and with a step of dissipated power, equal to 30 W in the diode, the thermal impedance response of the diode is shown in Figure 3.

Thermal investigations in the power module The structure of the studied module In this paper, thermal investigations are focalised on IGBT modules. Depending on manufacturers and current calibre, these modules contains one or many semiconductor chip. The main criterion in the design of high power IGBT modules is to achieve a good thermal conductivity and a dielectric strength for the insulation between semiconductor devices (IGBTs and diodes) and a device header (base plate). Both parameters are primarily fixed by the thermal and electrical characteristics of a substrate on which the semiconductor devices are mounted. The direct bonding process using copper is a particularly attractive process for forming a durable and pattern-able metallic layer on these ceramic substrates. The IGBT modules have different thermal behaviour depending on the used substrate material. Materials such as beryllium oxide and aluminum nitride (AlN) have particularly good thermal conductivity. Our study was done with the Semikron module SKM 75GB 123D (75 A/1,200 V) shown in Figure 1. The power module is a one leg IGBT inverter composed by two diodes and two IGBT. Each component is made up of a silicon chip and the set of the components of the module is distributed exactly as it is shown in Figure 2(a). The module structure (SEMIPACK) (Stockmeier, 2004; Hecht and Scheuermann, 2001; Stockmeier and Tursky, 2000; Scheuermenn and Herr, 2001) contains seven layers of different materials; each one is characterized by its thickness Li, its thermal conductivity ki and its thermal capacity rCVi (Figure 2(b)). The transient thermal impedance The essential input value characterizing the thermal behavior in the component, is the transient thermal impedance ZthJC(t) 47

Thermal modeling of semiconductor devices

Microelectronics International

Kaic¸ar Ammous, Slim Abid and Anis Ammous

Volume 24 · Number 3 · 2007 · 46 –54

Downloaded by State University of New York at Binghamton At 05:02 25 January 2015 (PT)

Figure 1 Numerical photo of the studied IGBT module (SKM75GB123D) layout

DIODE1

DIODE2

IGBT2

Case

IGBT1

Figure 2 Geometrical description and thermal structure of the studied IGBT module (SKM75GB123D) Z (mm) Z 31 29 20 18

A’

X

Y

copper A

IGBT2

D2

IGBT1

D1

11 10

case copper

2 0

44 48

0

14

22

31 36

42 46

X (mm) 54 59

68

76

91

(a) Internal geometry of the studied power module Y (mm) 5.4 4.98 4.45 4.1 3.45 3.1 3

Silicon

LS = 0.4; kS = 140; rCVS = 1.7 106

solder copper

Lsl1 = 0.053; ksl1 = 35; rCVsl1 = 1.3 106 LC1 = 0.35; kC1 = 360; rCVC1 = 3.5 106

isolator

LI = 0.636; kI = 100; rCVI = 2.3 106

copper solder

LC2 = 0.35; kC2 = 360; rCVC2 = 3.5 106 Lsl2 = 0.103; ksl2 = 35; rCVsl2 = 1.3 106 Lc = 3; kC = 280; rCVC = 3.6 106

copper (case)

Grease X Heat sink

0 (b) Thermal structure (A-A') Notes: L : in mm ; k : in W.K–1.m–1 and pVC : in j.K–1.m–3

These results show the good agreement between the 3D numerical simulation and the manufacturer data sheet in the case of isothermal conditions. In practice, it is very difficult to maintain the module case temperature at a constant value (isothermal condition) during the module operation as it is done with numerical simulations. The transient thermal impedance evolutions in the case of

isothermal condition at the module base plate, given by the manufacturer data sheet, are then not useful. In Figure 4, we have shown the effect of the boundary conditions, at the module base plate, on the effective thermal resistance of each device. These characteristics are deduced for different device dissipated power and performed with 3D numerical simulations. 48

Thermal modeling of semiconductor devices

Microelectronics International

Kaic¸ar Ammous, Slim Abid and Anis Ammous

Volume 24 · Number 3 · 2007 · 46 –54

Figure 3 IGBT and DIODE thermal impedance responses (1): obtained by 3D numerical simulations; (2) deduced from manufacturer data sheet ZthJC (K/W) 0.68

(2) DIODE

0.58 (1) 0.48 0.38 (2) 0.28

IGBT

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(1) 0.18 Time (ms)

0.08 0

50

100

150

200

250

300

350

400

Figure 4 Junction to case thermal resistance evolution, according to the component dissipated powers and the case boundary conditions, obtained by 3D numerical simulations (a) for IGBT; (b) for DIODE Rth-DIODE (K/W)

Rth-IGBT (K/W) PIGBT = 110W

0.50

0.95

0.45

0.90

PDIODE = 62W

0.40

0.85

PDIODE = 50W

PIGBT = 90W

0.80

0.35

PIGBT = 60W

PDIODE = 35W

0.75

0.30

0.70

0.25

0.65

0.20

0.60 0

0.5

1.0

1.5

0

0.5

1.0

Rhea-IGBT (K/W)

Rhea-DIODE (K/W)

(a)

(b)

thermal resistance as a function of dissipated power and boundary conditions at the base plate.

We notice that thermal conductivity in silicon is assumed to be nonlinear and equal to:   300 4=3 ks ðT Þ ¼ k0 ð3Þ T

Thermal modelling of the power module devices

The devices thermal resistances increase when the dissipated power and the heat sink equivalent resistance increases. The heat sink resistance R hea-IGBT and R hea-DIODE corresponds to the equivalent thermal resistance between the case (just below the component under test) and ambient air. From the characteristics of Figure 4, the thermal resistance can be approximated by the following simple polynomial function as follows: Rth2IGBT ¼ ða1 P IGBT Rrad2IGBT Þ þ a2 ð8C=WÞ ð4Þ Rth2DIODE ¼ ðb1 P DIODE Rrad2DIODE Þ þ b2 ð8C=WÞ

1.5

State of the art Because most of the semiconductor device models are implemented in circuit simulators, thermal circuit networks are the practical models for electrothermal simulations. Literature proposes some approaches to construct thermal networks equivalent to a discretization of the heat equation. For example, the finite difference method and the FEM are proposed. In the case of vertical power devices, where the silicon thickness LS is small compared to other dimensions, it is commonly considered that heat is generated at the top surface of silicon and flows uniformly along the x-axis (perpendicular to the silicon surface). So, the top surface (A) is considered to be a geometrical boundary of the device at x ¼ 0, where the input power P0(t) is assumed to be uniformly dissipated. In our case we have chosen the (FEM) technique to develop the thermal model of the hybrid structure. Each material is represented by a simplified 1D thermal model. For the isolation and baseplate

ð5Þ

where a1 ¼ 1.34 £ 102 3 (W2 1); a2 ¼ 2.28 (8C/W); b1 ¼ 3.19 £ 102 3 (W2 1); b2 ¼ 0.6 (8C/W). We remark that the product P IGBT £ R rad-IGBT (or PDIODE £ Rrad-DIODE) represents the temperature difference between case and ambient air. The deduced characteristics are useful because they allow the correction of the devices 49

Thermal modeling of semiconductor devices

Microelectronics International

Kaic¸ar Ammous, Slim Abid and Anis Ammous

Volume 24 · Number 3 · 2007 · 46 –54

Downloaded by State University of New York at Binghamton At 05:02 25 January 2015 (PT)

layer a modification have been introduced on the 1D model to take into account the lateral flow of the heat in the structure. The classical FEM 1D thermal model of each device material can be represented by the equivalent electrical circuit (Trzer and Vu-Quoc, 1996; Ammous, 1999) shown in Figure 5. Where, C 1 ¼ rcALS =2ðn 2 1Þ; C 2 ¼ 2ðrcALS =6ðn 2 1ÞÞ; and R ¼ ðLs=ðn 2 1ÞKAÞ and (n) is the number of nodes in the material model.

S Bðk;kþ1Þ ¼ p £ 0#k#p22

Where m – is the number of nodes in the isolation layer, n – the number of nodes in the copper and p – the number of nodes in the base-plate. We notice that the diffusion angle can be taken into account in all the device material. The introduced simplifications participate to simulation time reduction without a significant change on the accuracy of the obtained results (Figure 7). Now, the object is to express the angle a as a function of the two input parameters which are the devices dissipated power and the boundary condition at the base plate. 3D numerical simulations are performed on the used structure in order to study the thermal resistance variation, of each device, as a function of the heat spreading angle a. In Figure 8 we have shown the effect of the diffusion angle a on the effective thermal resistance of each device. From the characteristic of Figure 8, the thermal resistance can be approximated by the following simple polynomial function as follows: Rth2IGBT ¼ c1 a þ c2 ð9Þ ð10Þ Rth2DIODE ¼ d 1 a2 2 d 2 a þ d 3

The advanced thermal model Classically, when a 1D heat flow in the structure is considered, the representative 1D thermal model do not take into account the lateral heat spreading. In this part, the objective is to develop a simplified 1D thermal model of each module device which takes into account the lateral heat flow. 3D numerical simulations are used to validate the proposed model. We note that mutual thermal interferences between the different module devices are not taken into account in this study. In the case of the power module, the heat transfer in the substrate and the case is not completely one-dimensional. In our case, we have considered a 1D thermal flow in the silicon and the copper layer at the top of the module structure and since solders thickness are considered very small comparing to the other material thickness, the heat spreading angle (a) is taken into account only for the isolation, the copper and the base plate materials in the proposed simplified structure shown in Figure 13. The angle (a) can takes any value from 0 to 908 according to material parameters of the layer, dissipated power magnitude and boundary conditions in the case (Masana, 1996). This angle influences the values of the heat dispersion surfaces (S1, S2, S3) and consequently the thermal resistances and the heat capacitances of the three layers. In the case of the classical 1D FEM model represented in Figure 5, the different circuit elements are calculated using a fixed material area A. To takes into account the heat spreading angle in the advanced model, each model element between two nodes k and k þ 1 will be calculated with an averaged surface (at the middle of the element as it is shown in Figure 6). The three averaged surfaces SI(k,kþ 1) (for isolation layer), SC(k,kþ 1) (for the copper) and SB(k,kþ 1) (for the case material) are given by the following expressions: "rffiffiffiffiffiffi  #2  S0 LI ð2kþ1Þ S Iðk;kþ1Þ ¼ p £ tgðaÞ 0 # k # m22 ð6Þ þ p 2ðm21Þ

S Cðk;kþ1Þ

"rffiffiffiffiffiffi  #2  S0 LC2 ð2k þ 1Þ tgðaÞ ¼p£ þ LI þ 2ðn 2 1Þ p

Where, c1 ¼ 2 15.7 £ 102 2 (8C/W rad); c2 ¼ 36.4 £ 102 2 (8C/W); d1 ¼ 21 £ 102 2 (8C/W rad2); d2 ¼ 80 £ 102 2 (8C/ W rad); d3 ¼ 1.15 (8C/W). Using equations (4), (5), (9) and (10), the expression of the diffusion angle a for the IGBT according to the dissipated power and the boundary conditions on the case is given by: a1 P IGBT Rrad2IGBT þ a2 2 c2 a¼ ð11Þ c1 For the diode, the diffusion anglepcan ffiffiffiffi be written as: d2 2 D a¼ ð12Þ 2d 1 pffiffiffiffi Where: D ¼ 1:06 2 2:67 £ 1023 P DIODE Rrad2DIODE Using equations (6), (7) and (8), the surfaces SI(k,kþ 1), SC(k,kþ 1) and SB(k,kþ 1) expression, for the IGBT, can be written as a function of the input parameters PIGBT and RradIGBT as following: "rffiffiffiffiffiffi   S0 LI ð2k þ 1Þ þ S Iðk;kþ1Þ ¼ p 2ðm 2 1Þ p

ð7Þ S Cðk;kþ1Þ

0#k#n22 Figure 5 The 1D FEM thermal model of one material in the module



S Bðk;kþ1Þ

P0(t)

C1

C2

2C1

2C1

C2

  a1 P IGBT :Rrad2IGBT þ a2 2 c2 2  tg c1 "rffiffiffiffiffiffi   S0 LC2 ð2k þ 1Þ ¼p þ LI þ 2ðn 2 1Þ p  a1 P IGBT :Rrad2IGBT þ a2 2 c2 2 c1 "rffiffiffiffiffiffi   S0 LC3 ð2k þ 1Þ þ LI þ LC2 þ ¼p 2ð p 2 1Þ p  tg

R

R

"rffiffiffiffiffiffi  #2  S0 LC3 ð2k þ 1Þ tgðaÞ þ LI þ LC2 þ 2ð p 2 1Þ p ð8Þ

C1

 tg

50

  a1 P IGBT :Rrad2IGBT þ a2 2 c2 2 c1

Thermal modeling of semiconductor devices

Microelectronics International

Kaic¸ar Ammous, Slim Abid and Anis Ammous

Volume 24 · Number 3 · 2007 · 46 –54

Figure 6 Representation of the heat spreading angle (a) S0 silicon

solder

Copper Isolation layer

LI S1 Copper

LC2

solder

S2

Case

α

α LC3

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S3

Figure 7 Discretization of the isolation layer (m-2) ∆L1

(m-1)

∆L1

∆L1

(k) α

Isolation layer

(0) Y

S0 SI1 S1(0, 1)

SI2

SIk

SI(k+1)

S1

Figure 8 Variation of the thermal resistance according to the angle a Rth-IGBT and Rth-DIODE (K/ W) 1.2 1.0 DIODE

0.8 0.6 IGBT

0.4 0.2

α (rad)

0 0

0.2

0.4

0.6

The same expressions can be established for the diode too. The last expressions can be used to develop the advanced 1D thermal model which takes into account the lateral heat spreading in the module. The proposed thermal model is not only function of the geometric parameters of the studied structure but depends on dissipated power and boundary conditions. For the isolation layer, for example characterized by the parameters KI, rCVI, LI, the thermal network components between the node k and k þ 1 are given by:

0.8

1.0

1.2

rC VI S Iðk;kþ1Þ LI and 6ðm 2 1Þ LI ¼ K I S Iðk;kþ1Þ ðm 2 1Þ

C 2Iðk;kþ1Þ ¼ 2 RIðk;kþ1Þ

The capacitance expression at the node (k) is given by: C1IðkÞ ¼

51

rCVI S Iðk;kþ1Þ LI 2ðm 2 1Þ

Thermal modeling of semiconductor devices

Microelectronics International

Kaic¸ar Ammous, Slim Abid and Anis Ammous

Volume 24 · Number 3 · 2007 · 46 –54

The proposed 1D thermal model for the IGBT is shown in Figure 9. The developed thermal model of the different module devices is implemented in MATLAB MATLAB (2002) simulator in order to estimate IGBT and diode junction temperatures. For more accuracy of the proposed model, thermal conductivity non linearity (equation 3) was taken into account. In fact, the thermal resistance between two nodes (k and k þ 1) of the 1D thermal model is computed using the averaged temperature ðT k;kþ1 ¼ ðT k þ T kþ1 Þ=2Þ between these two nodes.

the total junction temperature increase when lateral heat flow is neglected in the power module. Static behaviour of the proposed model Experimental investigations are made on the power module in order to validate the accuracy of the proposed simplified model. The experimental estimation of the hottest area temperature inside the IGBT and the diode is based on suitable and measurable parameters. For the IGBT, the hottest area is located at the end of the IGBT channel region, where the current density is high. This temperature can be estimated using the technique (Ammous et al., 1998) based on saturation current measurement at a low voltage VGS (slightly larger than Vth at room temperature). The experimental estimation of the diode highest temperature is based on the measure of the drop voltage in the on-state during the heating phase of the device (Kru¨mmer et al., 1998). The case temperature of the module under the tested device is measured by a thermocouple placed at the interface between heat sink and module base plate. Figures 11 and 12 show the evolution of the maximum temperature in the IGBT, the diode and the case temperature as a function of dissipated power in the two devices and the boundary conditions, respectively. These results are obtained by the 3D finite element simulations, by the proposed model and by experiments. A good accuracy is noted between the different results, this implies that the advanced 1D model is an accurate model for static thermal analysis.

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Validation of the proposed thermal model In order to shows the good accuracy of the proposed model 3D finite element simulations and experiments are performed in static and dynamic conditions. The effect of the diffusion angle The static results obtained by the classical 1D FEM model and the proposed 1D model shows clearly a significant error on estimated temperature values when the heat spreading angle a is neglected. Figure 10 shows the IGBT and the diode maximum temperature evolutions as a function of dissipated power obtained in the case when only 1D thermal phenomena are considered (a ¼ 0) and the case when the diffusion angle is taken into account. These results are performed with 3D numerical simulations and the advanced 1D thermal model. The proposed model results are in concordance with those obtained by the 3D simulations. The error value on the estimated temperature can be grater than 15 per cent of Figure 9 The advanced 1D thermal model of the power module devices

Tj

C1s+C1so C1sol+C1 Rc

Rs

C2so

C2s

P0

C C1I(1)+C1I(2) 2I(m–2,m–1) RC(n–2,n–1) RI(0.1)

C1c+C1I(0)

Tc

C2I(0.1)

C2c 2C1s

C1s 2C1s Silicon

Solder

Ta

Copper

Isolator

Copper

Solder

Case

Grease+ Heat sink

Figure 10 Effect of the heat spreading angle on the estimated junction temperature in the IGBT (a) and the DIODE (b) Tj (K)

Tj (K)

460

420 410

440

1D classical model 1D advanced model 3D fine simulation

400 420

390

(α = 0)

380

400

(α = 0)

370 380

360 350

360

340 340 320 20

3D fine simulation 1D classical model 1D advanced model 30

40

50

60

70

330 80

90

320 10

100

15

20

25

30

Power (W)

Power (W)

(a)

(b)

52

35

40

45

Thermal modeling of semiconductor devices

Microelectronics International

Kaic¸ar Ammous, Slim Abid and Anis Ammous

Volume 24 · Number 3 · 2007 · 46 –54

Figure 11 Evolution of the maximal junction temperature and the case temperature in the IGBT and the DIODE (operating alone) as a function of dissipated powers magnitude (ambient air ¼ 298 K) 440

440 Maximal junction temperature

420

400 380

IGBT

Temperature in (K)

Temperature in (K)

420

Case temperature

360 340

3D fine simulation 1D advanced model Experiment

320 300

0

10

20

30

40

50

60

70

80

Maximal junction temperature

400 Diode

380 360

Case temperature

340

3D fine simulation 1D advanced model Experiment

320 10

90

15

20

25 30 35 40 Power (PDIODE) in (W)

45

50

55

Figure 12 Evolution of the maximal junction temperature and the case temperature in the IGBT and the DIODE (each one operates alone) as a function of the boundary conditions in the case 410

410 400

400

Maximal junction temperature

Maximal junction temperature

390

390 IGBT

Diode

380 370

Temperature in (K)

Temperature in (K)

Case temperature

360 350 340

320 0.5

1

1.5

370

Case temperature

360 350 340

3D fine simulation 1D advanced model Experiment

330

380

3D fine simulation 1D advanced model Experiment

330 320 0.5

2

1

Rhea-IGBT (K/W)

1.5

2

Rhea-DIODE (K/W)

Notes: Dissipated power in the IGBT = 46W; dissipated power in the diode = 37W and ambient air = 298K

Transient analysis To verify the accuracy of the 1D thermal model in the transient state, a power steps are dissipated in the diode and the IGBT. Figure 13 shows the transient thermal responses at the junction, at the top surface of the isolator and at the base plate of the IGBT when dissipated power magnitude is equal to 110 W. These results are obtained by the advanced 1D model and the 3D numerical simulations considered as a reference. Figure 14 shows the transient thermal responses in the diode when the dissipated power step magnitude is equal to 62 W. A good accuracy is noticed between the 1D and the 3D simulations, this proves that the multidimensional thermal phenomena induced by each module device is well represented by the proposed 1D thermal model. So, transient thermal behavior of the proposed model is correct and the introduced error is not important. We notice that the simulation cost of the proposed 1D model is very small compared to the simulation cost of the 3D numerical simulations. A CPU-cost ratio of (104) is registered between the two simulations when they are performed with a Pentium4 processor.

Figure 13 Evolutions of the junction temperature, isolation temperature and module case temperature, in the IGBT alone, obtained by 3D numerical simulations and by the proposed 1D thermal model 380

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Thermal modeling of semiconductor devices

Microelectronics International

Kaic¸ar Ammous, Slim Abid and Anis Ammous

Volume 24 · Number 3 · 2007 · 46 –54

Figure 14 Evolutions of the junction temperature, isolation temperature and module case temperature, in the DIODE, obtained by 3D numerical simulations and by the advanced 1D thermal model

COSMOS/M (1999), GeoStar 2.5 Copyright (C)1999, Structural Research and Analysis Corporation, Los-Angeles, CA. Hecht, U. and Scheuermann, U. (2001), “Static and transient thermal resistance of advanced power modules”, Proc. PCIM’01, Nu¨rnberg, Germany, pp. 3-9. Kru¨mmer, R., Konard, S., Petzolt, J. and Lorenz, L. (1998), “Thermal investigation to the structure and the use of power modules”, Power Conversion. May 1998 Proceeding, pp. 445-53. Masana, F.N. (1996), “A closed from solution of junction to substrate thermal resistance in semiconductor chips”, IEEE Transactions Components, Packaging, and Manufacturing Technology – Part A, Vol. 19 No. 4. MATLAB (2002), MATLAB 6p5 Simulator Data Book, June 18. Scheuermenn, U. and Herr, E. (2001), “A novel power module design and technology for improved power cycling capability”, Microelectronics Reliability, Vol. 41 No. 9, pp. 1713-8. Stockmeier, T. (2004), “Power semiconductor packaging-a problem or a resource? From the state of the art to future trends”, Technical paper, Semikron Elektronik GmbH Nu¨rnberg. Stockmeier, T. and Tursky, W. (2000), “Present and future of power electronics modules”, paper presented at CPES Seminar, pp. 3-9. Trzer, H.J. and Vu-Quoc, L. (1996), “A rational formulation of thermal circuit models for electrothermal simulation-Part I: finite element method”, IEEE Tran. Circuits Syst.-I:Fund. Theory Appl., Vol. 43 No. 9, pp. 721-32.

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Notes: Dissipated power in the Diode= 62W and Rrad-DIODE = 0.4K/W

Conclusion In this paper, we have studied the thermal behaviour of the power modules. In these structures, lateral flow of the heat is important and classical analysis of thermal phenomena independently of powers dissipated magnitude and boundary conditions, is not correct. 3D numerical simulations are performed in order to study the variations of the devices thermal resistance, according to the dissipated power and the boundary conditions at the case. As numerical simulations cost are prohibitive and for electrothermal analysis in circuit simulators, an advanced 1D thermal model is proposed. It is based on FEM represented by an equivalent electrical circuit which sweet well with circuit simulators where electrical behaviour are studied. The multidimensional phenomena are taken into account by considering the heat spreading angle for each devices of the studied module. To validate the proposed thermal model, 3D numerical simulations and experimental investigations are performed. The effect of the heat spreading angle on the estimated junction temperature value is studied. Static behaviour and transient thermal responses have shown the good accuracy of the proposed 1D thermal model. A good trade off between accuracy, efficiency and CPU-cost is registered.

Further reading Ammous, A. (1998), “Mode´lisation e´lectrothermique de l’IGBT (transistor Bipolaire a` Grille Isole´e: Application a` la simulation du court-circuit”, PhD the`se de doctorat de l’INSA de Lyon, N8 d’ordre: 98ISAL 0075. Ayadi, M., Ammous, A., Ounejjar, Y. and Sellami, F. (2002), “Thermal interaction of semiconductors devices in multichip modules”, paper presented at Systems Man and Cybernetics, Hammamet, October. Duong, S., Rae¨l, S., Schhaffer, C. and De Palma, J.F. (1995), “Short circuit behavior for PT an NPT IGBT devices – protection against explosion of the case by fuses”, Proceedings of EPE’95, Sevilla, Spain, pp. 1.249-54. Hussein, M.M., Nelson, D.J. and Elshabini-Riad, A. (1992), “Thermal interaction of semiconductor devices on chopper clad ceramic substrates”, IEEE Trans. Comp, Hybrid, and Manufa Technol, Vol. 15 No. 5, pp. 651-7. Sofia, J.W. (1990), Electrical Thermal Resistance Measurement for Hybrids and Multi-chip Packages, Analysis Technology, Inc., Wakefield, MA. Sofia, J.W. (1995), “Fundamentals of thermal resistance measurement”, paper presented at Seminar 1995, Analysis Technology, USA. Sze, S.M. (1981), Physics of Semiconductor Devices, Wiley, New York, NY.

References Ammous, A. (1999), “Choosing a thermal model for electrothermal simulation of power semiconductor devices”, IEEE Tran Power Electron, Vol. 14 No. 2, pp. 300-7. Ammous, A., Allard, B. and Morel, H. (1998), “Transient temperature measurements and modeling of IGBT’s under short circuit”, IEEE Trans. Electron Devices, Vol. 13 No. 1, pp. 12-25.

Corresponding author Anis Ammous can be contacted at: [email protected]

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