Thermo-mechanical Design for Reliability of WLPs With ... - IEEE Xplore

Thermo-mechanical Design for Reliability of WLPs With Compliant Interconnects Rainer Dudek, Hans Walter, Ralf Doering, Bernd Michel Thorsten Meyer*, Joerg Zapf**, and Harry Hedler*

Fraunhofer Institute Reliability and Microintegration (IZM) e-mail: [email protected] *

Infineon Technologies AG, COM CAT AIT T PM e-mail: [email protected] **Siemens AG, CT MM D2P e-mail: [email protected]

Abstract A new wafer level packaging technology ELASTec® has been developed; which uses a resilient bump contact system. The advantages are twofold; because on the one hand the elastic contact system simplifies wafer probing and on the other hand the elastic interconnects allow an increase in board level reliability. Excessive solder bump straining caused by the mismatch of thermal expansion coefficients (CTE) between silicon and organic board materials can be avoided because of the compliance of the new contact system, which can take over the main part of the mismatch deformation. Since the electrical connection is made by an electrodeposited copper/nickel redistribution layer (RDL), placed on top of the bump surface, other failures risks than solder fatigue emerge which were avoided by parametric studies using finite element analyses (FEA). The thermomechanical characteristics like stress-strain behavior and fatigue resistance of the RDL metallic films are the most important parameters for reliability predictions by FEA, discussed in some detail. The FEA based prediction that the fatigue performance of a spiral RDL layout is superior is proven experimentally and other reliability test data is provided. 1. Introduction The development of new cost effective solutions for interconnection techniques is one focus of the electronic packaging research. Wafer Level Packaging (WLP) indicates to be able to meet this need, but a variety of other requirements have to be fulfilled for the WLP process. Easy and stable (parallel-) manufacturing, low cost, good testability and sufficient electrical and thermal performance as well as first and second level reliability of the resulting packages are in the focus. Second level reliabilty, i.e. mainly the thermomechanical reliability during thermal cycling, is one major concern of the WLPs, since the mismatch of thermal expansion coefficients (CTE) between silicon and organic board materials is high and the die sizes tend to increase rapidly. Direct solder ball chip attach is not feasible in these cases, when the die lengths exceed 5 mm. The proposed solution tries to avoid excessive solder straining by replacing solder

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balls by resilient bumps on the wafer, which can overtake the main part of the mismatch deformation. For memory products a solution with resilient bumps was developed at Infineon [1],[2] combining advantages in processing with the capability of full wafer level test and bum-in and an increased reliability on module level. The solution for this triple target is the development of ELASTece (ELASTec < Elastic-bump on Silicon Technology). The compliance in the interconnection sytem is realized by flexible bumps with a smooth S-shape, as shown in Fig. 1. The bumps are generated by printing, and all bumps on the wafer are thus applied in one step. As bump material of choice silicone was used. This can guarantee a force/ deflection behavior with good electrical contact (even at elevated temperatures) at low forces (1-2 grams/ bump) and the needed resilience in test and second level assembly.

Fig. I Printed silicone bumps The electrical connection is made by thin metallic lines, placed on top of the bump surface. This redistribution of the pads of the chip to the bumps is done by sputtering and electroplating. It is applied in a second step after structuring a resist with photolithography. The electrodeposited metals are Cu and Ni with thicknesses in the range of 3 to 10 microns, having a high conductivity due to the high conductivity of copper. Several thickness combinations were studied.

2005 Electronics Packaging Technology Conference

A gold finish serves as a reliable pressure contact surface for test/ burn in and as a reliable solderable interconnect pad in second level assembly. The top of this redistribution layer (RDL) can be soldered onto a PCB during standard second level assembly. In that way the use of any solder material is avoided during the WLP process. Due to its resilient nature, the bump with RDL can compensate the CTE-mismatches of chip and board. But it is obvious, that excessive straining of the metal lines must be avoided, too. Instead, a balance of metal straining and solder straining has to be achieved. FEA parametric studies for various designs were conducted to guarantee this balance. 2. FEA- based design for thermo-mechanical reliability Modeling andfailure criteria For the FEA modeling and prediction of second level reliability appropriate compromises of geometric details and model complexity as well as various complicated input data like the non-linear behaviors of the metallic materials used in the assemblies are required. Various other materials characteristics input is required for FEA, e.g. for the soft silicone materials, which were difficult to measure because of their low elastic stiffnesses (E ranges from 3 to 14 MPa). Numerical stability of the solutions is another basic requirement for FEA, which was met by combination of solid and layered shell elements. Thermal fatigue loading had to be considered during the analyses. It causes cyclic creep straining of the solder materials and cyclic plastic straining in the RDL metallization. The dissipative processes accumulate over the thermal cycles, causing microstructural degradation and subsequent failure. Manson-Coffin type relations are the failure criteria chosen for the evaluation of the analysis results. For fatigue of solder, both the creep strain and dissipated creep strain energy density represent suitable indicators to evaluate cyclic damage. In the parametric study the trends were predicted by use of the indicator "maximum equivalent creep strain" calculated over one thermal cycle. Details of the procedure and the creep laws applied for SnPb and SnAgCu solders were reported previously [3],[4]. Failure prediction based on the Manson-Coffin type relations constants for both creep strain and creep strain energy densities are also provided there.

low cycle fatigue, where the damage stored in each cycle is related to the cyclic plastic strain amplitude Acp, divided by a constant cf. . It is obvious that this approximate empirical evaluation methodology depends strongly, as in the case of solder materials, on the elastic-plastic characteristics of the metallic films, which have to be provided as material data input for FEA. The evaluation of the mechanical characteristics of thin films is a complicated task. It is known that processing and miniaturization influences the properties of metallic materials. Important properties to be measured are CTE, Young's modulus, the plastic yield limit and hardening behavior, fracture stress or strain as well as internal stresses caused by processing. All these properties can depend on temperature. In particular, the plastic properties of thin metallic films depend on features like film thickness, grain size and orientation. It is known that the yield stress in bulk metals increases approximately with the reciprocal value of the square root of the grain size. In thin films, effects of constraints of the dislocation motion at the film boundaries and those of texture additionally contribute to strengthening [6], which might result in a thin film strength exceeding the bulk strength of the same metal by an order of magnitude. Own measurements as well as literature data revealed that elastic-plastic properties of electrodeposited copper films are far from the properties of bulk copper even in cases when the film thickness is relatively large compared to the grain size. The stress-strain behavior of the films was measured by static tensile testing of free standing, single layer specimens. Attempts have been made to find relations between the mechanical characteristics like Young's modulus, Yield stress or fatigue properties and the microstructure. The latter was analyzed by both high resolution scanning electron microscopy (SEM) and focused ion beam (FIB) microscopy. Fig. 2 shows a FIB section of a standard electrodeposited copper film of 60 gm thickness. Distinct microstructures are observed for the region close to the interface, where the film started growing, and in the thick layer above, where it obeys a columnar structure in the growth direction.

Characterization of the metallicfilms usedfor the RDL The fatigue behavior of metallic thin films, especially copper films, was also shown to obey a Manson-Coffin type relation [5] for the critical cycle number Nf,

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where the first term describes high cycle fatigue, i.e. fatigue caused by cyclic straining in the elastic deformation range, measured by the cyclic stress amplitude Aa in relation to a characteristic stress ca0. This tem is only of interest for critical cycle numbers of approximately 10000 and more and needs not to be considered here. The second term describes 329

Fig. 2 Grain structure of the cross section of a 60 electroplated copper film.

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This columnar structure was not observed for lower film thicknesses 30 ,um and below. The Youngs modulus for these films was taken from the slope of the unloading curve. Values of 62 GPa were determined for the 60 gm thick films and 80 GPa for the 30 gm films. These values are lower than the value known for bulk copper, which is approximately 124 GPa. One possible reason of the deviation might be the elastic anisotropy of copper, causing a twice as high elastic stifffiess for { 111 } oriented copper grains when compared to { 100} ones. Investigations are ongoing. For analyses of the RDL properties, different test samples were fabricated, i.e. free standing films for tensile tests and bi-material bending specimens for fatigue tests. The copper and nickel film test specimens were processed analogously on the same sputtered plating base to avoid microstructural differences because of the dependence of the film microstructure on the plating base. Tensile test specimens were manufactured by electrodeposition on an aluminum substrate. After sputtering of a thin TiCu plating base, the electroplating process was carried out. Subsequently the outline of the specimens was cut by laser. The separation results from a complete etching of the aluminum substrate. These specimens were dog bone shaped with a total length of 50 mm, a width of 4 mm, and thicknesses of 5 pm, 10 gm and 20 gm. These films exhibited a fine grained polycrystalline structure, sometimes with texture. Fig. 3 shows stress-strain behavior resulting from the tensile tests performed on the free standing Cu samples. Again, a low Young's modulus was measured, here taken from the loading curve. The dependence of the Young's modulus on the film thickness was within the measuring scatter range and a mean value of 64 GPa was taken at room temperature. Time-independent elastic-plastic behavior was the choice for the constitutive model of the metallic lines. Isotropic and the kinematic hardening assumptions were both considered. A conservative estimate was made for the plastic yield strength (0.2% plastic strain limit), which was taken as 205 MPa at room temperature from the curves in Fig. 3 and the cyclic fatigue experiments.

Published data for electrodeposited copper films were already compared to the measurements in [7]. The measured values fit well into the reported data range. Enormous differences, however, in the data point to the need for measurement of application specific data. To determine the fatigue behavior of the films a new testing methodology had been developed. The beam-like test specimens were made of polymeric substrates, which were plated with a pattern of thin metallic lines, arranged to form a meandering structure as shown in Fig. 4. A very thin metallic attach layer was sputtered onto the substrate to allow electroplating. These composite beams were subjected to cyclic three point or four point bending.

Fig. 4 Geometry of the bending samples with 5 thick copper lines and 100 gm line width.

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The plastic strain amplitudes in the metallic lines can be controlled by the bending deflection of the beam. Failure of the metallic line can be electrically monitored on-line during cycling. The fatigue behavior of metallic thin films, especially copper films, was shown to obey a CoffinManson type relation between the cycles-to-failure and the plastic strain amplitudes applied. Results of these composite beam bending tests were obtained for both copper and nickel films [7]. 100000 10000

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Fig. 5 shows the measured cycle numbers in dependence the cyclic bending deflection for the Cu-metallization. 2005 Electronics Packaging Technology Conference

Two different batches of specimens were investigated plated with different plating parameters. It is obvious from Fig. 5 that the second copper batch has a clearly higher fatigue resistance. High resolution SEM revealed a different grain size of the two batches with grain sizes in the range of 400 to 1300 nra for batch 1, and of 300 to 500 nm for batch 2, which can be the reason for the different fatigue behavior, because the lower grain size increases the yield strenght of the material. The bending tests were accompanied by FEA to extract the plastic strains in the metallic lines from the bending deflection results. It is known that the kinematic hardening model is better suited for reversed plastic loading, which was subsequently applied. However, isotropic hardening contributions are likely and a combined hardening model could be more realistic.

modelling as well as global-local modelling techniques were applied to circumvent these difficulties. In the FE-analyses, several parameter variations were examined, e.g. bump shape, bump material, standoff, and layout of the RDL lines. The simplest layout is the straight line pattern, which might be varied in line width. Fig.7 exemplifies such a pattern at a local model, which is analogous to that shown in the global model in Fig. 6.

Parametric study results The theoretical studies were performed to characterize the effects on the cyclic reliability. For the thermal fatigue investigations reported here the air to air cycle of 125 °C to -40 °C, cycle time approx. I hour, was chosen. The parametric studies of the WLPs were performed considering variations of geometric and material parameters. The geometrical versions were based on an area array WLP with I/O and a 10 mm square die placed on a standard FR-4 organic board. The bump pitch was 0.5 mm and the standard standoff 200 gm.

Fig. 7 Local FE-model with "straight line" RDL bump layout with low line width, cross section and bump side. A realization of a "straight line" RDL bump layout with high line width is demonstrated in Fig. 8. *

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Fig. 6 Quarter FE-model for the WLP with 10 mm x 10 mm die with"straight line" RDL bump layout. Fig. 6 shows a 3D-FE model for the WLP with a 10.5 mm x 11 mm die, where double symmetry of the package is assumed. It is obvious that enormous size differences have to be handled during meshing. Simplified geomerical 331

Fig. 8 Bump with "straight line" RDL bump layout with high width of the line. 2005 Electronics Packaging Technology Conference

The failure indicator for the RDL lines used in the study was the increase of equivalent plastic strain after initial loading, usually the ramp down of the thermal cycle or one complete thermal cycle, to include at least approximately the hardening of the metallic films. To save on computing time, for ranking of parametric variations also the equivalent plastic strain during first loading step was used, because the same tendencies have to be expected. IFX WLP1 - Daisy Chain Dummy, V9

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Fig. 9 exemplifies the deformation and the distribution pattem of the equivalent plastic strain at the end of one ramp down for a straight line layout. The edge bump position is chosen in the figure. It is obvious from the figure that high plastic strains occur at the inner side of the copper film due to bending of the line. Similar high plastic strains are seen at the outer nickel side of the line. From the calculation results of the global model (Fig. 6) it became obvious that bending of the lines is not the only major deformation mode. Dependent on the bump position, torsional deformations are overlaid on the bending causing similar high plastic strains also for different positions of the bumps which do not have the highest distance to neutral point. The "spiral" RDL layout selected from the parametric studies does not show the drawbacks discussed so far. The local bump model is shown in Fig. 10 and a practical realization is demonstrated in Fig. 11.

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Fig. 11 ELASTece Bump with redistribution, spiral layout. Because of improved flexibility of the line with regard to relative displacements between the bump and the board, which cause less bending and warpage of the lines, the stresses are greatly reduced. Fig. 12 shows the deformation and the distribution pattem of the equivalent plastic strain at the end of one ramp down for the spiral layout at the inner side of the copper line. The same material data set is applied in both cases. Equivalent plastic strains are reduced by a factor of 15. They occur only very locally at the locations, where the line is attached to the chip and to the solder.


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An overview of the various reliability tests passed by the ELASTec® WLP is given in Fig. 15 for first level testing and in Fig. 16 for second level testing.

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3. Reliability testing results Reliability was checked at first and second level Infineon Technologies standard test conditions. The expected high reliability during temperature cycling could be verified experimentally. On module level 1000 temperature cycles (-40°C/ 125°C) could be reached easily. It is notable that for solder bumps, a cyclic life of less than 100 cycles would be expected for the small bump height of 170jm and the large die size. In an ongoing test, a characteristic life time of >6500 cycles is predicted by the Weibull plot shown in Fig. 14. 333


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Fig. 16 Reliability test results on module level 4. Summary An efficient WLP technology has been developed which combines the advantages of ease of wafer test and bum-in with high second level reliability through resilient bump systems. Thermo-mechanical reliability concerns were optimized by application of FEA parametric studies. These studies were accompanied by investigations on the constitutive and fatigue behavior of thin electrodeposited metallic lines. The properties of these thin films were shown to differ remarkably from the properties of bulk material. Additionally, a strong dependence of the film properties on the mode of processing was detected, which indicated the need of materials characterization for any thin film metal system, if material input data is required for theoretical anlysis. The high second level reliability predicted for the ELASTec® WLP was confirmed by testing. For a configuration with high global thermal mismatch, i.e. chips with more than 10 mm in length on FR-4, a Weibull fatigue life of more than 6000 cycles was determined in spite of the low standoff hight of approximately 0.2 mm, which would have caused failure at less than 100 cycles for standard solder bump configurations. Additionally, the package was shown to fulfill all first level and second level Infineon standard test conditions.

References 1. Hedler, H., T. Meyer, W. Leiberg, R. Irsigler: Elastic Bump Wafer Level Packaging - A New Packaging Platform (not only) for Memory Products, IMAPS Conference 2003, Boston, USA 2. Meyer, Th., H. Hedler, W. Leiberg, "Resilient Wafer Level Packaging - a New Packaging Platform for Memory Products", Proc. Semicon 2004, pp. 3. Schubert, A., Dudek, R., E. Auerswald, A. Gollhardt, B. Michel, H. Reichl, ,,Fatigue Life Models for SnAgCu and SnPb Solder Joints Evaluated by Experiments and Simulation", Proceedings, 53rd Electronic Components & Technology Conference, 2003, pp. 603-610 4. Dudek, R., Walter, H., Doring, R., Michel, B., ,,Thermal Fatigue Modelling for SnAgCu and SnPb Solder Joints", Proceedings EuroSimE 2004, Brussels, Belgium, May 2004, pp. 557-564 5. W. Engelmaier, "Manufacturing and Reliability Issues of Small-Diameter/High-Aspect-Ratio Plated Through-Holes Vias," Short Course Proceeding, IZM-ZVE, Oberpfaffenhofen, 1994 6. Hommel, M., Kraft, O., "Deformation Behavior of Thin Copper Films on Deformable Substrates," Acta mater., 49 (2001), pp. 3925-3947 7. Dudek, R., H. Walter, J. Zapf, and B. Michel," Investigations on Low Cycle Fatigue of Electrodeposited Thin Copper and Nickel Films ", Proc. 4*' EuroSimE, Aix, 2003, pp.133-139

Acknowledgement This work was financially supported by the Federal Ministry of Education and Research of the Federal Republic of Germany (Project No. 01M3106A). The authors are responsible for the content of the paper.

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