Three-Dimensional Space-Vector Modulation ... - Semantic Scholar

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 53, NO. 2, APRIL 2006

Three-Dimensional Space-Vector Modulation Algorithm for Four-Leg Multilevel Converters Using abc Coordinates Leopoldo Garcia Franquelo, Fellow, IEEE, Ma. Ángeles Martín Prats, Member, IEEE, Ramón C. Portillo, Student Member, IEEE, Jose Ignacio León Galvan, Student Member, IEEE, Manuel A. Perales, Juan M. Carrasco, Member, IEEE, Eduardo Galván Díez, and Jose Luis Mora Jiménez

Abstract—In this paper, a novel three-dimensional (3-D) space-vector algorithm for four-leg multilevel converters is presented. It can be applied to active power filters or neutral-current compensator applications for mitigating harmonics and zerosequence components using abc coordinates (referred from now on this paper as natural coordinates). This technique greatly simplifies the selection of the 3-D region where a given voltage vector is supposed to be found. Compared to a three-level modulation algorithm for three-leg multilevel converters, this algorithm does not increase its complexity and the calculations of the active vectors with the corresponding switching time that generate the reference voltage vector. In addition, the low-computational cost of the proposed algorithm is always the same and it is independent of the number of levels of the converter. Index Terms—Multilevel converters, natural coordinates, switching-vectors sequence, three-dimensional space-vector modulation (3-D SVM).

I. I NTRODUCTION

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OUR-LEG multilevel converters are finding relevance in active power filters and fault-tolerant three-phase rectifiers with a capability for load balancing and distortion mitigation, thanks to their ability to meet the increasing demand of power ratings and power quality associated with reduced harmonic distortion and lower electromagnetic interference (EMI) [1], [2]. A four-leg multilevel converter permits a precise control of a neutral current due to an extended range for the zero-sequence voltages and currents. In Fig. 1 a four-leg diode clamped threelevel inverter is shown. This topology presents the advantages of a four-leg voltage-source converters [3], [4] and the corresponding to the multilevel converters [5], being particularly suitable to develop large active power filters, in situations of unbalanced load and huge neutral-current circulation. Although the experimental results have been obtained using this topology, however, the algorithm proposed in this paper can be used in other multilevel converter topologies as it only depends on the space vectors.

Manuscript received June 25, 2004; revised September 30, 2004. Abstract published on the Internet January 25, 2006. The authors are with the Department of Electronic Engineering, University of Seville, Seville 41092, Spain (e-mail: [email protected]). Digital Object Identifier 10.1109/TIE.2006.870884

Most of the SVM algorithms found in the literature for voltage converters use a representation of voltage vectors in αβγ coordinates [3], [6], instead of using abc coordinates (referenced from now on this paper as natural coordinates). The αβγ representation offers an interesting information about the zero-sequence component of both currents and voltages (proportional to the γ coordinate), however the change of reference frame have to be carried out, implies complex calculations. In addition, the three-dimensional (3-D) representation of the switching vectors, in αβγ is difficult to understand. In [7], a new 3-D SVM in natural coordinates is applied to conventional four-leg voltage source converters showing the advantages of using these coordinates. Previous works from the authors on generalized 3-D-SVM algorithms for the multilevel converter were proposed in [8] and [9]. This 3-D algorithm is a generalization of the well-known two-dimensional (2-D) space vector technique [10]–[13], which reduces the control complexity and the computational load. The space vectors are contained in a plane when the system is balanced [10]. However, it is necessary to generalize to a 3-D space if the system is unbalanced or if there is a zero sequence or triple harmonics because the reference vectors are not on a plane. The generalized 3-D-SVM algorithm permits the on-line selection of the sequence of the nearest space vectors for generating the reference voltage vector [8]. This generalized method provides the nearest switchingvectors sequence to the reference vector and calculates the ON -state durations of the respective switching state vectors without involving trigonometric functions, lookup tables, or coordinate system transformations, which increase the computational load corresponding to the modulation of multilevel converters. These are important advantages if they are compared to a conventional 2-D-SVM algorithm for multilevel converters [13]–[15]. In this paper, a very simple 3-D-modulation algorithm for four-leg multilevel converters based on the generalized 3-D-SVM algorithm for three-leg multilevel converters, proposed in [8], is presented. It must be noticed that this algorithm is the first one that achieves the control of a four-leg multilevel converter. The computational cost of the proposed method is very low and it is independent of the number of levels of the converter. This technique can be used as a modulation algorithm in all applications that need the synthesis of a 3-Dvector control. As a general assumption the capacitors voltages will be considered equal that is vC1 = vC2 .

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FRANQUELO et al.: 3-D SVM ALGORITHM FOR 4-LEG MULTILEVEL CONVERTERS USING abc COORDINATES

Fig. 1.

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Four-leg three-level inverter topology.

II. M ODULATION -T ECHNIQUE D ESCRIPTION A. Reference-Vector Synthesis Since the switching of any power topology stay at discrete states, SVM is used to approximate a reference voltage vector uref calculating the time to its closest state vectors. Four vectors u1 , u2 , u3 , and u4 are used to approximate the desired voltage vector uref in a control cycle Tm . The modulation law requires the actual voltage vector u to equal its reference value uref , which is represented in the stationary reference frame. During each modulation subcycle of duration Tm a switching sequence is generated. It is composed of four switching state vectors u1 (t1 ), u2 (t2 ), u3 (t3 ), and u4 (t4 ), where t1 , t2 , t3 , and t4 are the ON-state durations of the active switching state vectors. The four vectors nearest to the reference vector must be identified. The proposed 3-D-SVM algorithm easily calculates the four state vectors that generate the reference vector in four-leg multilevel power converter systems. In this way, it is necessary to use a switching sequence with four state vectors. Thus, the reference vector will be pointing to a volume, which is a tetrahedron, into a cube of the dodecahedron. The vertices of that tetrahedron are the state vectors of the switching sequence. In addition, the algorithm permits one to obtain the corresponding duty cycles without using tables or trigonometric functions. The modulation algorithm input is the normalized voltage vector. The normalization only depends on the number of levels of the multilevel converter n and the voltage level value of the dclink capacitors, Vdc [5]. In general, the reference vector must be scaled by the normalization constant: Vdc /(n − 1) to be into the range {−(n − 1), . . . , (n − 1)}. However, the amount (n − 1) is added in order to work in the range {0, . . . , 2(n − 1)} thus simplifying the representation. Step 1) Calculate the coordinates of the subcube reference vertex where the reference vector is found. The space vectors of a four-leg multilevel converter form a dodecahedron in a 3-D space. This space can be decomposed into several cubes, where six tetrahedrons generate the total volume of each cube. The 3-D dodecahedron containing the state vectors that generate the reference vector in four-leg threelevel converter is shown in Fig. 2. As another ex-

Fig. 2. Generalized 3-D space for a four-leg three-level converter.

ample, a four-leg five-level converter is illustrated in Fig. 3. For a certain reference vector in three-phase coordinates (uan , ubn , ucn ), the integer part of each component (a, b, c) is calculated, where a = integer(uan ) b = integer(ubn ) c = integer(ucn )

(1)

where uan , ubn , ucn ∈ {0, . . . , 2(n − 1)}. The cubes into the 3-D-dodecahedron space are formed by a certain number of subcubes depending on the number of the levels of the converter. Only one subcube for two-level converters, eight subcubes for three-level converters, twenty-seven subcubes for four-level converters. In general, (n − 1)3 subcubes into each cube, where n is the number of levels of the multilevel converter. However, is

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Fig. 5. Planes used for selecting the tetrahedron where the reference vector is pointing to.

Fig. 3. Generalized 3-D space for a four-leg five-level converter.

ber of tetrahedrons into the cube have been studied. However, the minimum number of comparisons is obtained using the six tetrahedrons shown in Fig. 6. Step 4) Control space. It should be noted that the set of cubes that can be used not only cover all the control region, the dodecahedron, but there are also certain portions of these cubes that fall outside the control region. Therefore, it is possible, theoretically that a tetrahedron outside the control region can be selected, if the reference voltage is contained exactly on the surface of the dodecahedron. Anyway, if this happens, the algorithm will assign a time equal to zero to the outsider vector. This situation is depicted in Fig. 7. Step 5) Calculation of the switching times. The new algorithm calculates the four state vectors on-line into the 3-D-dodecahedron space and the corresponding duty cycles using a maximum of three comparisons for calculating the suitable tetrahedron. The algorithm modulation is so easy due to the 45◦ planes of each cube and the dodecahedron planes are coincident, as it is shown in Fig. 8(a)–(c).

Fig. 4. Origin of the subcube where the reference vector is found.

important to notice that there are another subcubes located between the cubes and each plane dodecahedron that also belong to the control space. They must be taken into account in the modulation algorithm. The coordinates (a, b, c) are the origin coordinates corresponding to the reference system of the subcube where the reference vector is pointing to. This is shown in Fig. 4. Step 2) Six tetrahedrons are considered in each subcube. Therefore, it is necessary to define the tetrahedron where the reference vector is pointing to. This tetrahedron is easily found using comparisons with three 45◦ planes into the 3-D space, which define the six tetrahedrons inside the subcube. The three planes that define the six tetrahedrons are shown in Fig. 5. Notice that only a maximum of three comparisons are needed regardless the converter number of levels. Step 3) Once (a, b, c) coordinates are known, the main step of the algorithm consists in calculating the four space vectors corresponding to the four vertices of a tetrahedron into the selected subcube [in Step 1)]. These vectors will generate the reference vector. Configurations of the 3-D space with different num-

B. General Structure of the Algorithm The flow diagram of the proposed 3-D-modulation algorithm for four-leg multilevel converters for choosing the tetrahedron where the reference vector is pointing to, is shown in Fig. 9. Notice that the algorithm is extremely simple. The computational load in selecting the switching vectors is always the same and it is independent of the number of levels. III. C ALCULATION OF D UTY C YCLES Once the state vectors that generate each reference vector are known, the corresponding duty cycles are calculated. The algorithm generates a matrix S with four state vectors and the i i i Sbn Scn with corresponding switching times ti . Where San i = 1, . . . , 4 are the coordinates of each state vector and di is the corresponding duty cycle 

1 San  S2 S =  an 3 San 4 San

1 Sbn 2 Sbn 3 Sbn 4 Sbn

1 Scn 2 Scn 3 Scn 4 Scn

 d1 d2   d3 d4

where Tm is the sample time.

ti = di T m ,

i = 1, . . . , 4 (2)


Fig. 6.

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Tetrahedrons in each cube with the corresponding state vectors.

The state vectors are the vertices of the corresponding tetrahedron that generates the reference vector. The equations to be solved are the following: 1 2 3 4 d1 + San d2 + San d3 + San d4 ua = San 1 2 3 4 ub = Sbn d1 + Sbn d2 + Sbn d3 + Sbn d4 1 2 3 4 uc = Scn d1 + Scn d2 + Scn d3 + Scn d4 ,

d1 + d2 + d3 + d4 = 1.

Fig. 7. Reference vector located in a tetrahedron where one of its vertices is out of the dodecahedron.

(3)

The numeric evaluation of the duty cycles or ON-state durations of the switching states are reduced to a simple addition, as it is shown in Table I. The coordinates (a, b, c) represent the different voltage levels between each phase and the neutral. They take values between zero and 2(n − 1), where n is the number of levels of the multilevel converter. The duty cycles are only functions of the reference-vector components and the integer part of reference-vector coordinates. Once the vectors

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Fig. 8. Coincidence of dodecahedron planes and cube planes.

are selected, the sequence can be chosen to minimize the number of commutations. IV. R ESULTS The algorithm has been successfully tested by simulation and using a laboratory prototype. The considered conditions are a 55-Ω resistive load, 1.2-mH smoothing inductance, 10-kHz switching frequency, and 40 V of total dc-link voltage, as it is shown in Fig. 10. The algorithm has been successfully simulated using Matlab (Simulink). The simulated results for the four-leg multilevel converter have been obtained using a continuous model formulated in terms of control functions. The experimental results have been obtained thanks to a real prototype using a TMS320VC33 DSP microprocessor.

In order to prove the proposed technique, an unbalanced voltage reference composed of a fundamental component with 20-V amplitude, 20% of zero sequence, and 20% inverse sequence has been used. Voltage reference for each phase is represented in Fig. 10. Voltage references of each phase are illustrated in Figs. 11–13. In the (b) traces, simulation results of the voltage across the load resistor are shown, being the experimental results of these voltages plotted next, in traces (c). Another reference vector containing a fundamental compo√ nent with (40/ 3)-V amplitude and 120% of the third harmonic has been tested for the sake of clarity. Voltage reference for each phase is illustrated in Fig. 14. The voltage reference, the simulated results, and the experimental results of this experiment are shown in Figs. 15 and 16. Clearly, the voltage across


Fig. 9.

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3-D algorithm for the selection of each tetrahedron with the corresponding state vectors.

TABLE I STATES SEQUENCE AND SWITCHING TIMES

Fig. 10. Experimental setup developed to test the modulation algorithm.

Fig. 11. Voltage reference for each phase composed of a fundamental component with 20-V amplitude, 20% of zero sequence, and 20% inverse sequence.

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Fig. 12. Voltage across load resistor for phase a, composed of a fundamental component with 20-V amplitude, 20% of zero sequence, and 20% inverse sequence.

Fig. 13. Voltage across load resistor for phase b, composed of a fundamental component with 20-V amplitude, 20% of zero sequence, and 20% inverse sequence.

Fig. 14. Voltage across load resistor for phase c, composed of a fundamental component with 20-V amplitude, 20% of zero sequence, and 20% inverse sequence.

Fig. √ 15. Voltage reference composed of a fundamental component with (40/ 3)-V amplitude and 120% of the third harmonic.

the phase resistors follows the input reference signal. These results show the good performance of the proposed algorithm. Fig. 17(a) and (b) shows the spectrum of the voltage signal with 120% of the third harmonic from the simulation and experimental results, respectively. It can be note the good agreement between them. V. C ONCLUSION The 3-D SVM algorithm for four-leg multilevel converters presented in this paper is very useful to readily calculate the switching sequence and the ON-state duration of the respective switching state vectors corresponding to the SVM used in multilevel converters. The proposed technique directly allows optimizing the switching sequence minimizing the number of switching in four-leg systems. The computational complexity is very low and independent on the number of levels of the converter. This algorithm does not use trigonometric functions

√ Fig. 16. Voltage signals with (40/ 3)-V amplitude and 120% of the third harmonic.


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[5] G. Carrara, S. Gardella, M. Marchesoni, R. Salutari, and G. Sciutto, “A new multilevel PWM method: A theoretical analysis,” IEEE Trans. Power Electron., vol. 7, no. 3, pp. 497–505, Jul. 1992. [6] P. Verdelho and G. D. Marques, “A current control system based in αβ0 variables for a four-leg PWM voltage converter,” in Proc. IEEE IECON, 1998, pp. 1847–1852. [7] M. A. Perales, M. M. Prats, R. Portillo, and L. G. Franquelo, “Threedimensional space vector modulation in abc coordinates for four-leg voltage source converters,” IEEE Power Electron. Lett., vol. 1, no. 4, pp. 104–109, Dec. 2003. [8] M. M. Prats, L. G. Franquelo, J. I. León, R. Portillo, E. Galván, and J. M. Carrasco, “A SVM-3D generalized algorithm for multilevel converters,” in Proc. IEEE IECON, Roanoke, VA, 2003, pp. 24–29. [9] ——, “A 3-D space vector modulation generalized algorithm for multilevel converters,” IEEE Power Electron. Lett., vol. 1, no. 4, pp. 110–114, Dec. 2003. [10] M. M. Prats, J. M. Carrasco, and L. G. Franquelo, “Effective algorithm for multilevel converter with very low computational cost,” Electron. Lett., vol. 38, no. 22, pp. 1398–1400, Oct. 2002. [11] M. M. Prats, R. Portillo, J. M. Carrasco, and L. G. Franquelo, “New fast space-vector modulation for multilevel converters based on geometrical considerations,” in Proc. IEEE IECON, Seville, Spain, 2002, pp. 3134–3139. [12] M. M. Prats, J. I. León, R. Portillo, J. M. Carrasco, and L. G. Franquelo, “A novel space-vector algorithm for multilevel converters based on geometrical considerations using a new sequence control technique,” J. Circuits Syst. Comput., vol. 13, no. 4, pp. 845–861, Aug. 2004. [13] N. Celanovic and D. Boroyevich, “A fast space-vector modulation algorithm for multilevel three-phase converters,” IEEE Trans. Ind. Appl., vol. 37, no. 2, pp. 637–641, Mar./Apr. 2001. [14] L. M. Tolbert and T. G. Habetler, “Novel multilevel inverter carrier-based PWM method,” IEEE Trans. Ind. Appl., vol. 35, no. 5, pp. 1098–1107, Sep./Oct. 1999. [15] O. Alonso, L. Marroyo, and P. Sanchis, “A generalized methodology to calculate switching times and regions in SVPWM modulation of multilevel converters,” in Proc. 10th Eur. Conf. EPE, 2001, pp. 920–925.

Fig. 17. Spectrum of the voltage signal with 120% of the third harmonic from (a) simulation results and (b) experimental results.

Leopoldo Garcia Franquelo (M’85–SM’96–F’05) received the Ing. and Dr.Ing. Industrial degrees from the University of Seville, Seville, Spain, in 1977 and 1980, respectively. He is currently a Full Professor with the Department of Electronic Engineering, University of Seville. His current interests include industrial applications of electronics power converters.

or lookup tables. It has been satisfactorily implemented in a DSP processor, running at 50 MHz, taking only 2.26 µs (113 assembler instructions) to do all the calculations required. This technique can be used as the modulation algorithm in all applications needing a 3-D control vector such as a four-leg active filter, where the conventional 2-D SVM cannot be used. R EFERENCES [1] S. Buso, L. Malesani, and P. Mattavelli, “Comparison of current control techniques for active filter applications,” IEEE Trans. Ind. Electron., vol. 45, no. 5, pp. 722–729, Oct. 1998. [2] M. P. Kazmierkowski and L. Malesani, “Current control techniques for three-phase voltage source PWM converters: A survey,” IEEE Trans. Ind. Electron., vol. 45, no. 5, pp. 691–703, Oct. 1998. [3] R. Zhang, V. H. Prasad, D. Boroyevich, and F. C. Lee, “Three-dimensional space vector modulation for four-leg voltage-source converters,” IEEE Trans. Power Electron., vol. 17, no. 3, pp. 314–326, May 2002. [4] P. C. Loh and D. G. Holmes, “A multidimensional variable band flux modulator for four-phase-leg voltage source inverters,” IEEE Trans. Power Electron., vol. 18, no. 2, pp. 628–635, Mar. 2003.

Ma. Ángeles Martín Prats (M’04) was born in Seville, Spain, in 1971. She received the Licenciado and Doctor degrees in physics from the University of Seville (US), Seville, Spain, in 1996 and 2003, respectively. In 1996, she joined the Spanish Aerospatial Technical National Institute (INTA), where she was with the Renewable Energy Department. In 1998, she joined the Department of Electrical Engineering, University of Huelva, Spain. Since 2000, she has been an Assistant Professor with the Electronic Engineering Department, US. Her research interest focuses on multilevel converters and fuel cell power conditioner systems. She is involved in industrial application for the design and development of power converters applied to renewable energy technologies.

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Ramón C. Portillo (S’06) was born in Seville, Spain, in 1974. He received the Ingeniero Industrial degree from the University of Seville (US), Seville, Spain, in 2002. He is currently working toward the Ph.D. degree in electrical engineering in the Power Electronics Group, US. In 2001, he joined the Power Electronics Group, US, working on I+D projects. Since 2002, he has been an Associate Professor in the Department of Electronic Engineering, US. His interests include electronic power systems applied to energy conditioning and generation, power quality in renewable generation plants, applications of fuzzy systems in industry and wind farms, and modeling and control of power electronic converters and industrial drives.

Jose Ignacio León Galvan (S’04) was born in Cádiz, Spain, in 1976. He received the B.S. degree in telecommunications engineering from the University of Seville (US), Seville, Spain, in 2001, where he is currently working toward the Ph.D. degree in power electronics engineering. In 2002, he joined the faculty of US as a part-time Professor. He became a Research Scholar, in June 2002, in the Electronic Engineering Department of the US. His research interests include modeling and control of power converters, multilevel converters, power quality, renewable energy systems, and motor drives. Mr. León Galvan is a Student Member of the IEEE Industrial Electronics Society.

Manuel A. Perales received the Ing. Industrial and Dr.Ing. Industrial degrees from the University of Seville (US), Seville, Spain, in 1995 and 2002, respectively. He joined the Department of Electronic Engineering, US, in 1996, as a Researcher, and since 1998, he has been an Assistant Professor in this department. His current research areas are active power filters, modulation techniques, power systems, and digital controllers for power systems.

Juan M. Carrasco (M’97) was born in San Roque, Spain, in September 1965. He received the M.Eng. and Dr.Eng. degrees in industrial engineering from the University of Seville (US), Seville, Spain, in 1989 and 1992, respectively. He was an Assistant Professor from 1990 to 1995, and is currently a Professor in the Department of Electronic Engineering, US. He has been working for several years in the power electronics field where he was involved in industrial applications for the design and development of power converters applied to renewable energy technologies. His current research areas are distributed power generation and the integration of renewable energy sources.

Eduardo Galván Díez was born in Aracena, Spain, in April 1963. He received the M.Eng. and Dr.Eng. degrees in industrial engineering from the University of Seville (US), Seville, Spain, in 1991 and 1994, respectively. He was an Assistant Professor from 1992 to 1996, and is currently a Professor, in the Department of Electronic Engineering, US. His current research areas are power electronics applied to generation, renewable energy sources, and electromagnetic compatibility.

Jose Luis Mora Jiménez was born in Huelva, Spain, in 1967. He received the M.Eng. and Dr.Eng. degrees in industrial engineering from the University of Seville (US), Seville, Spain, in 1992 and 2001, respectively. He is currently an Assistant Professor in the Department of Electronic Engineering, US. His current research areas are modeling and control of power converters, multilevel converters, and sensorless motor drives.