Three-Phase Unidirectional Modular Multilevel Converter - IEEE Xplore

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Unidirectional power flow voltage source converter high voltage direct current (VSC-HVDC) systems can be advantageously used in future dc subsea electric ...
Three-Phase Unidirectional Modular Multilevel Converter Gean J. M. de Sousa and Marcelo L. Heldwein FEDERAL UNIVERSITY OF SANTA CATARINA (UFSC) Electrical Engineering Department, Power Electronics Institute (INEP) P.O. box: 5119 Florianopolis, SC, 88040-970, Brazil Phone: +55 (48) 3721-9204 Fax: +55 (48) 3234-5422 Email: [email protected]; [email protected] URL: http://www.inep.ufsc.br

Acknowledgments The authors would like to thank Petrobras for the profitable technical discussions under the project process number 2012/00003-7, personally to engineers Leandro Soares Rezende and Ana Margarida de Oliveira.

Keywords , , , , .

Abstract Unidirectional power flow voltage source converter high voltage direct current (VSC-HVDC) systems can be advantageously used in future dc subsea electric transmission and distribution systems (DCSETDS) in order to reduce cost, increase efficiency and reliability. This work proposes a unidirectional modular multilevel converter (uMMC) suitable for VSC-HVDC systems used in DC-SETDS. The main advantage of the proposal is the reduced number of active switches, lowering costs and increasing reliability. Suitable currents and voltages control strategies are presented, as well as simulation results.

Introduction Medium (MV) and high voltage (HV) electronic power conversion finds increasing interest and applications in, both, industrial and power systems. Converter power levels steadily grow. Benefits from this context include increased controllability, system level efficiency, flexibility and power quality. The main enablers are the recent technical advances and cost reduction of power semiconductor devices. However, even the most modern turn off devices in research phase rarely present breakdown voltages beyond 6.5 kV, with a few laboratory level devices presenting 10 kV or 12 kV [1, 2]. Several technical articles [3, 4] cite that multilevel converters are a feasible solution for increased application voltage levels where single power devices do not cope with the voltage requirements. Another option is to use conventional two- or three level converters with the series connection of semiconductor devices. This leads to relevant drawbacks, such as very high common (CM) and differential mode (DM) emissions, challenges to achieve static and dynamic balances at the voltages across the series connected semiconductors, difficult mechanical design and circuit layout including large stray inductances. On the other hand, just a few multilevel converter topologies are able to operate with line voltages beyond 6.9 kV employing no series connected devices. These include the flying capacitor (FC) multilevel converters [5], the cascaded H-bridge (CHB) topologies [6] and their like [7] and the modular multilevel converters [8, 9, 10]. The CHB topologies are typically applied as inverters and use multi-pulse rectifiers with complex, bulky and expensive transformers. The FC topologies are rarely used when the number of levels is higher than five due to increase complexity and asymmetrical power losses distribution. The same occurs for diode clamped multilevel converters (DCC) [11], with even more complex voltage ripple and balance challenges. An alternative solution for MV/HV solid state based power conversion is the modular multilevel converter (MMC) concept, which makes use of cascaded single-phase converters that

do not require isolated dc voltage sources. The MMC concept typically leads to improved power flow control and occupy less space [12]. Two types of MMC topologies have been recently classified in [13], namely: the double-star chopper-cells MMCC (DSCC) [14] and the double-star bridge-cells MMCC (DSBC) [15]. Both are bidirectional topologies. The DSBC present the double of power semiconductors per submodule with the advantages of presenting buck and boost capability. Nevertheless, most voltage source converters based high voltage dc transmission (VSC-HVDC) applications use the DSCC [14]. Besides VSC-HVDC, both structures can be used in variable speed drives (VSD) applications where torque grows with speed [16, 17]. Typical applications of multilevel converters that include VSC-HVDC and VSD require rectification and inversion stages. VSD systems can use the two MMC topologies, i.e. DSCC or DSBC, in a backto-back configuration [18]. Likewise, the VSC-HVDC systems typically use the bidirectional MMC topologies at both ends of the HVDC line [19]. However, most MV VSD applications do not require bidirectional power flow [20]. Non conventional applications include the transmission of bulk power in off-shore wind power plants [21] and the subsea power systems in oil and gas production in deep waters [22]. Recent research [22] has shown that future subsea electric transmission and distribution system (SETDS) for oil and gas production will profit from dc power systems. A dc based SETDS (DCSETDS) simplified configuration is shown in Fig. 1, where turbo-generators generates electricity for the oil and gas production. A VSC-HVDC rectifier system placed at the production platform feeds the long HVDC umbilical cable transmission line. The umbilical is connected to a HV-to-MV dc-dc converter or directly to a dc distribution panel. Finally, electrical motors for pumps and/or compressors are driven by MV inverters fed by the DC-SETDS.

Figure 1: Future dc subsea electric transmission and distribution system (DC-SETDS).

Unidirectional power flow HVDC systems do not profit much from a bidirectional HVDC rectifier. Typical low voltage (LV), MV and HV bidirectional rectifiers are more complex and expensive than their unidirectional counterparts. This leads to the idea that the MMC concept can be extended to unidirectional topologies that can profit from lower complexity, components count and cost. Furthermore, unidirectional converters are desirable when power flow should not be reversed, eg., in systems where the primary power source has no regeneration capacity. Additional robustness is gained due to reduced short-circuit risk with mistaken gate driver signals. This work proposes submodule MMC unidirectional cells that can be classified as unidirectional doublestar chopper-cells (UDSCC). The proposed UDSCC-MMC concept can be advantageously employed to VSC-HVDC systems that do not require energy regeneration, such as the one in Fig. 1 The UDSCCMMC topology is analyzed and an appropriate operation strategy is proposed. This includes an arm current pattern that enables stable submodule capacitor voltages, a voltage control and balance strategy, and the control of the converter currents. Simulation results are presented to verify the performance of the proposed system regarding ac-side currents total harmonic distortion (THD) and converter voltage control.

Converter Topology The MMC converter topology is seen in Fig. 2 (a). The arm series connected inductances that are used in the bidirectional MMC topologies to limit the circulating currents are intentionally not shown. These can be coupled or non-coupled inductors and are not required in the unidirectional topologies as explained later. The MMC is composed of series connected submodules (SM) that form an arm of the converter. A converter leg refers to the two arms connected to one phase of the system. Finally, ac-side inductors L f are required to couple the legs to a three-phase voltage sources system (vx with x = a, b, c).

Figure 2: UMMC power circuit (a) three-phase topology; (b) unidirectional submodule UDSCC; (c) unidirectional submodule UDSCC type II; (d) unidirectional submodule UDSCC type III; and, (e) submodule UDSCC static operation.

Three submodules with unidirectional controlled current flow capability are presented in Fig. 2 (b) (type I), Fig. 2 (c) (type II) and Fig. 2 (d) type(III). The differences between those three are only related to practical implementations. The submodule type II may benefit from lower complexity auxiliary circuitry, since the control/communication, gate drive and acquisition circuits may share the same ground, avoiding isolated power supplies and signal isolators. The main advantage of submodule type III is that only half of the control/communication circuits are necessary, lowering costs. Depending on which node is chosen as ground, only one isolated gate drive is required for type III. The Fig. 2 (e) presents the ISM −VSM curve of the submodules type I and II. These can synthesize average output voltages between 0 and VC for positive ISM . For negative ISM , the output voltage is always VC .

Current Reference Generation and Ac-Side Currents Control Three main objectives are sought for the UDSCC-MMC, namely: (i) impose high quality ac-side currents; (ii) guarantee the energy balance among different converter arms; and (iii) regulate the dc-link current or voltage. To analyze the bidirectional MMC, two current vectors are usually defined for the currents through the upper arms, ip , and through the lower arms in ip =



in =



ia,p ib,p ic,p

T

ia,n ib,n ic,n

T

(1) .

(2)

Based on these, the ac-side currents iac appear as the differential components of the arms current vectors, i.e. iac = ip − in ,

(3)

and iz is defined with the sum of them iz = ip + in .

(4)

Vector iz common mode component is twice the dc-link current idc . idc =

ia,p + ia,n + ib,p + ib,n + ic,p + ic,n . 2

The differential mode components of iz ,

(5)

Figure 3: (a) Current, voltage and power flowing into the phase a upper arm, accordingly to the proposed mode of operation. These waveforms lead to zero average power, i.e. W+ = W- . (b) Proposed uMMC operation showing the currents at each of the converter arms.

p √ √ 2/3(ia,p + ia,n ) − 1/ 6(ib,p + ib,n ) − 1/ 6(ic,p + ic,n ) √ √ ic,β = 1/ 2(ib,p + ib,n ) − 1/ 2(ic,p + ic,n ),

ic,α =

(6) (7)

are related to the currents circulating within the converter legs in a bidirectional MMC. The control of these combinations of arm currents is, thus, appropriate to control the converter. However, the uMMC presents a challenge for the control of the arm currents that is related to the uncontrollability of the submodules voltages once the state of the turn off switches is not capable of imposing the submodule voltage vSM when iSM is negative. Thus, a proper waveform for the arms currents must be synthesized, that guarantees sinusoidal ac-side currents; constant dc-link current; and zero net energy flow for the submodules capacitors. One possible current shape is proposed in Fig. 3 (a), where phase a upper arm normalized current i0a,p is shown. The according ideal phase a arm local average normalized voltage v0a,p is shown in Fig. 3 (a) neglecting the ac-side inductances voltage drop. The product of these two quantities, i.e. the arms normalized local average power p0a,p , and the modulation signals for arms of phase a are also shown. Considering the proposed waveforms, ideal components (lossless) and balanced sinusoidal ac-side currents result that the average arm active power is null. This guarantees the energy stability of the capacitors of this arm. The arm current is, thus, a different composition of input and output currents for each of the six sectors. Normalizations are performed as follows. v0x =

vx NVC∗

(8)

i0x =

ix Ipk

(9)

Where vx and ix are any voltage and current in the circuit, and v0x and i0x are their normalized values. Ipk is the input current peak, N is the number of submodules per arm and VC∗ is the ideal average submodule capacitor voltage. The proposed arm current pattern guarantees that each arm operates with negative current only for one of the sectors. This guarantees the controllability of the converter currents, i.e. there are at least three controllable arms for every instant of time that are able to impose the required currents. A fourth arm operates with the negative current and the other two arms do not conduct currents. A practical implication is that there are no circulating currents and arm inductors are not required. The

ideal operation of the converter is illustrated in Fig. 3 (b), where the currents through all arms are drawn for a complete mains cycle along with the ac-side currents. It is observed that four arms out of six will operate simultaneously. The ac-side current control is here performed in a synchronously rotating reference frame (dq0) as shown in Fig. 4. Matrix K implements Park’s transform. Three modulation signals mx , with x = a, b, c, result from the inverse Park’s transformation of output signals of current controllers Ci,ac . A fourth modulation signal is generated by the uMMC dc-link current controller Ci,dc . Since the three active arms are different for every sector of operation, the signals generated by the controllers must be combined and distributed among arms in such a way that the ac and dc voltages generated by the converter are always in accordance with the control action signals generated by the controllers. This task is performed by the ‘Modulation Signal Generator‘ block shown in Fig. 4. Although the sectors shown in Fig. 3 have all the same duration, small variations in sectors length are necessary to balance capacitor voltages, as it will be addressed later. Vector δ dictates the duration of each sector.

Figure 4: Ac and dc current controllers.

Voltage Control As for the bidirectional MMC topologies, the energy balance among capacitors within the submodules of a converter arm can be implemented by knowing which are the cells with lower and higher voltage levels and choosing to operate, i.e. connect or disconnect capacitors of the selected cells, depending on the arm current direction [23]. For the uMMC, this balancing scheme only affects capacitors voltages when iSM is positive, since there is no switching when iSM is negative. The total energy stored in the converter dc-link capacitors is directly controlled by imposing the input power, i.e. input current for a given ac-side voltage. The total capacitors stored energy for a given converter arm must also be controlled due to non-ideal behavior of the circuit. This is typically done in a bidirectional MMC with the variation of the circulating currents, e.g. with circulating current components at different frequencies including the ac-side fundamental. The circulating currents in the unidirectional converter are ideally null. However, unequal distribution of absorbed active power by the converter arms can be achieved by changing the length of sectors S1 ..S6 . Fig. 5 (a) shows the definition of six angles δi , with i = 0..5, that define the borders for each sector. Changing any of these angles causes the arm current to vary as exemplarily shown in Fig. 5(b) for the arms current in phase a with a reduction of the first sector, i.e. negative δ1 . The normal0 /2π, neglecting voltage drops ized average power absorbed by the upper arm in phase a, ∆p0a,p = ∆Wa,p across inductors and capacitors voltage ripple, is given by  "  2 √  δ1 1 √ 2   2 3GM sin (δ1 ) − 16G sin − 8 3G sin (δ1 )   32 2    #       +3GM sin (2δ1 ) + (3 − 2G)6Mδ1   0 " ∆Pa,p =  2  √ √  1 δ1 2   2 3GM sin (δ1 ) − 16G (3 − 2G) sin − 8 3G sin (δ1 )   32 2    #       +3GM sin (2δ1 ) + (3 − 2G)6Mδ1 

; if δ1 > 0 . ; otherwise

(10)

Figure 5: Definition of the (a) sector angles with respect to an arm reference current and (b) an example of the influence of the first sector angle δ1 on the arm current.

Similar expressions can be found for each combination of arm and angle δi . Let the vector ∆P0 , defined below, represent the average power flowing into each arm.  T ∆P0 = ∆P0 a,p ∆P0 a,n ∆P0 b,p ∆P0 b,n ∆P0 c,p ∆P0 c,n . (11) The vector δ represents all angles δi in a compact way, T  δ = δ0 δ1 δ2 δ3 δ4 δ5 .

(12)

Linearizing (10) and all other possible equations that relates ∆P0 and δ leads to ∆P0 ≈ Mp,L ·δδ,

(13)

where:  0 k1 −k1 0 k2 −k2  0 k2 −k2 0 k1 −k1     k2 −k2  0 k −k 0 1 1 , Mp,L =   k1 −k1 0 k2 −k2 0     −k1 0 k2 −k2 0 k1  −k2 0 k1 −k1 0 k2 √ 3(2G − 1)M − 2 3G k1 = , 8πG 

(14)

(15)

and √ 3M − 2 3G k2 = . 8πG

(16)

Where M is the normalized input voltage peak, and G is the normalized output dc voltage. Even though (10) is a two case function, the same linearized function is obtained for both cases. The time averaged capacitors stored energy for each of the arms can be modeled by a single capacitor per arm as seen in Fig. 6 (a), where vC,s,y,x , with y = p, n, are the sum of the voltages of equivalent capacitors of a converter arm. Thus, a converter voltage control strategy is presented in Fig. 6 (b). Matrix D, defined in (17), separates the common mode component of equivalent capacitors voltage from differential mode components. Three of these are related to the voltage difference between upper and lower arm of each phase, and the other two are the α and β components, as in Clarke’s transformation, of the sum of upper and lower capacitors voltage in each phase. √  √  2/2 − 2/2 √ 0 0 0 0 √  0  0 2/2 − 2/2 √ 0   √0  0  0 0 0 2/2 − 2/2   √ √ √ √ √ D= √ . 3/3 − 3/6 − 3/6 − 3/6 − 3/6   3/3   0 1/2 1/2 −1/2 −1/2   0 √ √ √ √ √ √ 6/6 6/6 6/6 6/6 6/6 6/6

(17)

The common mode value is proportional to the sum of all six equivalent capacitors voltage, thus, related to the total stored energy. It is used to define the ac-side quadrature current reference i∗q , after being compared against a reference and compensated by the controller Cv,t . The differential capacitor voltage components, vC,s,d , represents unbalances between capacitor voltages. These are compared with zero, and compensated by Cv,d . The differential average power signals, represented by vector pd , are normalized and multiplied by M−1 d , yielding δ d , the differential components of δ . The common mode component δc does not affect the voltage balance, therefore, it is made null. Finally, vector δ is obtained from the computed components and the inverse transformation with D-1 . Matrix Md is obtained with the non zero columns/rows of Md = DMp,L D−1 .

(18)

Figure 6: (a) Equivalent arm capacitors and (b) the proposed voltage control structure.

Simulation Results The proposed converter was simulated with the following specifications: Output power of 250 kW, output voltage of 4.6 kV, input line to line voltage of 1.8 kV and grid frequency of 60 Hz. Due to the time consuming simulation of switched circuits, each converter arm is implemented with only four submodules. Considering the practical use of current low voltage Si IGBT technology led to the given specifications. The other converter parameters are given in Table I. Table I: Parameters of simulated converter.

N 4

Ldc 2 mH

Lf 1 mH

La 50 µH

C 2 mF

VC 1 kV

fsw 3.24 kHz

A small inductance La has been added in series with each arm to verify the effects of stray inductances on the quality of the input currents. Fig. 7 shows the simulation results. In order to verify the operation of voltage balance control, a resistance has been placed in parallel with each submodule capacitor of upper phase a arm to generate an asymmetrical power consumption within this arm. Dc-side load steps from 50% to 100% and back were applied at t = 170 ms and t = 300 ms, respectively. The input currents in Fig. 7 present very low harmonic contents and the converter achieves close to unity power factor. Considering the first 40 harmonics, a THD of 0.76% can be measured for nominal power. All capacitor voltages are well controlled even under the large load transients. It is possible to notice that the sector control angles are not null, even at steady state, due to the added resistance, that consumes approximately 1% of the converter rated power. One of the arms (upper arm in phase c) had its submodule capacitors initialized with a higher voltage than the others. It is possible to see that all voltages stabilize close to the reference values after a few grid cycles. The simulated converter can be seen in Fig. 8.

Figure 7: Simulation results including: ac-side currents ia , ib , ic , dc-side current io , arms currents in phase a ia,p , ia,n , upper arm in phase a voltage va,p , converter line voltage vab , sum of the capacitors voltage at each arm vC,x,y , sector control angles δi , instantaneous power at the upper arm in phase a pa,p .

Figure 8: Simulated converter.

Conclusions This work has proposed a novel modular multilevel converter, named here uMMC, that employs unidirectional cells as the MMC submodules. This leads to a substantially different operation principle in comparison to the known bidirectional MMC topologies due to the diodes inherent operation in the uMMC. The main advantages are the reduced component count and the reduced risk of short-circuit due to misfired gate driver signals. As with other unidirectional three-phase converter, the uMMC has limited capability regarding the ac-side currents phase displacement angle (maximum of π/6 rad). Converter currents and voltages control strategies appropriate to the uMMC specific operation have been proposed. These include the use of decoupling transformations for the control of the voltages across the uMMC submodule capacitors and the use of sector angles generation to transfer power among the uMMC arms. The proposed topology, control and modulation techniques were verified through computer simulation.

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