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ISSN 1292-862

TIMA Lab. Research Reports On-chip pseudorandom MEMS testing

L. RUFER*, S. MIR*, E. SIMEU*, C. DOMINGUES*

* TIMA Laboratory, 46 avenue Félix Viallet 38000 Grenoble France

ISRN TIMA--RR-03/06-01--FR

TIMA Laboratory, 46 avenue Félix Viallet, 38000 Grenoble France

On-chip pseudorandom MEMS testing L. Rufer, S. Mir, E. Simeu and C. Domingues TIMA Laboratory 46 Av. Félix Viallet 38031 Grenoble FRANCE

ABSTRACT This paper presents a Built-In-Self-Test (BIST) implementation of pseudo-random testing for MEMS. The technique is based on Impulse Response (IR) evaluation using pseudo-random Maximum–Length Sequences (MLS). We will demonstrate the use of this technique for an on-chip fast and accurate broadband determination of MEMS behaviour, in particular for the characterisation of MEMS structures such as cantilevers and bridges, determining their mechanical and thermal behaviour using just electrical tests.

1. INTRODUCTION Guaranteeing the safe and reliable operation of large systems requires the early detection of faults, accurate diagnosis and fault-tolerant capabilities. One way of mastering the behaviour of these complex systems is to use distributed control architectures in which intelligent transducers can play a major role. These intelligent devices must offer services all along their life cycle, including data estimation, data validation, data characterization or fault tolerance and selfvalidation [1]. In many cases, transducers implement first or secondorder transfer functions that are linear to a large extent. In our search for including self-validation in intelligent sensors, we have studied a pseudorandom testing technique that offers a practical solution for Linear Time Invariant (LTI) systems. It is well known that the input-output Cross-Correlation Function (CCF) of a LTI system provides an estimation of the system impulse response when the input signal has the frequency spectrum of a white noise. It is also known that the auto-correlation of a pseudo-random binary signal approaches the one of a white noise for small values of the rectangular pulses width and high values of sequence length N. These facts were exploited in [2]

in order to present a pseudorandom testing approach for mixed-signal circuits. Most MEMS sense physical signals (acceleration, force, pressure, radiation …) and convert them into electrical signals processed by the associated electronics. In most cases, this operation is described by means of a first or second-order transfer function, that is linear to a large extent, and that can be verified using a pseudorandom test scheme. For self-test, the input physical signals must be generated on-chip during a test phase that must be as short as possible. One possible solution is to electrically induce on-chip the test stimuli as it is shown for different types of MEMS in [3]. In this paper, we will present a Built-In-Self-Test (BIST) implementation of pseudo-random testing for MEMS. The technique is based on Impulse Response (IR) evaluation using pseudo-random Maximum– Length Sequences (MLS). The MLS approach is capable of providing vastly superior dynamic range in comparison to the straightforward technique using an impulse excitation and is thus an optimal solution for measurements in noisy environments and for lowpower test signals. We will demonstrate the use of this technique for an on-chip fast and accurate broadband determination of MEMS behaviour, in particular for the characterisation of MEMS structures such as cantilevers and bridges, determining their mechanical and thermal behaviour using just electrical tests. In the testing phase, the movement of the mechanical parts is stimulated by heating resistors. Despite that thermal time constants are much larger than mechanical time constants, we will show how the high dynamic range of the test approach allows for measuring on-chip both the thermal and mechanical dynamic behaviour of the microstructures. The paper is structured as follows. In Section 2, we will briefly review previous work related to MEMS

self-test. Next, Section 3 will provide the background on the application of the test method. Section 4 will describe the model of the thermo-mechanical microstructures that we will use as test vehicles. Next, Section 5 will present the validation and implementation of the on-chip test method. Finally, Section 6 will provide some conclusions and directions on our future research.

2. MEMS SELF-TEST Several types of transducers have recently appeared providing, in one way or another, a self-test function. In all cases, an electrical signal is used during the test phase in order to stimulate the device. The transducer response is next analyzed off-chip. In [3], the authors present the implementation of a selftest approach for an infrared imager. In this device, each pixel is formed by means of a suspended membrane aimed at capturing infrared light that heats up the microstructure. The temperature increase, proportional to the incoming infrared light, is measured by means of thermopiles placed along the membrane support beams. Since this device works with intermediate thermal signals, the actual test stimulus is generated on-chip by means of a heating resistor that heats up the suspended membrane in its central point, thus allowing for a test of the overall electrothermal behaviour. In the same paper, a method of stimulating movement in suspended cantilevers is analyzed, based on electrically heating a beam that will deflect due to the different thermal expansions coefficients of its constitutive layers. In Section 4, we will use this method to stimulate the microstructures under test. In addition, we will show in Section 5 how to analyze onchip the microstructure response, with a high dynamic range allowing the measurement of both the thermal and mechanical dynamic behaviour. Self-test techniques have generally been included for the case of accelerometers. In [4], a surface micromachined capacitive accelerometer is considered. An electrical pulse signal on specific self-test fingers is used to generate an electrostatic force on the seismic mass, thus creating a movement that is detected by the capacitive structure of the accelerometer, in an action that mimics the effect of acceleration. The same principle is used in [5]. In other devices such as piezoresistive pressure sensors [6], the mechanical stimuli are applied to the sensor membrane by the way of a pneumatic actuation. The air inside the cavity of a pressure sensor is heated by Joule effect that results from applying an electrical pulse to a resistor, and the resulting pressure change is detected by the gauges of the membrane.

The techniques described above are all directed towards providing a kind of self-test function in which an electrical pulse-like signal is used to stimulate the device. This function can be used by the user in the field application, obtaining then confidence on the device behaviour, for example, that the suspended mass of an accelerometer is able to move. However, they all lack the possibility of performing a functional analysis that fully tests the device and that will be exploited for other tasks such as manufacturing testing. In the next sections, we will illustrate a method to perform on-chip a full functional test. It is important to notice that the techniques for stimuli generation described for the above devices can be reused in the on-chip test method proposed. Only a suitable sequence of electrical test pulses must be generated in order to analyze on-chip the MEMS behaviour.

3. THE TEST METHOD The architecture of the test approach is shown in Figure 1. The MLS signal x(k) generated by means of a Linear Feedback Shift-Register (LFSR), is directly applied to the input of an LTI Circuit Under Test (CUT). An ADC at the CUT output provides the digital output signal y(k) that is correlated with the MLS signal x(k) in the correlator block. The output signal of the correlator h(k) corresponds to an estimation of the impulse response of the CUT that is used to construct a signature for testing. The LFSR generates periodic two-level deterministic sequences of length N = 2m – 1, where m is an integer denoting the order of the sequence. A pseudorandom sequence can be generated in the simplest case by an arrangement of m bits shift-register clocked at fixed frequency using an exclusive-OR gate to generate a feedback signal from the nth bit (0